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Merge branch 'test/parlio_rx_cache_safe' into 'master'

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Reenable parlio rx cache safe test

Closes IDF-7840

See merge request espressif/esp-idf!38635
This commit is contained in:
morris
2025-04-23 21:23:41 +08:00
parent bb9f73a786 3fc566caf1
commit 1bbb20cfd2
15 changed files with 82 additions and 118 deletions
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docs/en/api-reference/peripherals/gptimer.rst
+1 -1
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@@ -382,7 +382,7 @@ Use the :doc:`/api-guides/tools/idf-size` tool to check the code and data consum
| driver | 4251 | 12 | 12 | 0 | 0 | 4046 | 4046 | 193 | 193 |
+------------------+------------+-------+------+-------+-------+------------+-------+------------+---------+
Additionally, each GPTimer handle dynamically allocates about ``90`` bytes of memory from the heap. If the :cpp:member:`gptimer_config_t::flags::allow_pd` option is enabled, each timer will also consume approximately ``30`` extra bytes of memory during sleep to store the register context.
Additionally, each GPTimer handle dynamically allocates about ``100`` bytes of memory from the heap. If the :cpp:member:`gptimer_config_t::flags::allow_pd` option is enabled, each timer will also consume approximately ``30`` extra bytes of memory during sleep to store the register context.
Application Examples
--------------------
docs/en/api-reference/peripherals/parlio/parlio_tx.rst
+2 -6
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@@ -329,22 +329,18 @@ When the file system performs Flash read/write operations, the system temporaril
.. note::
Note that after enabling this option, all interrupt callback functions and their context data **must be stored in internal memory**. Because when the Cache is disabled, the system cannot load data and instructions from Flash.
Note that after enabling this option, all interrupt callback functions and their context data **must reside in internal memory**. Because when the Cache is disabled, the system cannot load data and instructions from external memory.
.. only:: SOC_SPI_MEM_SUPPORT_AUTO_SUSPEND or SOC_SPIRAM_XIP_SUPPORTED
.. note::
Enable the following options:
When the following options are enabled, the Cache will not be disabled automatically during Flash read/write operations. You don't have to enable the :ref:`CONFIG_PARLIO_TX_ISR_CACHE_SAFE`.
.. list::
:SOC_SPI_MEM_SUPPORT_AUTO_SUSPEND: - :ref:`CONFIG_SPI_FLASH_AUTO_SUSPEND`
:SOC_SPIRAM_XIP_SUPPORTED: - :ref:`CONFIG_SPIRAM_XIP_FROM_PSRAM`
The Cache will not to be automatically disabled. And it is safe for the CPU to access the Cache while erasing the filesystem. :ref:`CONFIG_PARLIO_TX_ISR_CACHE_SAFE` option has no need to be enabled.
This way, interrupts can run while the Cache is disabled, but it will also increase IRAM consumption.
Performance
^^^^^^^^^^^