fix(ulp): enable astyle linter and format ULP component
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@@ -1,5 +1,5 @@
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/*
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* SPDX-FileCopyrightText: 2010-2022 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2010-2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@@ -93,7 +93,7 @@ esp_err_t ulp_run(uint32_t entry_point)
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REG_SET_FIELD(RTC_CNTL_ULP_CP_TIMER_REG, RTC_CNTL_ULP_CP_PC_INIT, entry_point);
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SET_PERI_REG_MASK(RTC_CNTL_COCPU_CTRL_REG, RTC_CNTL_COCPU_SEL); // Select ULP_TIMER trigger target for ULP.
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// start ULP clock gate.
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SET_PERI_REG_MASK(RTC_CNTL_ULP_CP_CTRL_REG ,RTC_CNTL_ULP_CP_CLK_FO);
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SET_PERI_REG_MASK(RTC_CNTL_ULP_CP_CTRL_REG, RTC_CNTL_ULP_CP_CLK_FO);
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// ULP FSM sends the DONE signal.
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CLEAR_PERI_REG_MASK(RTC_CNTL_COCPU_CTRL_REG, RTC_CNTL_COCPU_DONE_FORCE);
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#if CONFIG_IDF_TARGET_ESP32S3
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@@ -133,11 +133,11 @@ esp_err_t ulp_load_binary(uint32_t load_addr, const uint8_t* program_binary, siz
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}
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size_t total_size = (size_t) header.text_offset + (size_t) header.text_size +
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(size_t) header.data_size;
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(size_t) header.data_size;
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ESP_LOGD(TAG, "program_size_bytes: %d total_size: %d offset: %d .text: %d, .data: %d, .bss: %d",
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program_size_bytes, total_size, header.text_offset,
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header.text_size, header.data_size, header.bss_size);
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program_size_bytes, total_size, header.text_offset,
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header.text_size, header.data_size, header.bss_size);
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if (total_size != program_size_bytes) {
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return ESP_ERR_INVALID_SIZE;
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