feat(mspi): supported flash 120MHz SDR timing tuning on ESP32P4

2024-11-19 11:32:59 +08:00
parent 8eeb3e2055
commit 1eef2e8c19
21 changed files with 898 additions and 70 deletions
@@ -561,7 +561,7 @@ void IRAM_ATTR call_start_cpu0(void)
     * In this stage, we re-configure the Flash (and MSPI) to required configuration
     */
    spi_flash_init_chip_state();
-#if SOC_MEMSPI_SRC_FREQ_120M
+#if SOC_MEMSPI_SRC_FREQ_120M_SUPPORTED
    // This function needs to be called when PLL is enabled. Needs to be called after spi_flash_init_chip_state in case
    // some state of flash is modified.
    mspi_timing_flash_tuning();