Merge branch 'feature/esp32c5mp_light_sleep_support_stage_2' into 'master'

feat(esp_hw_support): esp32c5mp sleep support (system part)

Closes IDF-8643, PM-195, PM-169, IDF-8641, IDF-8640, IDF-8639, IDF-8638, CV-259, IDF-10308, IDF-10317, IDF-10310, PM-202, IDF-10918, PM-207, PM-208, PM-210, and PM-214

See merge request espressif/esp-idf!31645

components/hal/include/hal/gpio_hal.h

@@ -479,7 +479,7 @@ void gpio_hal_sleep_pupd_config_apply(gpio_hal_context_t *hal, uint32_t gpio_num
 void gpio_hal_sleep_pupd_config_unapply(gpio_hal_context_t *hal, uint32_t gpio_num);
 #endif // CONFIG_GPIO_ESP32_SUPPORT_SWITCH_SLP_PULL
 
-#if SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP && (SOC_RTCIO_PIN_COUNT == 0)
+#if SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP && (SOC_RTCIO_PIN_COUNT == 0) && SOC_DEEP_SLEEP_SUPPORTED
 /**
  * @brief Enable GPIO deep-sleep wake-up function.
  *
@@ -506,7 +506,7 @@ void gpio_hal_sleep_pupd_config_unapply(gpio_hal_context_t *hal, uint32_t gpio_n
  * @return True if the pin is enabled to wake up from deep-sleep
  */
 #define gpio_hal_deepsleep_wakeup_is_enabled(hal, gpio_num) gpio_ll_deepsleep_wakeup_is_enabled((hal)->dev, gpio_num)
-#endif //SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP
+#endif //SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP && (SOC_RTCIO_PIN_COUNT == 0) && SOC_DEEP_SLEEP_SUPPORTED
 
 /**
  * @brief  Select a function for the pin in the IOMUX

components/hal/include/hal/pau_hal.h

@@ -38,6 +38,7 @@ typedef struct {
 void pau_hal_set_regdma_entry_link_addr(pau_hal_context_t *hal, pau_regdma_link_addr_t *link_addr);
 
 #if SOC_PM_SUPPORT_PMU_MODEM_STATE
+#if SOC_PM_PAU_REGDMA_LINK_WIFIMAC
 /**
  * @brief Set regdma modem link address
  *
@@ -45,6 +46,7 @@ void pau_hal_set_regdma_entry_link_addr(pau_hal_context_t *hal, pau_regdma_link_
  * @param link_addr     modem link address value
  */
 #define pau_hal_set_regdma_modem_link_addr(hal, addr)   pau_ll_set_regdma_wifimac_link_addr((hal)->dev, (addr))
+#endif
 
 /**
  * @brief Start transmission on regdma modem link
@@ -63,6 +65,7 @@ void pau_hal_stop_regdma_modem_link(pau_hal_context_t *hal);
 #endif
 
 #if SOC_PM_RETENTION_SW_TRIGGER_REGDMA
+#if SOC_PM_PAU_REGDMA_LINK_MULTI_ADDR
 /**
  * @brief Set regdma system link address
  *
@@ -70,6 +73,7 @@ void pau_hal_stop_regdma_modem_link(pau_hal_context_t *hal);
  * @param link_addr     main link address value
  */
 #define pau_hal_set_regdma_system_link_addr(hal, addr)   pau_ll_set_regdma_link0_addr(hal->dev, (addr))
+#endif
 
 /**
  * @brief Start transmission on regdma system link
@@ -86,6 +90,7 @@ void pau_hal_start_regdma_system_link(pau_hal_context_t *hal, bool backup_or_res
 void pau_hal_stop_regdma_system_link(pau_hal_context_t *hal);
 #endif
 
+#if SOC_PM_PAU_REGDMA_LINK_MULTI_ADDR
 /**
  * @brief Set regdma extra link address
  *
@@ -93,6 +98,7 @@ void pau_hal_stop_regdma_system_link(pau_hal_context_t *hal);
  * @param link_addr     extra link address value
  */
 #define pau_hal_set_regdma_extra_link_addr(hal, addr)   pau_ll_set_regdma_link3_addr(hal->dev, (addr))
+#endif
 
 /**
  * @brief Start transmission on regdma extra link
@@ -118,6 +124,34 @@ void pau_hal_stop_regdma_extra_link(pau_hal_context_t *hal);
 void pau_hal_regdma_clock_configure(pau_hal_context_t *hal, bool enable);
 #endif
 
+#if SOC_PM_PAU_REGDMA_LINK_CONFIGURABLE
+/**
+ * @brief Enable or disable PAU module clock
+ *
+ * @param hal           regdma hal context
+ * @param count         the maximum number of regdma linked list
+ */
+void pau_hal_regdma_link_count_config(pau_hal_context_t *hal, int count);
+#endif
+
+/**
+ * @brief Set PAU module link work timeout threshold
+ *
+ * @param hal           regdma hal context
+ * @param loop_num      the maximum number of regdma link loop num
+ * @param count         the maximum number of register access timeout
+ */
+void pau_hal_set_regdma_work_timeout(pau_hal_context_t *hal, uint32_t loop_num, uint32_t count);
+
+/**
+ * @brief Set regdma link wait timeout, include wait retry count and register read interval
+ *
+ * @param hal           regdma hal context
+ * @param count         the maximum number of regdma wait retry count
+ * @param interval      the interval of regdma wait link to read register
+ */
+void pau_hal_set_regdma_wait_timeout(pau_hal_context_t *hal, int count, int interval);
+
 #if SOC_PAU_IN_TOP_DOMAIN
 /**
  * If PAU is in TOP power domain, configuration will be lost after sleep, it is necessary

components/hal/include/hal/rtc_hal.h

@@ -84,7 +84,7 @@ typedef struct rtc_cntl_sleep_retent {
 #endif
 #endif // SOC_PM_SUPPORT_EXT1_WAKEUP
 
-#if SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP && (SOC_RTCIO_PIN_COUNT == 0)
+#if SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP && (SOC_RTCIO_PIN_COUNT == 0) && SOC_DEEP_SLEEP_SUPPORTED
 
 #define rtc_hal_gpio_get_wakeup_status()                  rtc_cntl_ll_gpio_get_wakeup_status()