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fix(lp_io): w1ts/w1tc register access performance is improved

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by avoiding "read-modify-write" operation. The registers designed to be
write only.
This commit is contained in:
Song Ruo Jing
2025-07-22 12:17:31 +08:00
parent 4571d2756a
commit 2292bd6473
7 changed files with 32 additions and 32 deletions
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components/hal/esp32c5/include/hal/rtc_io_ll.h
+5 -5
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@@ -102,7 +102,7 @@ static inline void rtcio_ll_function_select(int rtcio_num, rtcio_ll_func_t func)
*/
static inline void rtcio_ll_output_enable(int rtcio_num)
{
LP_GPIO.enable_w1ts.enable_w1ts = BIT(rtcio_num);
LP_GPIO.enable_w1ts.val = BIT(rtcio_num);
}
/**
@@ -112,7 +112,7 @@ static inline void rtcio_ll_output_enable(int rtcio_num)
*/
static inline void rtcio_ll_output_disable(int rtcio_num)
{
LP_GPIO.enable_w1tc.enable_w1tc = BIT(rtcio_num);
LP_GPIO.enable_w1tc.val = BIT(rtcio_num);
}
/**
@@ -124,9 +124,9 @@ static inline void rtcio_ll_output_disable(int rtcio_num)
static inline void rtcio_ll_set_level(int rtcio_num, uint32_t level)
{
if (level) {
LP_GPIO.out_w1ts.out_w1ts = BIT(rtcio_num);
LP_GPIO.out_w1ts.val = BIT(rtcio_num);
} else {
LP_GPIO.out_w1tc.out_w1tc = BIT(rtcio_num);
LP_GPIO.out_w1tc.val = BIT(rtcio_num);
}
}
@@ -437,7 +437,7 @@ static inline uint32_t rtcio_ll_get_interrupt_status(void)
*/
static inline void rtcio_ll_clear_interrupt_status(void)
{
LP_GPIO.status_w1tc.status_w1tc = 0x7F;
LP_GPIO.status_w1tc.val = 0x7F;
}
#ifdef __cplusplus