docs(sphinx-lint): Fix issues reported by sphinx-lint before adding it to pre-commit
This commit is contained in:
@@ -5,7 +5,7 @@
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espefuse.py v4.6-dev
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Connecting....
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Detecting chip type... ESP32-C2
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=== Run "summary" command ===
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EFUSE_NAME (Block) Description = [Meaningful Value] [Readable/Writeable] (Hex Value)
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----------------------------------------------------------------------------------------
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@@ -26,21 +26,21 @@
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RTC_LDO_SLP_DBIAS31 (BLOCK2) BLOCK2 DIG_LDO_SLP_DBIAS31 = 4 R/W (0b000001)
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RTC_LDO_ACT_DBIAS31 (BLOCK2) BLOCK2 DIG_LDO_ACT_DBIAS31 = 24 R/W (0b000110)
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RTC_LDO_ACT_DBIAS13 (BLOCK2) BLOCK2 DIG_LDO_ACT_DBIAS13 = 72 R/W (0x12)
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Config fuses:
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WR_DIS (BLOCK0) Disable programming of individual eFuses = 0 R/W (0x00)
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RD_DIS (BLOCK0) Disable reading from BlOCK3 = 0 R/W (0b00)
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UART_PRINT_CONTROL (BLOCK0) Set the default UARTboot message output mode = Enable R/W (0b00)
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DIS_DIRECT_BOOT (BLOCK0) This bit set means disable direct_boot mode = False R/W (0b0)
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Flash fuses:
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FORCE_SEND_RESUME (BLOCK0) Set this bit to force ROM code to send a resume co = False R/W (0b0)
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mmand during SPI boot
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mmand during SPI boot
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FLASH_TPUW (BLOCK0) Configures flash waiting time after power-up; in u = 0 R/W (0x0)
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nit of ms. If the value is less than 15; the waiti
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ng time is the configurable value. Otherwise; the
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waiting time is twice the configurable value
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waiting time is twice the configurable value
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Identity fuses:
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DISABLE_WAFER_VERSION_MAJOR (BLOCK0) Disables check of wafer version major = False R/W (0b0)
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DISABLE_BLK_VERSION_MAJOR (BLOCK0) Disables check of blk version major = False R/W (0b0)
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@@ -49,41 +49,41 @@
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PKG_VERSION (BLOCK2) EFUSE_PKG_VERSION = 1 R/W (0b001)
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BLK_VERSION_MINOR (BLOCK2) Minor version of BLOCK2 = With calib R/W (0b001)
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BLK_VERSION_MAJOR (BLOCK2) Major version of BLOCK2 = 0 R/W (0b00)
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Jtag fuses:
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DIS_PAD_JTAG (BLOCK0) Set this bit to disable pad jtag = False R/W (0b0)
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Mac fuses:
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CUSTOM_MAC_USED (BLOCK0) True if MAC_CUSTOM is burned = False R/W (0b0)
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CUSTOM_MAC (BLOCK1) Custom MAC address
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= 00:00:00:00:00:00 (OK) R/W
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MAC (BLOCK2) MAC address
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= 08:3a:8d:5c:4b:94 (OK) R/W
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CUSTOM_MAC (BLOCK1) Custom MAC address
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= 00:00:00:00:00:00 (OK) R/W
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MAC (BLOCK2) MAC address
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= 08:3a:8d:5c:4b:94 (OK) R/W
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Security fuses:
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DIS_DOWNLOAD_ICACHE (BLOCK0) The bit be set to disable icache in download mode = False R/W (0b0)
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DIS_DOWNLOAD_MANUAL_ENCRYPT (BLOCK0) The bit be set to disable manual encryption = False R/W (0b0)
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SPI_BOOT_CRYPT_CNT (BLOCK0) Enables flash encryption when 1 or 3 bits are set = Disable R/W (0b000)
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and disables otherwise
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and disables otherwise
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XTS_KEY_LENGTH_256 (BLOCK0) Flash encryption key length = 128 bits key R/W (0b0)
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DIS_DOWNLOAD_MODE (BLOCK0) Set this bit to disable download mode (boot_mode[3 = False R/W (0b0)
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:0] = 0; 1; 2; 4; 5; 6; 7)
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:0] = 0; 1; 2; 4; 5; 6; 7)
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ENABLE_SECURITY_DOWNLOAD (BLOCK0) Set this bit to enable secure UART download mode = False R/W (0b0)
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SECURE_BOOT_EN (BLOCK0) The bit be set to enable secure boot = False R/W (0b0)
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SECURE_VERSION (BLOCK0) Secure version for anti-rollback = 0 R/W (0x0)
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BLOCK_KEY0 (BLOCK3) BLOCK_KEY0 - 256-bits. 256-bit key of Flash Encryp
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= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
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tion
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BLOCK_KEY0_LOW_128 (BLOCK3) BLOCK_KEY0 - lower 128-bits. 128-bit key of Flash
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= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
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Encryption
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= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
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tion
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BLOCK_KEY0_LOW_128 (BLOCK3) BLOCK_KEY0 - lower 128-bits. 128-bit key of Flash
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= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
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Encryption
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BLOCK_KEY0_HI_128 (BLOCK3) BLOCK_KEY0 - higher 128-bits. 128-bits key of Secu
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= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
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re Boot
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= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
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re Boot
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Wdt fuses:
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WDT_DELAY_SEL (BLOCK0) RTC watchdog timeout threshold; in unit of slow cl = 40000 R/W (0b00)
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ock cycle
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ock cycle
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To get a dump for all eFuse registers.
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@@ -5,7 +5,7 @@
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espefuse.py v4.6-dev
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Connecting....
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Detecting chip type... ESP32-C3
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=== Run "summary" command ===
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EFUSE_NAME (Block) Description = [Meaningful Value] [Readable/Writeable] (Hex Value)
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----------------------------------------------------------------------------------------
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@@ -26,7 +26,7 @@
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ADC1_CAL_VOL_ATTEN1 (BLOCK2) ADC1 calibration voltage at atten1 = 52 R/W (0b0000001101)
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ADC1_CAL_VOL_ATTEN2 (BLOCK2) ADC1 calibration voltage at atten2 = -152 R/W (0b1000100110)
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ADC1_CAL_VOL_ATTEN3 (BLOCK2) ADC1 calibration voltage at atten3 = -284 R/W (0b1001000111)
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Config fuses:
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WR_DIS (BLOCK0) Disable programming of individual eFuses = 0 R/W (0x00000000)
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RD_DIS (BLOCK0) Disable reading from BlOCK4-10 = 0 R/W (0b0000000)
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@@ -35,19 +35,19 @@
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DIS_DIRECT_BOOT (BLOCK0) Disable direct boot mode = False R/W (0b0)
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UART_PRINT_CONTROL (BLOCK0) Set the default UARTboot message output mode = Enable R/W (0b00)
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ERR_RST_ENABLE (BLOCK0) Use BLOCK0 to check error record registers = with check R/W (0b1)
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BLOCK_USR_DATA (BLOCK3) User data
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= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
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BLOCK_SYS_DATA2 (BLOCK10) System data part 2 (reserved)
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= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
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BLOCK_USR_DATA (BLOCK3) User data
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= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
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BLOCK_SYS_DATA2 (BLOCK10) System data part 2 (reserved)
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= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
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Flash fuses:
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FLASH_TPUW (BLOCK0) Configures flash waiting time after power-up; in u = 0 R/W (0x0)
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nit of ms. If the value is less than 15; the waiti
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ng time is the configurable value; Otherwise; the
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waiting time is twice the configurable value
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ng time is the configurable value; Otherwise; the
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waiting time is twice the configurable value
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FORCE_SEND_RESUME (BLOCK0) Set this bit to force ROM code to send a resume co = False R/W (0b0)
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mmand during SPI boot
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mmand during SPI boot
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Identity fuses:
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DISABLE_WAFER_VERSION_MAJOR (BLOCK0) Disables check of wafer version major = False R/W (0b0)
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DISABLE_BLK_VERSION_MAJOR (BLOCK0) Disables check of blk version major = False R/W (0b0)
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@@ -56,34 +56,34 @@
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BLK_VERSION_MINOR (BLOCK1) BLK_VERSION_MINOR = 2 R/W (0b010)
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WAFER_VERSION_MINOR_HI (BLOCK1) WAFER_VERSION_MINOR most significant bit = False R/W (0b0)
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WAFER_VERSION_MAJOR (BLOCK1) WAFER_VERSION_MAJOR = 0 R/W (0b00)
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OPTIONAL_UNIQUE_ID (BLOCK2) Optional unique 128-bit ID
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= 25 60 04 96 c3 fd 41 6f be ed 2c 51 1d e3 7e 21 R/W
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OPTIONAL_UNIQUE_ID (BLOCK2) Optional unique 128-bit ID
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= 25 60 04 96 c3 fd 41 6f be ed 2c 51 1d e3 7e 21 R/W
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BLK_VERSION_MAJOR (BLOCK2) BLK_VERSION_MAJOR of BLOCK2 = With calibration R/W (0b01)
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WAFER_VERSION_MINOR (BLOCK0) calc WAFER VERSION MINOR = WAFER_VERSION_MINOR_HI = 3 R/W (0x3)
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<< 3 + WAFER_VERSION_MINOR_LO (read only)
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<< 3 + WAFER_VERSION_MINOR_LO (read only)
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Jtag fuses:
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SOFT_DIS_JTAG (BLOCK0) Set these bits to disable JTAG in the soft way (od = 0 R/W (0b000)
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d number 1 means disable ). JTAG can be enabled in
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HMAC module
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HMAC module
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DIS_PAD_JTAG (BLOCK0) Set this bit to disable JTAG in the hard way. JTAG = False R/W (0b0)
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is disabled permanently
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is disabled permanently
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Mac fuses:
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MAC (BLOCK1) MAC address
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= 58:cf:79:0f:96:8c (OK) R/W
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CUSTOM_MAC (BLOCK3) Custom MAC address
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= 00:00:00:00:00:00 (OK) R/W
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MAC (BLOCK1) MAC address
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= 58:cf:79:0f:96:8c (OK) R/W
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CUSTOM_MAC (BLOCK3) Custom MAC address
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= 00:00:00:00:00:00 (OK) R/W
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Security fuses:
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DIS_DOWNLOAD_ICACHE (BLOCK0) Set this bit to disable Icache in download mode (b = False R/W (0b0)
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oot_mode[3:0] is 0; 1; 2; 3; 6; 7)
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oot_mode[3:0] is 0; 1; 2; 3; 6; 7)
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DIS_FORCE_DOWNLOAD (BLOCK0) Set this bit to disable the function that forces c = False R/W (0b0)
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hip into download mode
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hip into download mode
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DIS_DOWNLOAD_MANUAL_ENCRYPT (BLOCK0) Set this bit to disable flash encryption when in d = False R/W (0b0)
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ownload boot modes
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ownload boot modes
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SPI_BOOT_CRYPT_CNT (BLOCK0) Enables flash encryption when 1 or 3 bits are set = Disable R/W (0b000)
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and disables otherwise
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and disables otherwise
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SECURE_BOOT_KEY_REVOKE0 (BLOCK0) Revoke 1st secure boot key = False R/W (0b0)
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SECURE_BOOT_KEY_REVOKE1 (BLOCK0) Revoke 2nd secure boot key = False R/W (0b0)
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SECURE_BOOT_KEY_REVOKE2 (BLOCK0) Revoke 3rd secure boot key = False R/W (0b0)
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@@ -95,37 +95,37 @@
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KEY_PURPOSE_5 (BLOCK0) Purpose of Key5 = USER R/W (0x0)
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SECURE_BOOT_EN (BLOCK0) Set this bit to enable secure boot = False R/W (0b0)
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SECURE_BOOT_AGGRESSIVE_REVOKE (BLOCK0) Set this bit to enable revoking aggressive secure = False R/W (0b0)
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boot
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boot
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DIS_DOWNLOAD_MODE (BLOCK0) Set this bit to disable download mode (boot_mode[3 = False R/W (0b0)
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:0] = 0; 1; 2; 3; 6; 7)
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:0] = 0; 1; 2; 3; 6; 7)
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ENABLE_SECURITY_DOWNLOAD (BLOCK0) Set this bit to enable secure UART download mode = False R/W (0b0)
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SECURE_VERSION (BLOCK0) Secure version (used by ESP-IDF anti-rollback feat = 0 R/W (0x0000)
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ure)
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ure)
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BLOCK_KEY0 (BLOCK4)
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Purpose: USER
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Key0 or user data
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= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
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Key0 or user data
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= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
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BLOCK_KEY1 (BLOCK5)
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Purpose: USER
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Key1 or user data
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= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
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Key1 or user data
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= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
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BLOCK_KEY2 (BLOCK6)
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Purpose: USER
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Key2 or user data
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= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
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Key2 or user data
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= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
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BLOCK_KEY3 (BLOCK7)
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Purpose: USER
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Key3 or user data
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= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
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Key3 or user data
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= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
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BLOCK_KEY4 (BLOCK8)
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Purpose: USER
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Key4 or user data
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= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
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Key4 or user data
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= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
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BLOCK_KEY5 (BLOCK9)
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Purpose: USER
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Key5 or user data
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= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
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Key5 or user data
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= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
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Spi Pad fuses:
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SPI_PAD_CONFIG_CLK (BLOCK1) SPI PAD CLK = 0 R/W (0b000000)
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SPI_PAD_CONFIG_Q (BLOCK1) SPI PAD Q(D1) = 0 R/W (0b000000)
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@@ -138,21 +138,21 @@
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SPI_PAD_CONFIG_D5 (BLOCK1) SPI PAD D5 = 0 R/W (0b000000)
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SPI_PAD_CONFIG_D6 (BLOCK1) SPI PAD D6 = 0 R/W (0b000000)
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SPI_PAD_CONFIG_D7 (BLOCK1) SPI PAD D7 = 0 R/W (0b000000)
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Usb fuses:
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DIS_USB_JTAG (BLOCK0) Set this bit to disable function of usb switch to = False R/W (0b0)
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jtag in module of usb device
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jtag in module of usb device
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DIS_USB_SERIAL_JTAG (BLOCK0) USB-Serial-JTAG = Enable R/W (0b0)
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USB_EXCHG_PINS (BLOCK0) Set this bit to exchange USB D+ and D- pins = False R/W (0b0)
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DIS_USB_SERIAL_JTAG_ROM_PRINT (BLOCK0) USB printing = Enable R/W (0b0)
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DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE (BLOCK0) Disable UART download mode through USB-Serial-JTAG = False R/W (0b0)
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Vdd fuses:
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VDD_SPI_AS_GPIO (BLOCK0) Set this bit to vdd spi pin function as gpio = False R/W (0b0)
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Wdt fuses:
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WDT_DELAY_SEL (BLOCK0) RTC watchdog timeout threshold; in unit of slow cl = 40000 R/W (0b00)
|
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ock cycle
|
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ock cycle
|
||||
|
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|
||||
To get a dump for all eFuse registers.
|
||||
|
||||
@@ -5,7 +5,7 @@
|
||||
espefuse.py v4.6-dev
|
||||
Connecting....
|
||||
Detecting chip type... ESP32-C6
|
||||
|
||||
|
||||
=== Run "summary" command ===
|
||||
EFUSE_NAME (Block) Description = [Meaningful Value] [Readable/Writeable] (Hex Value)
|
||||
----------------------------------------------------------------------------------------
|
||||
@@ -13,31 +13,31 @@
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WR_DIS (BLOCK0) Disable programming of individual eFuses = 0 R/W (0x00000000)
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RD_DIS (BLOCK0) Disable reading from BlOCK4-10 = 0 R/W (0b0000000)
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SWAP_UART_SDIO_EN (BLOCK0) Represents whether pad of uart and sdio is swapped = False R/W (0b0)
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or not. 1: swapped. 0: not swapped
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or not. 1: swapped. 0: not swapped
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DIS_ICACHE (BLOCK0) Represents whether icache is disabled or enabled. = False R/W (0b0)
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1: disabled. 0: enabled
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1: disabled. 0: enabled
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DIS_TWAI (BLOCK0) Represents whether TWAI function is disabled or en = False R/W (0b0)
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abled. 1: disabled. 0: enabled
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abled. 1: disabled. 0: enabled
|
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DIS_DIRECT_BOOT (BLOCK0) Represents whether direct boot mode is disabled or = False R/W (0b0)
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enabled. 1: disabled. 0: enabled
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enabled. 1: disabled. 0: enabled
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UART_PRINT_CONTROL (BLOCK0) Set the default UARTboot message output mode = Enable R/W (0b00)
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||||
BLOCK_USR_DATA (BLOCK3) User data
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= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
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BLOCK_SYS_DATA2 (BLOCK10) System data part 2 (reserved)
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= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
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||||
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BLOCK_USR_DATA (BLOCK3) User data
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||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
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BLOCK_SYS_DATA2 (BLOCK10) System data part 2 (reserved)
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= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
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||||
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Flash fuses:
|
||||
FLASH_TPUW (BLOCK0) Represents the flash waiting time after power-up; = 0 R/W (0x0)
|
||||
in unit of ms. When the value less than 15; the wa
|
||||
iting time is the programmed value. Otherwise; the
|
||||
waiting time is 2 times the programmed value
|
||||
waiting time is 2 times the programmed value
|
||||
FORCE_SEND_RESUME (BLOCK0) Represents whether ROM code is forced to send a re = False R/W (0b0)
|
||||
sume command during SPI boot. 1: forced. 0:not for
|
||||
ced
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||||
ced
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||||
FLASH_CAP (BLOCK1) = 0 R/W (0b000)
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||||
FLASH_TEMP (BLOCK1) = 0 R/W (0b00)
|
||||
FLASH_VENDOR (BLOCK1) = 0 R/W (0b000)
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||||
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||||
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||||
Identity fuses:
|
||||
DISABLE_WAFER_VERSION_MAJOR (BLOCK0) Disables check of wafer version major = False R/W (0b0)
|
||||
DISABLE_BLK_VERSION_MAJOR (BLOCK0) Disables check of blk version major = False R/W (0b0)
|
||||
@@ -46,41 +46,41 @@
|
||||
PKG_VERSION (BLOCK1) Package version = 1 R/W (0b001)
|
||||
BLK_VERSION_MINOR (BLOCK1) BLK_VERSION_MINOR of BLOCK2 = 0 R/W (0b000)
|
||||
BLK_VERSION_MAJOR (BLOCK1) BLK_VERSION_MAJOR of BLOCK2 = 0 R/W (0b00)
|
||||
OPTIONAL_UNIQUE_ID (BLOCK2) Optional unique 128-bit ID
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
|
||||
OPTIONAL_UNIQUE_ID (BLOCK2) Optional unique 128-bit ID
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
|
||||
Jtag fuses:
|
||||
JTAG_SEL_ENABLE (BLOCK0) Represents whether the selection between usb_to_jt = False R/W (0b0)
|
||||
ag and pad_to_jtag through strapping gpio15 when b
|
||||
oth EFUSE_DIS_PAD_JTAG and EFUSE_DIS_USB_JTAG are
|
||||
equal to 0 is enabled or disabled. 1: enabled. 0:
|
||||
disabled
|
||||
oth EFUSE_DIS_PAD_JTAG and EFUSE_DIS_USB_JTAG are
|
||||
equal to 0 is enabled or disabled. 1: enabled. 0:
|
||||
disabled
|
||||
SOFT_DIS_JTAG (BLOCK0) Represents whether JTAG is disabled in soft way. O = 0 R/W (0b000)
|
||||
dd number: disabled. Even number: enabled
|
||||
dd number: disabled. Even number: enabled
|
||||
DIS_PAD_JTAG (BLOCK0) Represents whether JTAG is disabled in the hard wa = False R/W (0b0)
|
||||
y(permanently). 1: disabled. 0: enabled
|
||||
|
||||
y(permanently). 1: disabled. 0: enabled
|
||||
|
||||
Mac fuses:
|
||||
MAC (BLOCK1) MAC address
|
||||
= 60:55:f9:f7:52:9c (OK) R/W
|
||||
MAC_EXT (BLOCK1) Stores the extended bits of MAC address = 00:00 (OK) R/W
|
||||
CUSTOM_MAC (BLOCK3) Custom MAC
|
||||
= 00:00:00:00:00:00 (OK) R/W
|
||||
|
||||
MAC (BLOCK1) MAC address
|
||||
= 60:55:f9:f7:52:9c (OK) R/W
|
||||
MAC_EXT (BLOCK1) Stores the extended bits of MAC address = 00:00 (OK) R/W
|
||||
CUSTOM_MAC (BLOCK3) Custom MAC
|
||||
= 00:00:00:00:00:00 (OK) R/W
|
||||
|
||||
Security fuses:
|
||||
DIS_DOWNLOAD_ICACHE (BLOCK0) Represents whether icache is disabled or enabled i = False R/W (0b0)
|
||||
n Download mode. 1: disabled. 0: enabled
|
||||
n Download mode. 1: disabled. 0: enabled
|
||||
DIS_FORCE_DOWNLOAD (BLOCK0) Represents whether the function that forces chip i = False R/W (0b0)
|
||||
nto download mode is disabled or enabled. 1: disab
|
||||
led. 0: enabled
|
||||
led. 0: enabled
|
||||
SPI_DOWNLOAD_MSPI_DIS (BLOCK0) Represents whether SPI0 controller during boot_mod = False R/W (0b0)
|
||||
e_download is disabled or enabled. 1: disabled. 0:
|
||||
enabled
|
||||
enabled
|
||||
DIS_DOWNLOAD_MANUAL_ENCRYPT (BLOCK0) Represents whether flash encrypt function is disab = False R/W (0b0)
|
||||
led or enabled(except in SPI boot mode). 1: disabl
|
||||
ed. 0: enabled
|
||||
ed. 0: enabled
|
||||
SPI_BOOT_CRYPT_CNT (BLOCK0) Enables flash encryption when 1 or 3 bits are set = Disable R/W (0b000)
|
||||
and disables otherwise
|
||||
and disables otherwise
|
||||
SECURE_BOOT_KEY_REVOKE0 (BLOCK0) Revoke 1st secure boot key = False R/W (0b0)
|
||||
SECURE_BOOT_KEY_REVOKE1 (BLOCK0) Revoke 2nd secure boot key = False R/W (0b0)
|
||||
SECURE_BOOT_KEY_REVOKE2 (BLOCK0) Revoke 3rd secure boot key = False R/W (0b0)
|
||||
@@ -91,69 +91,69 @@
|
||||
KEY_PURPOSE_4 (BLOCK0) Represents the purpose of Key4 = USER R/W (0x0)
|
||||
KEY_PURPOSE_5 (BLOCK0) Represents the purpose of Key5 = USER R/W (0x0)
|
||||
SEC_DPA_LEVEL (BLOCK0) Represents the spa secure level by configuring the = 0 R/W (0b00)
|
||||
clock random divide mode
|
||||
clock random divide mode
|
||||
CRYPT_DPA_ENABLE (BLOCK0) Represents whether anti-dpa attack is enabled. 1:e = False R/W (0b0)
|
||||
nabled. 0: disabled
|
||||
nabled. 0: disabled
|
||||
SECURE_BOOT_EN (BLOCK0) Represents whether secure boot is enabled or disab = False R/W (0b0)
|
||||
led. 1: enabled. 0: disabled
|
||||
led. 1: enabled. 0: disabled
|
||||
SECURE_BOOT_AGGRESSIVE_REVOKE (BLOCK0) Represents whether revoking aggressive secure boot = False R/W (0b0)
|
||||
is enabled or disabled. 1: enabled. 0: disabled
|
||||
is enabled or disabled. 1: enabled. 0: disabled
|
||||
DIS_DOWNLOAD_MODE (BLOCK0) Represents whether Download mode is disabled or en = False R/W (0b0)
|
||||
abled. 1: disabled. 0: enabled
|
||||
abled. 1: disabled. 0: enabled
|
||||
ENABLE_SECURITY_DOWNLOAD (BLOCK0) Represents whether security download is enabled or = False R/W (0b0)
|
||||
disabled. 1: enabled. 0: disabled
|
||||
disabled. 1: enabled. 0: disabled
|
||||
SECURE_VERSION (BLOCK0) Represents the version used by ESP-IDF anti-rollba = 0 R/W (0x0000)
|
||||
ck feature
|
||||
ck feature
|
||||
SECURE_BOOT_DISABLE_FAST_WAKE (BLOCK0) Represents whether FAST VERIFY ON WAKE is disabled = False R/W (0b0)
|
||||
or enabled when Secure Boot is enabled. 1: disabl
|
||||
ed. 0: enabled
|
||||
ed. 0: enabled
|
||||
BLOCK_KEY0 (BLOCK4)
|
||||
Purpose: USER
|
||||
Key0 or user data
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
Key0 or user data
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
BLOCK_KEY1 (BLOCK5)
|
||||
Purpose: USER
|
||||
Key1 or user data
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
Key1 or user data
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
BLOCK_KEY2 (BLOCK6)
|
||||
Purpose: USER
|
||||
Key2 or user data
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
Key2 or user data
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
BLOCK_KEY3 (BLOCK7)
|
||||
Purpose: USER
|
||||
Key3 or user data
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
Key3 or user data
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
BLOCK_KEY4 (BLOCK8)
|
||||
Purpose: USER
|
||||
Key4 or user data
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
Key4 or user data
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
BLOCK_KEY5 (BLOCK9)
|
||||
Purpose: USER
|
||||
Key5 or user data
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
|
||||
Key5 or user data
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
|
||||
Usb fuses:
|
||||
DIS_USB_JTAG (BLOCK0) Represents whether the function of usb switch to j = False R/W (0b0)
|
||||
tag is disabled or enabled. 1: disabled. 0: enable
|
||||
d
|
||||
d
|
||||
DIS_USB_SERIAL_JTAG (BLOCK0) Represents whether USB-Serial-JTAG is disabled or = False R/W (0b0)
|
||||
enabled. 1: disabled. 0: enabled
|
||||
enabled. 1: disabled. 0: enabled
|
||||
USB_EXCHG_PINS (BLOCK0) Represents whether the D+ and D- pins is exchanged = False R/W (0b0)
|
||||
. 1: exchanged. 0: not exchanged
|
||||
. 1: exchanged. 0: not exchanged
|
||||
DIS_USB_SERIAL_JTAG_ROM_PRINT (BLOCK0) Represents whether print from USB-Serial-JTAG is d = False R/W (0b0)
|
||||
isabled or enabled. 1: disabled. 0: enabled
|
||||
isabled or enabled. 1: disabled. 0: enabled
|
||||
DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE (BLOCK0) Represents whether the USB-Serial-JTAG download fu = False R/W (0b0)
|
||||
nction is disabled or enabled. 1: disabled. 0: ena
|
||||
bled
|
||||
|
||||
bled
|
||||
|
||||
Vdd fuses:
|
||||
VDD_SPI_AS_GPIO (BLOCK0) Represents whether vdd spi pin is functioned as gp = False R/W (0b0)
|
||||
io. 1: functioned. 0: not functioned
|
||||
|
||||
io. 1: functioned. 0: not functioned
|
||||
|
||||
Wdt fuses:
|
||||
WDT_DELAY_SEL (BLOCK0) Represents whether RTC watchdog timeout threshold = 0 R/W (0b00)
|
||||
is selected at startup. 1: selected. 0: not select
|
||||
ed
|
||||
ed
|
||||
|
||||
|
||||
To get a dump for all eFuse registers.
|
||||
|
||||
@@ -5,7 +5,7 @@
|
||||
espefuse.py v4.6-dev
|
||||
Connecting....
|
||||
Detecting chip type... ESP32-H2
|
||||
|
||||
|
||||
=== Run "summary" command ===
|
||||
EFUSE_NAME (Block) Description = [Meaningful Value] [Readable/Writeable] (Hex Value)
|
||||
----------------------------------------------------------------------------------------
|
||||
@@ -13,73 +13,73 @@
|
||||
WR_DIS (BLOCK0) Disable programming of individual eFuses = 0 R/W (0x00000000)
|
||||
RD_DIS (BLOCK0) Disable reading from BlOCK4-10 = 0 R/W (0b0000000)
|
||||
DIS_ICACHE (BLOCK0) Represents whether icache is disabled or enabled. = False R/W (0b0)
|
||||
1: disabled. 0: enabled
|
||||
1: disabled. 0: enabled
|
||||
POWERGLITCH_EN (BLOCK0) Represents whether power glitch function is enable = False R/W (0b0)
|
||||
d. 1: enabled. 0: disabled
|
||||
d. 1: enabled. 0: disabled
|
||||
DIS_TWAI (BLOCK0) Represents whether TWAI function is disabled or en = False R/W (0b0)
|
||||
abled. 1: disabled. 0: enabled
|
||||
abled. 1: disabled. 0: enabled
|
||||
DIS_DIRECT_BOOT (BLOCK0) Represents whether direct boot mode is disabled or = False R/W (0b0)
|
||||
enabled. 1: disabled. 0: enabled
|
||||
enabled. 1: disabled. 0: enabled
|
||||
UART_PRINT_CONTROL (BLOCK0) Set the default UARTboot message output mode = Enable R/W (0b00)
|
||||
HYS_EN_PAD0 (BLOCK0) Set bits to enable hysteresis function of PAD0~5 = 0 R/W (0b000000)
|
||||
HYS_EN_PAD1 (BLOCK0) Set bits to enable hysteresis function of PAD6~27 = 0 R/W (0b0000000000000000000000)
|
||||
BLOCK_USR_DATA (BLOCK3) User data
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
BLOCK_SYS_DATA2 (BLOCK10) System data part 2 (reserved)
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
|
||||
BLOCK_USR_DATA (BLOCK3) User data
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
BLOCK_SYS_DATA2 (BLOCK10) System data part 2 (reserved)
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
|
||||
Flash fuses:
|
||||
FLASH_TPUW (BLOCK0) Represents the flash waiting time after power-up; = 0 R/W (0x0)
|
||||
in unit of ms. When the value less than 15; the wa
|
||||
iting time is the programmed value. Otherwise; the
|
||||
waiting time is 2 times the programmed value
|
||||
waiting time is 2 times the programmed value
|
||||
FORCE_SEND_RESUME (BLOCK0) Represents whether ROM code is forced to send a re = False R/W (0b0)
|
||||
sume command during SPI boot. 1: forced. 0:not for
|
||||
ced
|
||||
ced
|
||||
FLASH_CAP (BLOCK1) = 0 R/W (0b000)
|
||||
FLASH_TEMP (BLOCK1) = 0 R/W (0b00)
|
||||
FLASH_VENDOR (BLOCK1) = 0 R/W (0b000)
|
||||
|
||||
|
||||
Identity fuses:
|
||||
WAFER_VERSION_MINOR (BLOCK1) = 0 R/W (0b000)
|
||||
WAFER_VERSION_MAJOR (BLOCK1) = 0 R/W (0b00)
|
||||
DISABLE_WAFER_VERSION_MAJOR (BLOCK1) Disables check of wafer version major = False R/W (0b0)
|
||||
PKG_VERSION (BLOCK1) Package version = 0 R/W (0b000)
|
||||
OPTIONAL_UNIQUE_ID (BLOCK2) Optional unique 128-bit ID
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
OPTIONAL_UNIQUE_ID (BLOCK2) Optional unique 128-bit ID
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
BLK_VERSION_MINOR (BLOCK2) BLK_VERSION_MINOR of BLOCK2 = 0 R/W (0b000)
|
||||
BLK_VERSION_MAJOR (BLOCK2) BLK_VERSION_MAJOR of BLOCK2 = 0 R/W (0b00)
|
||||
DISABLE_BLK_VERSION_MAJOR (BLOCK2) Disables check of blk version major = False R/W (0b0)
|
||||
|
||||
|
||||
Jtag fuses:
|
||||
JTAG_SEL_ENABLE (BLOCK0) Set this bit to enable selection between usb_to_jt = False R/W (0b0)
|
||||
ag and pad_to_jtag through strapping gpio25 when b
|
||||
oth EFUSE_DIS_PAD_JTAG and EFUSE_DIS_USB_JTAG are
|
||||
equal to 0
|
||||
oth EFUSE_DIS_PAD_JTAG and EFUSE_DIS_USB_JTAG are
|
||||
equal to 0
|
||||
SOFT_DIS_JTAG (BLOCK0) Represents whether JTAG is disabled in soft way. O = 0 R/W (0b000)
|
||||
dd number: disabled. Even number: enabled
|
||||
dd number: disabled. Even number: enabled
|
||||
DIS_PAD_JTAG (BLOCK0) Represents whether JTAG is disabled in the hard wa = False R/W (0b0)
|
||||
y(permanently). 1: disabled. 0: enabled
|
||||
|
||||
y(permanently). 1: disabled. 0: enabled
|
||||
|
||||
Mac fuses:
|
||||
MAC (BLOCK1) MAC address
|
||||
= 60:55:f9:f7:2c:a2:ff:fe (OK) R/W
|
||||
MAC_EXT (BLOCK1) Stores the extended bits of MAC address = ff:fe (OK) R/W
|
||||
CUSTOM_MAC (BLOCK3) Custom MAC
|
||||
= 00:00:00:00:00:00:ff:fe (OK) R/W
|
||||
|
||||
MAC (BLOCK1) MAC address
|
||||
= 60:55:f9:f7:2c:a2:ff:fe (OK) R/W
|
||||
MAC_EXT (BLOCK1) Stores the extended bits of MAC address = ff:fe (OK) R/W
|
||||
CUSTOM_MAC (BLOCK3) Custom MAC
|
||||
= 00:00:00:00:00:00:ff:fe (OK) R/W
|
||||
|
||||
Security fuses:
|
||||
DIS_FORCE_DOWNLOAD (BLOCK0) Represents whether the function that forces chip i = False R/W (0b0)
|
||||
nto download mode is disabled or enabled. 1: disab
|
||||
led. 0: enabled
|
||||
led. 0: enabled
|
||||
SPI_DOWNLOAD_MSPI_DIS (BLOCK0) Represents whether SPI0 controller during boot_mod = False R/W (0b0)
|
||||
e_download is disabled or enabled. 1: disabled. 0:
|
||||
enabled
|
||||
enabled
|
||||
DIS_DOWNLOAD_MANUAL_ENCRYPT (BLOCK0) Represents whether flash encrypt function is disab = False R/W (0b0)
|
||||
led or enabled(except in SPI boot mode). 1: disabl
|
||||
ed. 0: enabled
|
||||
ed. 0: enabled
|
||||
SPI_BOOT_CRYPT_CNT (BLOCK0) Enables flash encryption when 1 or 3 bits are set = Disable R/W (0b000)
|
||||
and disables otherwise
|
||||
and disables otherwise
|
||||
SECURE_BOOT_KEY_REVOKE0 (BLOCK0) Revoke 1st secure boot key = False R/W (0b0)
|
||||
SECURE_BOOT_KEY_REVOKE1 (BLOCK0) Revoke 2nd secure boot key = False R/W (0b0)
|
||||
SECURE_BOOT_KEY_REVOKE2 (BLOCK0) Revoke 3rd secure boot key = False R/W (0b0)
|
||||
@@ -90,70 +90,70 @@
|
||||
KEY_PURPOSE_4 (BLOCK0) Represents the purpose of Key4 = USER R/W (0x0)
|
||||
KEY_PURPOSE_5 (BLOCK0) Represents the purpose of Key5 = USER R/W (0x0)
|
||||
SEC_DPA_LEVEL (BLOCK0) Represents the spa secure level by configuring the = 0 R/W (0b00)
|
||||
clock random divide mode
|
||||
clock random divide mode
|
||||
ECDSA_FORCE_USE_HARDWARE_K (BLOCK0) Represents whether hardware random number k is for = False R/W (0b0)
|
||||
ced used in ESDCA. 1: force used. 0: not force use
|
||||
d
|
||||
d
|
||||
CRYPT_DPA_ENABLE (BLOCK0) Represents whether anti-dpa attack is enabled. 1:e = False R/W (0b0)
|
||||
nabled. 0: disabled
|
||||
nabled. 0: disabled
|
||||
SECURE_BOOT_EN (BLOCK0) Represents whether secure boot is enabled or disab = False R/W (0b0)
|
||||
led. 1: enabled. 0: disabled
|
||||
led. 1: enabled. 0: disabled
|
||||
SECURE_BOOT_AGGRESSIVE_REVOKE (BLOCK0) Represents whether revoking aggressive secure boot = False R/W (0b0)
|
||||
is enabled or disabled. 1: enabled. 0: disabled
|
||||
is enabled or disabled. 1: enabled. 0: disabled
|
||||
DIS_DOWNLOAD_MODE (BLOCK0) Represents whether Download mode is disabled or en = False R/W (0b0)
|
||||
abled. 1: disabled. 0: enabled
|
||||
abled. 1: disabled. 0: enabled
|
||||
ENABLE_SECURITY_DOWNLOAD (BLOCK0) Represents whether security download is enabled or = False R/W (0b0)
|
||||
disabled. 1: enabled. 0: disabled
|
||||
disabled. 1: enabled. 0: disabled
|
||||
SECURE_VERSION (BLOCK0) Represents the version used by ESP-IDF anti-rollba = 0 R/W (0x0000)
|
||||
ck feature
|
||||
ck feature
|
||||
SECURE_BOOT_DISABLE_FAST_WAKE (BLOCK0) Represents whether FAST VERIFY ON WAKE is disabled = False R/W (0b0)
|
||||
or enabled when Secure Boot is enabled. 1: disabl
|
||||
ed. 0: enabled
|
||||
ed. 0: enabled
|
||||
BLOCK_KEY0 (BLOCK4)
|
||||
Purpose: USER
|
||||
Key0 or user data
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
Key0 or user data
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
BLOCK_KEY1 (BLOCK5)
|
||||
Purpose: USER
|
||||
Key1 or user data
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
Key1 or user data
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
BLOCK_KEY2 (BLOCK6)
|
||||
Purpose: USER
|
||||
Key2 or user data
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
Key2 or user data
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
BLOCK_KEY3 (BLOCK7)
|
||||
Purpose: USER
|
||||
Key3 or user data
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
Key3 or user data
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
BLOCK_KEY4 (BLOCK8)
|
||||
Purpose: USER
|
||||
Key4 or user data
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
Key4 or user data
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
BLOCK_KEY5 (BLOCK9)
|
||||
Purpose: USER
|
||||
Key5 or user data
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
|
||||
Key5 or user data
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
|
||||
Usb fuses:
|
||||
DIS_USB_JTAG (BLOCK0) Represents whether the function of usb switch to j = False R/W (0b0)
|
||||
tag is disabled or enabled. 1: disabled. 0: enable
|
||||
d
|
||||
d
|
||||
USB_EXCHG_PINS (BLOCK0) Represents whether the D+ and D- pins is exchanged = False R/W (0b0)
|
||||
. 1: exchanged. 0: not exchanged
|
||||
. 1: exchanged. 0: not exchanged
|
||||
DIS_USB_SERIAL_JTAG_ROM_PRINT (BLOCK0) Set this bit to disable USB-Serial-JTAG print duri = False R/W (0b0)
|
||||
ng rom boot
|
||||
ng rom boot
|
||||
DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE (BLOCK0) Represents whether the USB-Serial-JTAG download fu = False R/W (0b0)
|
||||
nction is disabled or enabled. 1: disabled. 0: ena
|
||||
bled
|
||||
|
||||
bled
|
||||
|
||||
Vdd fuses:
|
||||
VDD_SPI_AS_GPIO (BLOCK0) Represents whether vdd spi pin is functioned as gp = False R/W (0b0)
|
||||
io. 1: functioned. 0: not functioned
|
||||
|
||||
io. 1: functioned. 0: not functioned
|
||||
|
||||
Wdt fuses:
|
||||
WDT_DELAY_SEL (BLOCK0) Represents whether RTC watchdog timeout threshold = 0 R/W (0b00)
|
||||
is selected at startup. 1: selected. 0: not select
|
||||
ed
|
||||
ed
|
||||
|
||||
|
||||
To get a dump for all eFuse registers.
|
||||
|
||||
@@ -5,7 +5,7 @@
|
||||
espefuse.py v4.7.dev1
|
||||
Connecting....
|
||||
Detecting chip type... ESP32-P4
|
||||
|
||||
|
||||
=== Run "summary" command ===
|
||||
EFUSE_NAME (Block) Description = [Meaningful Value] [Readable/Writeable] (Hex Value)
|
||||
----------------------------------------------------------------------------------------
|
||||
@@ -13,27 +13,27 @@
|
||||
WR_DIS (BLOCK0) Disable programming of individual eFuses = 0 R/W (0x00000000)
|
||||
RD_DIS (BLOCK0) Disable reading from BlOCK4-10 = 0 R/W (0b0000000)
|
||||
POWERGLITCH_EN (BLOCK0) Represents whether power glitch function is enable = False R/W (0b0)
|
||||
d. 1: enabled. 0: disabled
|
||||
d. 1: enabled. 0: disabled
|
||||
DIS_TWAI (BLOCK0) Represents whether TWAI function is disabled or en = False R/W (0b0)
|
||||
abled. 1: disabled. 0: enabled
|
||||
abled. 1: disabled. 0: enabled
|
||||
KM_HUK_GEN_STATE_LOW (BLOCK0) Set this bit to control validation of HUK generate = 0 R/W (0b000000)
|
||||
mode. Odd of 1 is invalid; even of 1 is valid
|
||||
mode. Odd of 1 is invalid; even of 1 is valid
|
||||
KM_HUK_GEN_STATE_HIGH (BLOCK0) Set this bit to control validation of HUK generate = 0 R/W (0b000)
|
||||
mode. Odd of 1 is invalid; even of 1 is valid
|
||||
mode. Odd of 1 is invalid; even of 1 is valid
|
||||
KM_RND_SWITCH_CYCLE (BLOCK0) Set bits to control key manager random number swit = 0 R/W (0b00)
|
||||
ch cycle. 0: control by register. 1: 8 km clk cycl
|
||||
es. 2: 16 km cycles. 3: 32 km cycles
|
||||
es. 2: 16 km cycles. 3: 32 km cycles
|
||||
KM_DEPLOY_ONLY_ONCE (BLOCK0) Set each bit to control whether corresponding key = 0 R/W (0x0)
|
||||
can only be deployed once. 1 is true; 0 is false.
|
||||
Bit0: ecdsa. Bit1: xts. Bit2: hmac. Bit3: ds
|
||||
can only be deployed once. 1 is true; 0 is false.
|
||||
Bit0: ecdsa. Bit1: xts. Bit2: hmac. Bit3: ds
|
||||
DIS_DIRECT_BOOT (BLOCK0) Represents whether direct boot mode is disabled or = False R/W (0b0)
|
||||
enabled. 1: disabled. 0: enabled
|
||||
enabled. 1: disabled. 0: enabled
|
||||
UART_PRINT_CONTROL (BLOCK0) Represents the type of UART printing. 00: force en = 0 R/W (0b00)
|
||||
able printing. 01: enable printing when GPIO8 is r
|
||||
eset at low level. 10: enable printing when GPIO8
|
||||
eset at low level. 10: enable printing when GPIO8
|
||||
is reset at high level. 11: force disable printing
|
||||
HYS_EN_PAD (BLOCK0) Represents whether the hysteresis function of corr = False R/W (0b0)
|
||||
esponding PAD is enabled. 1: enabled. 0:disabled
|
||||
esponding PAD is enabled. 1: enabled. 0:disabled
|
||||
DCDC_VSET (BLOCK0) Set the dcdc voltage default = 0 R/W (0b00000)
|
||||
PXA0_TIEH_SEL_0 (BLOCK0) TBD = 0 R/W (0b00)
|
||||
PXA0_TIEH_SEL_1 (BLOCK0) TBD = 0 R/W (0b00)
|
||||
@@ -43,63 +43,63 @@
|
||||
HP_PWR_SRC_SEL (BLOCK0) HP system power source select. 0:LDO. 1: DCDC = False R/W (0b0)
|
||||
DCDC_VSET_EN (BLOCK0) Select dcdc vset use efuse_dcdc_vset = False R/W (0b0)
|
||||
DIS_SWD (BLOCK0) Set this bit to disable super-watchdog = False R/W (0b0)
|
||||
BLOCK_SYS_DATA1 (BLOCK2) System data part 1
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
BLOCK_USR_DATA (BLOCK3) User data
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
BLOCK_SYS_DATA2 (BLOCK10) System data part 2 (reserved)
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
|
||||
BLOCK_SYS_DATA1 (BLOCK2) System data part 1
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
BLOCK_USR_DATA (BLOCK3) User data
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
BLOCK_SYS_DATA2 (BLOCK10) System data part 2 (reserved)
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
|
||||
Flash fuses:
|
||||
FLASH_TYPE (BLOCK0) The type of interfaced flash. 0: four data lines; = False R/W (0b0)
|
||||
1: eight data lines
|
||||
1: eight data lines
|
||||
FLASH_PAGE_SIZE (BLOCK0) Set flash page size = 0 R/W (0b00)
|
||||
FLASH_ECC_EN (BLOCK0) Set this bit to enable ecc for flash boot = False R/W (0b0)
|
||||
FLASH_TPUW (BLOCK0) Represents the flash waiting time after power-up; = 0 R/W (0x0)
|
||||
in unit of ms. When the value less than 15; the wa
|
||||
iting time is the programmed value. Otherwise; the
|
||||
waiting time is 2 times the programmed value
|
||||
waiting time is 2 times the programmed value
|
||||
FORCE_SEND_RESUME (BLOCK0) Represents whether ROM code is forced to send a re = False R/W (0b0)
|
||||
sume command during SPI boot. 1: forced. 0:not for
|
||||
ced
|
||||
|
||||
ced
|
||||
|
||||
Jtag fuses:
|
||||
JTAG_SEL_ENABLE (BLOCK0) Represents whether the selection between usb_to_jt = False R/W (0b0)
|
||||
ag and pad_to_jtag through strapping gpio15 when b
|
||||
oth EFUSE_DIS_PAD_JTAG and EFUSE_DIS_USB_JTAG are
|
||||
equal to 0 is enabled or disabled. 1: enabled. 0:
|
||||
disabled
|
||||
oth EFUSE_DIS_PAD_JTAG and EFUSE_DIS_USB_JTAG are
|
||||
equal to 0 is enabled or disabled. 1: enabled. 0:
|
||||
disabled
|
||||
SOFT_DIS_JTAG (BLOCK0) Represents whether JTAG is disabled in soft way. O = 0 R/W (0b000)
|
||||
dd number: disabled. Even number: enabled
|
||||
dd number: disabled. Even number: enabled
|
||||
DIS_PAD_JTAG (BLOCK0) Represents whether JTAG is disabled in the hard wa = False R/W (0b0)
|
||||
y(permanently). 1: disabled. 0: enabled
|
||||
|
||||
y(permanently). 1: disabled. 0: enabled
|
||||
|
||||
Mac fuses:
|
||||
MAC (BLOCK1) MAC address
|
||||
= 00:00:00:00:00:00 (OK) R/W
|
||||
MAC_EXT (BLOCK1) Stores the extended bits of MAC address = 00:00 (OK) R/W
|
||||
MAC (BLOCK1) MAC address
|
||||
= 00:00:00:00:00:00 (OK) R/W
|
||||
MAC_EXT (BLOCK1) Stores the extended bits of MAC address = 00:00 (OK) R/W
|
||||
MAC_EUI64 (BLOCK1) calc MAC_EUI64 = MAC[0]:MAC[1]:MAC[2]:MAC_EXT[0]:M
|
||||
= 00:00:00:00:00:00:00:00 (OK) R/W
|
||||
AC_EXT[1]:MAC[3]:MAC[4]:MAC[5]
|
||||
|
||||
= 00:00:00:00:00:00:00:00 (OK) R/W
|
||||
AC_EXT[1]:MAC[3]:MAC[4]:MAC[5]
|
||||
|
||||
Security fuses:
|
||||
DIS_FORCE_DOWNLOAD (BLOCK0) Represents whether the function that forces chip i = False R/W (0b0)
|
||||
nto download mode is disabled or enabled. 1: disab
|
||||
led. 0: enabled
|
||||
led. 0: enabled
|
||||
SPI_DOWNLOAD_MSPI_DIS (BLOCK0) Set this bit to disable accessing MSPI flash/MSPI = False R/W (0b0)
|
||||
ram by SYS AXI matrix during boot_mode_download
|
||||
ram by SYS AXI matrix during boot_mode_download
|
||||
DIS_DOWNLOAD_MANUAL_ENCRYPT (BLOCK0) Represents whether flash encrypt function is disab = False R/W (0b0)
|
||||
led or enabled(except in SPI boot mode). 1: disabl
|
||||
ed. 0: enabled
|
||||
ed. 0: enabled
|
||||
FORCE_USE_KEY_MANAGER_KEY (BLOCK0) Set each bit to control whether corresponding key = 0 R/W (0x0)
|
||||
must come from key manager.. 1 is true; 0 is false
|
||||
. Bit0: ecdsa. Bit1: xts. Bit2: hmac. Bit3: ds
|
||||
. Bit0: ecdsa. Bit1: xts. Bit2: hmac. Bit3: ds
|
||||
FORCE_DISABLE_SW_INIT_KEY (BLOCK0) Set this bit to disable software written init key; = False R/W (0b0)
|
||||
and force use efuse_init_key
|
||||
and force use efuse_init_key
|
||||
XTS_KEY_LENGTH_256 (BLOCK0) Set this bit to configure flash encryption use xts = False R/W (0b0)
|
||||
-128 key; else use xts-256 key
|
||||
-128 key; else use xts-256 key
|
||||
SPI_BOOT_CRYPT_CNT (BLOCK0) Enables flash encryption when 1 or 3 bits are set = Disable R/W (0b000)
|
||||
and disables otherwise
|
||||
and disables otherwise
|
||||
SECURE_BOOT_KEY_REVOKE0 (BLOCK0) Revoke 1st secure boot key = False R/W (0b0)
|
||||
SECURE_BOOT_KEY_REVOKE1 (BLOCK0) Revoke 2nd secure boot key = False R/W (0b0)
|
||||
SECURE_BOOT_KEY_REVOKE2 (BLOCK0) Revoke 3rd secure boot key = False R/W (0b0)
|
||||
@@ -110,69 +110,69 @@
|
||||
KEY_PURPOSE_4 (BLOCK0) Represents the purpose of Key4 = USER R/W (0x0)
|
||||
KEY_PURPOSE_5 (BLOCK0) Represents the purpose of Key5 = USER R/W (0x0)
|
||||
SEC_DPA_LEVEL (BLOCK0) Represents the spa secure level by configuring the = 0 R/W (0b00)
|
||||
clock random divide mode
|
||||
clock random divide mode
|
||||
ECDSA_ENABLE_SOFT_K (BLOCK0) Represents whether hardware random number k is for = False R/W (0b0)
|
||||
ced used in ESDCA. 1: force used. 0: not force use
|
||||
d
|
||||
d
|
||||
CRYPT_DPA_ENABLE (BLOCK0) Represents whether anti-dpa attack is enabled. 1:e = False R/W (0b0)
|
||||
nabled. 0: disabled
|
||||
nabled. 0: disabled
|
||||
SECURE_BOOT_EN (BLOCK0) Represents whether secure boot is enabled or disab = False R/W (0b0)
|
||||
led. 1: enabled. 0: disabled
|
||||
led. 1: enabled. 0: disabled
|
||||
SECURE_BOOT_AGGRESSIVE_REVOKE (BLOCK0) Represents whether revoking aggressive secure boot = False R/W (0b0)
|
||||
is enabled or disabled. 1: enabled. 0: disabled
|
||||
is enabled or disabled. 1: enabled. 0: disabled
|
||||
DIS_DOWNLOAD_MODE (BLOCK0) Represents whether Download mode is disabled or en = False R/W (0b0)
|
||||
abled. 1: disabled. 0: enabled
|
||||
abled. 1: disabled. 0: enabled
|
||||
LOCK_KM_KEY (BLOCK0) TBD = False R/W (0b0)
|
||||
ENABLE_SECURITY_DOWNLOAD (BLOCK0) Represents whether security download is enabled or = False R/W (0b0)
|
||||
disabled. 1: enabled. 0: disabled
|
||||
disabled. 1: enabled. 0: disabled
|
||||
SECURE_VERSION (BLOCK0) Represents the version used by ESP-IDF anti-rollba = 0 R/W (0x0000)
|
||||
ck feature
|
||||
ck feature
|
||||
SECURE_BOOT_DISABLE_FAST_WAKE (BLOCK0) Represents whether FAST VERIFY ON WAKE is disabled = False R/W (0b0)
|
||||
or enabled when Secure Boot is enabled. 1: disabl
|
||||
ed. 0: enabled
|
||||
ed. 0: enabled
|
||||
BLOCK_KEY0 (BLOCK4)
|
||||
Purpose: USER
|
||||
Key0 or user data
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
Key0 or user data
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
BLOCK_KEY1 (BLOCK5)
|
||||
Purpose: USER
|
||||
Key1 or user data
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
Key1 or user data
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
BLOCK_KEY2 (BLOCK6)
|
||||
Purpose: USER
|
||||
Key2 or user data
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
Key2 or user data
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
BLOCK_KEY3 (BLOCK7)
|
||||
Purpose: USER
|
||||
Key3 or user data
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
Key3 or user data
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
BLOCK_KEY4 (BLOCK8)
|
||||
Purpose: USER
|
||||
Key4 or user data
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
Key4 or user data
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
BLOCK_KEY5 (BLOCK9)
|
||||
Purpose: USER
|
||||
Key5 or user data
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
|
||||
Key5 or user data
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
|
||||
Usb fuses:
|
||||
USB_DEVICE_EXCHG_PINS (BLOCK0) Enable usb device exchange pins of D+ and D- = False R/W (0b0)
|
||||
USB_OTG11_EXCHG_PINS (BLOCK0) Enable usb otg11 exchange pins of D+ and D- = False R/W (0b0)
|
||||
DIS_USB_JTAG (BLOCK0) Represents whether the function of usb switch to j = False R/W (0b0)
|
||||
tag is disabled or enabled. 1: disabled. 0: enable
|
||||
d
|
||||
d
|
||||
USB_PHY_SEL (BLOCK0) TBD = False R/W (0b0)
|
||||
DIS_USB_OTG_DOWNLOAD_MODE (BLOCK0) Set this bit to disable download via USB-OTG = False R/W (0b0)
|
||||
DIS_USB_SERIAL_JTAG_ROM_PRINT (BLOCK0) Represents whether print from USB-Serial-JTAG is d = False R/W (0b0)
|
||||
isabled or enabled. 1: disabled. 0: enabled
|
||||
isabled or enabled. 1: disabled. 0: enabled
|
||||
DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE (BLOCK0) Represents whether the USB-Serial-JTAG download fu = False R/W (0b0)
|
||||
nction is disabled or enabled. 1: disabled. 0: ena
|
||||
bled
|
||||
|
||||
bled
|
||||
|
||||
Wdt fuses:
|
||||
WDT_DELAY_SEL (BLOCK0) Represents whether RTC watchdog timeout threshold = 0 R/W (0b00)
|
||||
is selected at startup. 1: selected. 0: not select
|
||||
ed
|
||||
ed
|
||||
DIS_WDT (BLOCK0) Set this bit to disable watch dog = False R/W (0b0)
|
||||
|
||||
|
||||
|
||||
@@ -6,7 +6,7 @@
|
||||
Connecting....
|
||||
Detecting chip type... Unsupported detection protocol, switching and trying again...
|
||||
Detecting chip type... ESP32-S2
|
||||
|
||||
|
||||
=== Run "summary" command ===
|
||||
EFUSE_NAME (Block) Description = [Meaningful Value] [Readable/Writeable] (Hex Value)
|
||||
----------------------------------------------------------------------------------------
|
||||
@@ -16,29 +16,29 @@
|
||||
DIS_ICACHE (BLOCK0) Set this bit to disable Icache = False R/W (0b0)
|
||||
DIS_DCACHE (BLOCK0) Set this bit to disable Dcache = False R/W (0b0)
|
||||
DIS_TWAI (BLOCK0) Set this bit to disable the TWAI Controller functi = False R/W (0b0)
|
||||
on
|
||||
on
|
||||
DIS_BOOT_REMAP (BLOCK0) Disables capability to Remap RAM to ROM address sp = False R/W (0b0)
|
||||
ace
|
||||
ace
|
||||
DIS_LEGACY_SPI_BOOT (BLOCK0) Set this bit to disable Legacy SPI boot mode = False R/W (0b0)
|
||||
UART_PRINT_CHANNEL (BLOCK0) Selects the default UART for printing boot message = UART0 R/W (0b0)
|
||||
s
|
||||
s
|
||||
UART_PRINT_CONTROL (BLOCK0) Set the default UART boot message output mode = Enable R/W (0b00)
|
||||
PIN_POWER_SELECTION (BLOCK0) Set default power supply for GPIO33-GPIO37; set wh = VDD3P3_CPU R/W (0b0)
|
||||
en SPI flash is initialized
|
||||
BLOCK_USR_DATA (BLOCK3) User data
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
BLOCK_SYS_DATA2 (BLOCK10) System data part 2 (reserved)
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
|
||||
en SPI flash is initialized
|
||||
BLOCK_USR_DATA (BLOCK3) User data
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
BLOCK_SYS_DATA2 (BLOCK10) System data part 2 (reserved)
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
|
||||
Flash fuses:
|
||||
FLASH_TPUW (BLOCK0) Configures flash startup delay after SoC power-up; = 0 R/W (0x0)
|
||||
in unit of (ms/2). When the value is 15; delay is
|
||||
7.5 ms
|
||||
7.5 ms
|
||||
FLASH_TYPE (BLOCK0) SPI flash type = 4 data lines R/W (0b0)
|
||||
FORCE_SEND_RESUME (BLOCK0) If set; forces ROM code to send an SPI flash resum = False R/W (0b0)
|
||||
e command during SPI boot
|
||||
e command during SPI boot
|
||||
FLASH_VERSION (BLOCK1) Flash version = 2 R/W (0x2)
|
||||
|
||||
|
||||
Identity fuses:
|
||||
BLOCK0_VERSION (BLOCK0) BLOCK0 efuse version = 0 R/W (0b00)
|
||||
DISABLE_WAFER_VERSION_MAJOR (BLOCK0) Disables check of wafer version major = False R/W (0b0)
|
||||
@@ -49,32 +49,32 @@
|
||||
PSRAM_VERSION (BLOCK1) PSRAM version = 1 R/W (0x1)
|
||||
PKG_VERSION (BLOCK1) Package version = 0 R/W (0x0)
|
||||
WAFER_VERSION_MINOR_LO (BLOCK1) WAFER_VERSION_MINOR least significant bits = 0 R/W (0b000)
|
||||
OPTIONAL_UNIQUE_ID (BLOCK2) Optional unique 128-bit ID
|
||||
= ea 0e c6 f1 01 f2 38 82 e9 98 5b 59 81 fe 00 02 R/W
|
||||
OPTIONAL_UNIQUE_ID (BLOCK2) Optional unique 128-bit ID
|
||||
= ea 0e c6 f1 01 f2 38 82 e9 98 5b 59 81 fe 00 02 R/W
|
||||
BLK_VERSION_MINOR (BLOCK2) BLK_VERSION_MINOR of BLOCK2 = ADC calib V2 R/W (0b010)
|
||||
WAFER_VERSION_MINOR (BLOCK0) calc WAFER VERSION MINOR = WAFER_VERSION_MINOR_HI = 0 R/W (0x0)
|
||||
<< 3 + WAFER_VERSION_MINOR_LO (read only)
|
||||
|
||||
<< 3 + WAFER_VERSION_MINOR_LO (read only)
|
||||
|
||||
Jtag fuses:
|
||||
SOFT_DIS_JTAG (BLOCK0) Software disables JTAG. When software disabled; JT = False R/W (0b0)
|
||||
AG can be activated temporarily by HMAC peripheral
|
||||
HARD_DIS_JTAG (BLOCK0) Hardware disables JTAG permanently = False R/W (0b0)
|
||||
|
||||
|
||||
Mac fuses:
|
||||
MAC (BLOCK1) MAC address
|
||||
= 58:cf:79:b3:b9:54 (OK) R/W
|
||||
CUSTOM_MAC (BLOCK3) Custom MAC
|
||||
= 00:00:00:00:00:00 (OK) R/W
|
||||
|
||||
MAC (BLOCK1) MAC address
|
||||
= 58:cf:79:b3:b9:54 (OK) R/W
|
||||
CUSTOM_MAC (BLOCK3) Custom MAC
|
||||
= 00:00:00:00:00:00 (OK) R/W
|
||||
|
||||
Security fuses:
|
||||
DIS_DOWNLOAD_ICACHE (BLOCK0) Disables Icache when SoC is in Download mode = False R/W (0b0)
|
||||
DIS_DOWNLOAD_DCACHE (BLOCK0) Disables Dcache when SoC is in Download mode = False R/W (0b0)
|
||||
DIS_FORCE_DOWNLOAD (BLOCK0) Set this bit to disable the function that forces c = False R/W (0b0)
|
||||
hip into download mode
|
||||
hip into download mode
|
||||
DIS_DOWNLOAD_MANUAL_ENCRYPT (BLOCK0) Disables flash encryption when in download boot mo = False R/W (0b0)
|
||||
des
|
||||
des
|
||||
SPI_BOOT_CRYPT_CNT (BLOCK0) Enables flash encryption when 1 or 3 bits are set = Disable R/W (0b000)
|
||||
and disabled otherwise
|
||||
and disabled otherwise
|
||||
SECURE_BOOT_KEY_REVOKE0 (BLOCK0) Revoke 1st secure boot key = False R/W (0b0)
|
||||
SECURE_BOOT_KEY_REVOKE1 (BLOCK0) Revoke 2nd secure boot key = False R/W (0b0)
|
||||
SECURE_BOOT_KEY_REVOKE2 (BLOCK0) Revoke 3rd secure boot key = False R/W (0b0)
|
||||
@@ -86,37 +86,37 @@
|
||||
KEY_PURPOSE_5 (BLOCK0) Purpose of KEY5 = USER R/W (0x0)
|
||||
SECURE_BOOT_EN (BLOCK0) Set this bit to enable secure boot = False R/W (0b0)
|
||||
SECURE_BOOT_AGGRESSIVE_REVOKE (BLOCK0) Set this bit to enable aggressive secure boot key = False R/W (0b0)
|
||||
revocation mode
|
||||
revocation mode
|
||||
DIS_DOWNLOAD_MODE (BLOCK0) Set this bit to disable all download boot modes = False R/W (0b0)
|
||||
ENABLE_SECURITY_DOWNLOAD (BLOCK0) Set this bit to enable secure UART download mode ( = False R/W (0b0)
|
||||
read/write flash only)
|
||||
read/write flash only)
|
||||
SECURE_VERSION (BLOCK0) Secure version (used by ESP-IDF anti-rollback feat = 0 R/W (0x0000)
|
||||
ure)
|
||||
ure)
|
||||
BLOCK_KEY0 (BLOCK4)
|
||||
Purpose: USER
|
||||
Key0 or user data
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
Key0 or user data
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
BLOCK_KEY1 (BLOCK5)
|
||||
Purpose: USER
|
||||
Key1 or user data
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
Key1 or user data
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
BLOCK_KEY2 (BLOCK6)
|
||||
Purpose: USER
|
||||
Key2 or user data
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
Key2 or user data
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
BLOCK_KEY3 (BLOCK7)
|
||||
Purpose: USER
|
||||
Key3 or user data
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
Key3 or user data
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
BLOCK_KEY4 (BLOCK8)
|
||||
Purpose: USER
|
||||
Key4 or user data
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
Key4 or user data
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
BLOCK_KEY5 (BLOCK9)
|
||||
Purpose: USER
|
||||
Key5 or user data
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
|
||||
Key5 or user data
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
|
||||
Spi Pad fuses:
|
||||
SPI_PAD_CONFIG_CLK (BLOCK1) SPI_PAD_configure CLK = 0 R/W (0b000000)
|
||||
SPI_PAD_CONFIG_Q (BLOCK1) SPI_PAD_configure Q(D1) = 0 R/W (0b000000)
|
||||
@@ -129,27 +129,27 @@
|
||||
SPI_PAD_CONFIG_D5 (BLOCK1) SPI_PAD_configure D5 = 0 R/W (0b000000)
|
||||
SPI_PAD_CONFIG_D6 (BLOCK1) SPI_PAD_configure D6 = 0 R/W (0b000000)
|
||||
SPI_PAD_CONFIG_D7 (BLOCK1) SPI_PAD_configure D7 = 0 R/W (0b000000)
|
||||
|
||||
|
||||
Usb fuses:
|
||||
DIS_USB (BLOCK0) Set this bit to disable USB OTG function = False R/W (0b0)
|
||||
USB_EXCHG_PINS (BLOCK0) Set this bit to exchange USB D+ and D- pins = False R/W (0b0)
|
||||
USB_EXT_PHY_ENABLE (BLOCK0) Set this bit to enable external USB PHY = False R/W (0b0)
|
||||
USB_FORCE_NOPERSIST (BLOCK0) If set; forces USB BVALID to 1 = False R/W (0b0)
|
||||
DIS_USB_DOWNLOAD_MODE (BLOCK0) Set this bit to disable use of USB OTG in UART dow = False R/W (0b0)
|
||||
nload boot mode
|
||||
|
||||
nload boot mode
|
||||
|
||||
Vdd fuses:
|
||||
VDD_SPI_XPD (BLOCK0) If VDD_SPI_FORCE is 1; this value determines if th = False R/W (0b0)
|
||||
e VDD_SPI regulator is powered on
|
||||
VDD_SPI_TIEH (BLOCK0) If VDD_SPI_FORCE is 1; determines VDD_SPI voltage
|
||||
e VDD_SPI regulator is powered on
|
||||
VDD_SPI_TIEH (BLOCK0) If VDD_SPI_FORCE is 1; determines VDD_SPI voltage
|
||||
= VDD_SPI connects to 1.8 V LDO R/W (0b0)
|
||||
VDD_SPI_FORCE (BLOCK0) Set this bit to use XPD_VDD_PSI_REG and VDD_SPI_TI = False R/W (0b0)
|
||||
EH to configure VDD_SPI LDO
|
||||
|
||||
EH to configure VDD_SPI LDO
|
||||
|
||||
Wdt fuses:
|
||||
WDT_DELAY_SEL (BLOCK0) RTC watchdog timeout threshold; in unit of slow cl = 40000 R/W (0b00)
|
||||
ock cycle
|
||||
|
||||
ock cycle
|
||||
|
||||
Flash voltage (VDD_SPI) determined by GPIO45 on reset (GPIO45=High: VDD_SPI pin is powered from internal 1.8V LDO
|
||||
GPIO45=Low or NC: VDD_SPI pin is powered directly from VDD3P3_RTC_IO via resistor Rspi. Typically this voltage is 3.3 V).
|
||||
|
||||
|
||||
@@ -5,7 +5,7 @@
|
||||
espefuse.py v4.6-dev
|
||||
Connecting....
|
||||
Detecting chip type... ESP32-S3
|
||||
|
||||
|
||||
=== Run "summary" command ===
|
||||
EFUSE_NAME (Block) Description = [Meaningful Value] [Readable/Writeable] (Hex Value)
|
||||
----------------------------------------------------------------------------------------
|
||||
@@ -33,7 +33,7 @@
|
||||
ADC2_CAL_VOL_ATTEN0 (BLOCK2) ADC2 calibration voltage at atten0 = -116 R/W (0x9d)
|
||||
ADC2_CAL_VOL_ATTEN1 (BLOCK2) ADC2 calibration voltage at atten1 = -72 R/W (0b1010010)
|
||||
ADC2_CAL_VOL_ATTEN2 (BLOCK2) ADC2 calibration voltage at atten2 = -64 R/W (0b1010000)
|
||||
|
||||
|
||||
Config fuses:
|
||||
WR_DIS (BLOCK0) Disable programming of individual eFuses = 0 R/W (0x00000000)
|
||||
RD_DIS (BLOCK0) Disable reading from BlOCK4-10 = 0 R/W (0b0000000)
|
||||
@@ -44,24 +44,24 @@
|
||||
DIS_DIRECT_BOOT (BLOCK0) Disable direct boot mode = False R/W (0b0)
|
||||
UART_PRINT_CONTROL (BLOCK0) Set the default UART boot message output mode = Enable R/W (0b00)
|
||||
PIN_POWER_SELECTION (BLOCK0) Set default power supply for GPIO33-GPIO37; set wh = VDD3P3_CPU R/W (0b0)
|
||||
en SPI flash is initialized
|
||||
BLOCK_USR_DATA (BLOCK3) User data
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
BLOCK_SYS_DATA2 (BLOCK10) System data part 2 (reserved)
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
|
||||
en SPI flash is initialized
|
||||
BLOCK_USR_DATA (BLOCK3) User data
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
BLOCK_SYS_DATA2 (BLOCK10) System data part 2 (reserved)
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
|
||||
Flash fuses:
|
||||
FLASH_TPUW (BLOCK0) Configures flash waiting time after power-up; in u = 0 R/W (0x0)
|
||||
nit of ms. If the value is less than 15; the waiti
|
||||
ng time is the configurable value. Otherwise; the
|
||||
waiting time is twice the configurable value
|
||||
waiting time is twice the configurable value
|
||||
FLASH_ECC_MODE (BLOCK0) Flash ECC mode in ROM = 16to18 byte R/W (0b0)
|
||||
FLASH_TYPE (BLOCK0) SPI flash type = 4 data lines R/W (0b0)
|
||||
FLASH_PAGE_SIZE (BLOCK0) Set Flash page size = 0 R/W (0b00)
|
||||
FLASH_ECC_EN (BLOCK0) Set 1 to enable ECC for flash boot = False R/W (0b0)
|
||||
FORCE_SEND_RESUME (BLOCK0) Set this bit to force ROM code to send a resume co = False R/W (0b0)
|
||||
mmand during SPI boot
|
||||
|
||||
mmand during SPI boot
|
||||
|
||||
Identity fuses:
|
||||
DISABLE_WAFER_VERSION_MAJOR (BLOCK0) Disables check of wafer version major = False R/W (0b0)
|
||||
DISABLE_BLK_VERSION_MAJOR (BLOCK0) Disables check of blk version major = False R/W (0b0)
|
||||
@@ -70,40 +70,40 @@
|
||||
BLK_VERSION_MINOR (BLOCK1) BLK_VERSION_MINOR = 3 R/W (0b011)
|
||||
WAFER_VERSION_MINOR_HI (BLOCK1) WAFER_VERSION_MINOR most significant bit = False R/W (0b0)
|
||||
WAFER_VERSION_MAJOR (BLOCK1) WAFER_VERSION_MAJOR = 0 R/W (0b00)
|
||||
OPTIONAL_UNIQUE_ID (BLOCK2) Optional unique 128-bit ID
|
||||
= cb 3a c9 b8 88 2b c3 bc 5e f4 00 60 ac 25 be 4b R/W
|
||||
OPTIONAL_UNIQUE_ID (BLOCK2) Optional unique 128-bit ID
|
||||
= cb 3a c9 b8 88 2b c3 bc 5e f4 00 60 ac 25 be 4b R/W
|
||||
BLK_VERSION_MAJOR (BLOCK2) BLK_VERSION_MAJOR of BLOCK2 = ADC calib V1 R/W (0b01)
|
||||
WAFER_VERSION_MINOR (BLOCK0) calc WAFER VERSION MINOR = WAFER_VERSION_MINOR_HI = 3 R/W (0x3)
|
||||
<< 3 + WAFER_VERSION_MINOR_LO (read only)
|
||||
|
||||
<< 3 + WAFER_VERSION_MINOR_LO (read only)
|
||||
|
||||
Jtag fuses:
|
||||
SOFT_DIS_JTAG (BLOCK0) Set these bits to disable JTAG in the soft way (od = 0 R/W (0b000)
|
||||
d number 1 means disable ). JTAG can be enabled in
|
||||
HMAC module
|
||||
HMAC module
|
||||
DIS_PAD_JTAG (BLOCK0) Set this bit to disable JTAG in the hard way. JTAG = False R/W (0b0)
|
||||
is disabled permanently
|
||||
is disabled permanently
|
||||
STRAP_JTAG_SEL (BLOCK0) Set this bit to enable selection between usb_to_jt = False R/W (0b0)
|
||||
ag and pad_to_jtag through strapping gpio10 when b
|
||||
oth reg_dis_usb_jtag and reg_dis_pad_jtag are equa
|
||||
l to 0
|
||||
|
||||
l to 0
|
||||
|
||||
Mac fuses:
|
||||
MAC (BLOCK1) MAC address
|
||||
= ec:da:3b:41:f2:70 (OK) R/W
|
||||
CUSTOM_MAC (BLOCK3) Custom MAC
|
||||
= 00:00:00:00:00:00 (OK) R/W
|
||||
|
||||
MAC (BLOCK1) MAC address
|
||||
= ec:da:3b:41:f2:70 (OK) R/W
|
||||
CUSTOM_MAC (BLOCK3) Custom MAC
|
||||
= 00:00:00:00:00:00 (OK) R/W
|
||||
|
||||
Security fuses:
|
||||
DIS_DOWNLOAD_ICACHE (BLOCK0) Set this bit to disable Icache in download mode (b = False R/W (0b0)
|
||||
oot_mode[3:0] is 0; 1; 2; 3; 6; 7)
|
||||
oot_mode[3:0] is 0; 1; 2; 3; 6; 7)
|
||||
DIS_DOWNLOAD_DCACHE (BLOCK0) Set this bit to disable Dcache in download mode ( = False R/W (0b0)
|
||||
boot_mode[3:0] is 0; 1; 2; 3; 6; 7)
|
||||
boot_mode[3:0] is 0; 1; 2; 3; 6; 7)
|
||||
DIS_FORCE_DOWNLOAD (BLOCK0) Set this bit to disable the function that forces c = False R/W (0b0)
|
||||
hip into download mode
|
||||
hip into download mode
|
||||
DIS_DOWNLOAD_MANUAL_ENCRYPT (BLOCK0) Set this bit to disable flash encryption when in d = False R/W (0b0)
|
||||
ownload boot modes
|
||||
ownload boot modes
|
||||
SPI_BOOT_CRYPT_CNT (BLOCK0) Enables flash encryption when 1 or 3 bits are set = Disable R/W (0b000)
|
||||
and disabled otherwise
|
||||
and disabled otherwise
|
||||
SECURE_BOOT_KEY_REVOKE0 (BLOCK0) Revoke 1st secure boot key = False R/W (0b0)
|
||||
SECURE_BOOT_KEY_REVOKE1 (BLOCK0) Revoke 2nd secure boot key = False R/W (0b0)
|
||||
SECURE_BOOT_KEY_REVOKE2 (BLOCK0) Revoke 3rd secure boot key = False R/W (0b0)
|
||||
@@ -115,37 +115,37 @@
|
||||
KEY_PURPOSE_5 (BLOCK0) Purpose of Key5 = USER R/W (0x0)
|
||||
SECURE_BOOT_EN (BLOCK0) Set this bit to enable secure boot = False R/W (0b0)
|
||||
SECURE_BOOT_AGGRESSIVE_REVOKE (BLOCK0) Set this bit to enable revoking aggressive secure = False R/W (0b0)
|
||||
boot
|
||||
boot
|
||||
DIS_DOWNLOAD_MODE (BLOCK0) Set this bit to disable download mode (boot_mode[3 = False R/W (0b0)
|
||||
:0] = 0; 1; 2; 3; 6; 7)
|
||||
:0] = 0; 1; 2; 3; 6; 7)
|
||||
ENABLE_SECURITY_DOWNLOAD (BLOCK0) Set this bit to enable secure UART download mode = False R/W (0b0)
|
||||
SECURE_VERSION (BLOCK0) Secure version (used by ESP-IDF anti-rollback feat = 0 R/W (0x0000)
|
||||
ure)
|
||||
ure)
|
||||
BLOCK_KEY0 (BLOCK4)
|
||||
Purpose: USER
|
||||
Key0 or user data
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
Key0 or user data
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
BLOCK_KEY1 (BLOCK5)
|
||||
Purpose: USER
|
||||
Key1 or user data
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
Key1 or user data
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
BLOCK_KEY2 (BLOCK6)
|
||||
Purpose: USER
|
||||
Key2 or user data
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
Key2 or user data
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
BLOCK_KEY3 (BLOCK7)
|
||||
Purpose: USER
|
||||
Key3 or user data
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
Key3 or user data
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
BLOCK_KEY4 (BLOCK8)
|
||||
Purpose: USER
|
||||
Key4 or user data
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
Key4 or user data
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
BLOCK_KEY5 (BLOCK9)
|
||||
Purpose: USER
|
||||
Key5 or user data
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
|
||||
Key5 or user data
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
|
||||
Spi Pad fuses:
|
||||
SPI_PAD_CONFIG_CLK (BLOCK1) SPI_PAD_configure CLK = 0 R/W (0b000000)
|
||||
SPI_PAD_CONFIG_Q (BLOCK1) SPI_PAD_configure Q(D1) = 0 R/W (0b000000)
|
||||
@@ -158,33 +158,33 @@
|
||||
SPI_PAD_CONFIG_D5 (BLOCK1) SPI_PAD_configure D5 = 0 R/W (0b000000)
|
||||
SPI_PAD_CONFIG_D6 (BLOCK1) SPI_PAD_configure D6 = 0 R/W (0b000000)
|
||||
SPI_PAD_CONFIG_D7 (BLOCK1) SPI_PAD_configure D7 = 0 R/W (0b000000)
|
||||
|
||||
|
||||
Usb fuses:
|
||||
DIS_USB_OTG (BLOCK0) Set this bit to disable USB function = False R/W (0b0)
|
||||
USB_EXCHG_PINS (BLOCK0) Set this bit to exchange USB D+ and D- pins = False R/W (0b0)
|
||||
USB_EXT_PHY_ENABLE (BLOCK0) Set this bit to enable external PHY = False R/W (0b0)
|
||||
DIS_USB_JTAG (BLOCK0) Set this bit to disable function of usb switch to = False R/W (0b0)
|
||||
jtag in module of usb device
|
||||
jtag in module of usb device
|
||||
DIS_USB_SERIAL_JTAG (BLOCK0) Set this bit to disable usb device = False R/W (0b0)
|
||||
USB_PHY_SEL (BLOCK0) This bit is used to switch internal PHY and extern
|
||||
= internal PHY is assigned to USB Device while external PHY is assigned to USB OTG R/W (0b0)
|
||||
al PHY for USB OTG and USB Device
|
||||
al PHY for USB OTG and USB Device
|
||||
DIS_USB_SERIAL_JTAG_ROM_PRINT (BLOCK0) USB printing = Enable R/W (0b0)
|
||||
DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE (BLOCK0) Set this bit to disable UART download mode through = False R/W (0b0)
|
||||
USB
|
||||
USB
|
||||
DIS_USB_OTG_DOWNLOAD_MODE (BLOCK0) Set this bit to disable download through USB-OTG = False R/W (0b0)
|
||||
|
||||
|
||||
Vdd fuses:
|
||||
VDD_SPI_XPD (BLOCK0) SPI regulator power up signal = False R/W (0b0)
|
||||
VDD_SPI_TIEH (BLOCK0) If VDD_SPI_FORCE is 1; determines VDD_SPI voltage
|
||||
VDD_SPI_TIEH (BLOCK0) If VDD_SPI_FORCE is 1; determines VDD_SPI voltage
|
||||
= VDD_SPI connects to 1.8 V LDO R/W (0b0)
|
||||
VDD_SPI_FORCE (BLOCK0) Set this bit and force to use the configuration of = False R/W (0b0)
|
||||
eFuse to configure VDD_SPI
|
||||
|
||||
eFuse to configure VDD_SPI
|
||||
|
||||
Wdt fuses:
|
||||
WDT_DELAY_SEL (BLOCK0) RTC watchdog timeout threshold; in unit of slow cl = 40000 R/W (0b00)
|
||||
ock cycle
|
||||
|
||||
ock cycle
|
||||
|
||||
Flash voltage (VDD_SPI) determined by GPIO45 on reset (GPIO45=High: VDD_SPI pin is powered from internal 1.8V LDO
|
||||
GPIO45=Low or NC: VDD_SPI pin is powered directly from VDD3P3_RTC_IO via resistor Rspi. Typically this voltage is 3.3 V).
|
||||
|
||||
|
||||
@@ -7,13 +7,13 @@
|
||||
Detecting chip type... Unsupported detection protocol, switching and trying again...
|
||||
Connecting.....
|
||||
Detecting chip type... ESP32
|
||||
|
||||
|
||||
=== Run "summary" command ===
|
||||
EFUSE_NAME (Block) Description = [Meaningful Value] [Readable/Writeable] (Hex Value)
|
||||
----------------------------------------------------------------------------------------
|
||||
Calibration fuses:
|
||||
ADC_VREF (BLOCK0) True ADC reference voltage = 1121 R/W (0b00011)
|
||||
|
||||
|
||||
Config fuses:
|
||||
WR_DIS (BLOCK0) Efuse write disable mask = 0 R/W (0x0000)
|
||||
RD_DIS (BLOCK0) Disable reading from BlOCK1-3 = 0 R/W (0x0)
|
||||
@@ -22,26 +22,26 @@
|
||||
DIS_CACHE (BLOCK0) Disables cache = False R/W (0b0)
|
||||
CHIP_CPU_FREQ_LOW (BLOCK0) If set alongside EFUSE_RD_CHIP_CPU_FREQ_RATED; the = False R/W (0b0)
|
||||
ESP32's max CPU frequency is rated for 160MHz. 24
|
||||
0MHz otherwise
|
||||
0MHz otherwise
|
||||
CHIP_CPU_FREQ_RATED (BLOCK0) If set; the ESP32's maximum CPU frequency has been = True R/W (0b1)
|
||||
rated
|
||||
rated
|
||||
BLK3_PART_RESERVE (BLOCK0) BLOCK3 partially served for ADC calibration data = False R/W (0b0)
|
||||
CLK8M_FREQ (BLOCK0) 8MHz clock freq override = 51 R/W (0x33)
|
||||
VOL_LEVEL_HP_INV (BLOCK0) This field stores the voltage level for CPU to run = 0 R/W (0b00)
|
||||
at 240 MHz; or for flash/PSRAM to run at 80 MHz.0
|
||||
x0: level 7; 0x1: level 6; 0x2: level 5; 0x3: leve
|
||||
l 4. (RO)
|
||||
CODING_SCHEME (BLOCK0) Efuse variable block length scheme
|
||||
l 4. (RO)
|
||||
CODING_SCHEME (BLOCK0) Efuse variable block length scheme
|
||||
= NONE (BLK1-3 len=256 bits) R/W (0b00)
|
||||
CONSOLE_DEBUG_DISABLE (BLOCK0) Disable ROM BASIC interpreter fallback = True R/W (0b1)
|
||||
DISABLE_SDIO_HOST (BLOCK0) = False R/W (0b0)
|
||||
DISABLE_DL_CACHE (BLOCK0) Disable flash cache in UART bootloader = False R/W (0b0)
|
||||
|
||||
|
||||
Flash fuses:
|
||||
FLASH_CRYPT_CNT (BLOCK0) Flash encryption is enabled if this field has an o = 0 R/W (0b0000000)
|
||||
dd number of bits set
|
||||
dd number of bits set
|
||||
FLASH_CRYPT_CONFIG (BLOCK0) Flash encryption config (key tweak bits) = 0 R/W (0x0)
|
||||
|
||||
|
||||
Identity fuses:
|
||||
CHIP_PACKAGE_4BIT (BLOCK0) Chip package identifier #4bit = False R/W (0b0)
|
||||
CHIP_PACKAGE (BLOCK0) Chip package identifier = 1 R/W (0b001)
|
||||
@@ -49,34 +49,34 @@
|
||||
CHIP_VER_REV2 (BLOCK0) = True R/W (0b1)
|
||||
WAFER_VERSION_MINOR (BLOCK0) = 0 R/W (0b00)
|
||||
WAFER_VERSION_MAJOR (BLOCK0) calc WAFER VERSION MAJOR from CHIP_VER_REV1 and CH = 3 R/W (0b011)
|
||||
IP_VER_REV2 and apb_ctl_date (read only)
|
||||
IP_VER_REV2 and apb_ctl_date (read only)
|
||||
PKG_VERSION (BLOCK0) calc Chip package = CHIP_PACKAGE_4BIT << 3 + CHIP_ = 1 R/W (0x1)
|
||||
PACKAGE (read only)
|
||||
|
||||
PACKAGE (read only)
|
||||
|
||||
Jtag fuses:
|
||||
JTAG_DISABLE (BLOCK0) Disable JTAG = False R/W (0b0)
|
||||
|
||||
|
||||
Mac fuses:
|
||||
MAC (BLOCK0) MAC address
|
||||
= 94:b9:7e:5a:6e:58 (CRC 0xe2 OK) R/W
|
||||
MAC (BLOCK0) MAC address
|
||||
= 94:b9:7e:5a:6e:58 (CRC 0xe2 OK) R/W
|
||||
MAC_CRC (BLOCK0) CRC8 for MAC address = 226 R/W (0xe2)
|
||||
MAC_VERSION (BLOCK3) Version of the MAC field = 0 R/W (0x00)
|
||||
|
||||
|
||||
Security fuses:
|
||||
UART_DOWNLOAD_DIS (BLOCK0) Disable UART download mode. Valid for ESP32 V3 and = False R/W (0b0)
|
||||
newer; only
|
||||
newer; only
|
||||
ABS_DONE_0 (BLOCK0) Secure boot V1 is enabled for bootloader image = False R/W (0b0)
|
||||
ABS_DONE_1 (BLOCK0) Secure boot V2 is enabled for bootloader image = False R/W (0b0)
|
||||
DISABLE_DL_ENCRYPT (BLOCK0) Disable flash encryption in UART bootloader = False R/W (0b0)
|
||||
DISABLE_DL_DECRYPT (BLOCK0) Disable flash decryption in UART bootloader = False R/W (0b0)
|
||||
KEY_STATUS (BLOCK0) Usage of efuse block 3 (reserved) = False R/W (0b0)
|
||||
SECURE_VERSION (BLOCK3) Secure version for anti-rollback = 0 R/W (0x00000000)
|
||||
BLOCK1 (BLOCK1) Flash encryption key
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
BLOCK2 (BLOCK2) Security boot key
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
BLOCK3 (BLOCK3) Variable Block 3
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
BLOCK1 (BLOCK1) Flash encryption key
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
BLOCK2 (BLOCK2) Security boot key
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
BLOCK3 (BLOCK3) Variable Block 3
|
||||
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
|
||||
|
||||
Spi Pad fuses:
|
||||
SPI_PAD_CONFIG_HD (BLOCK0) read for SPI_pad_config_hd = 0 R/W (0b00000)
|
||||
|
||||
@@ -28,4 +28,4 @@
|
||||
+ +---------------------------------------+-------------------------------------+
|
||||
| | None | Min values for both frequencies set |
|
||||
| | | with :cpp:func:`esp_pm_configure` |
|
||||
+---------------+---------------------------------------+-------------------------------------+
|
||||
+---------------+---------------------------------------+-------------------------------------+
|
||||
|
||||
@@ -1 +1 @@
|
||||
TO BE UPDATED IDF-7672
|
||||
TO BE UPDATED IDF-7672
|
||||
|
||||
@@ -8,113 +8,113 @@
|
||||
Max number of bits in BLK 256
|
||||
Sorted efuse table:
|
||||
# field_name efuse_block bit_start bit_count
|
||||
1 WR_DIS EFUSE_BLK0 0 8
|
||||
2 WR_DIS.RD_DIS EFUSE_BLK0 0 1
|
||||
3 WR_DIS.WDT_DELAY_SEL EFUSE_BLK0 1 1
|
||||
4 WR_DIS.DIS_PAD_JTAG EFUSE_BLK0 1 1
|
||||
5 WR_DIS.DIS_DOWNLOAD_ICACHE EFUSE_BLK0 1 1
|
||||
6 WR_DIS.DIS_DOWNLOAD_MANUAL_ENCRYPT EFUSE_BLK0 2 1
|
||||
7 WR_DIS.SPI_BOOT_CRYPT_CNT EFUSE_BLK0 2 1
|
||||
8 WR_DIS.XTS_KEY_LENGTH_256 EFUSE_BLK0 2 1
|
||||
9 WR_DIS.SECURE_BOOT_EN EFUSE_BLK0 2 1
|
||||
10 WR_DIS.UART_PRINT_CONTROL EFUSE_BLK0 3 1
|
||||
11 WR_DIS.FORCE_SEND_RESUME EFUSE_BLK0 3 1
|
||||
12 WR_DIS.DIS_DOWNLOAD_MODE EFUSE_BLK0 3 1
|
||||
13 WR_DIS.DIS_DIRECT_BOOT EFUSE_BLK0 3 1
|
||||
14 WR_DIS.ENABLE_SECURITY_DOWNLOAD EFUSE_BLK0 3 1
|
||||
15 WR_DIS.FLASH_TPUW EFUSE_BLK0 3 1
|
||||
16 WR_DIS.SECURE_VERSION EFUSE_BLK0 4 1
|
||||
17 WR_DIS.CUSTOM_MAC_USED EFUSE_BLK0 4 1
|
||||
18 WR_DIS.DISABLE_WAFER_VERSION_MAJOR EFUSE_BLK0 4 1
|
||||
19 WR_DIS.DISABLE_BLK_VERSION_MAJOR EFUSE_BLK0 4 1
|
||||
20 WR_DIS.CUSTOM_MAC EFUSE_BLK0 5 1
|
||||
21 WR_DIS.MAC EFUSE_BLK0 6 1
|
||||
22 WR_DIS.WAFER_VERSION_MINOR EFUSE_BLK0 6 1
|
||||
23 WR_DIS.WAFER_VERSION_MAJOR EFUSE_BLK0 6 1
|
||||
24 WR_DIS.PKG_VERSION EFUSE_BLK0 6 1
|
||||
25 WR_DIS.BLK_VERSION_MINOR EFUSE_BLK0 6 1
|
||||
26 WR_DIS.BLK_VERSION_MAJOR EFUSE_BLK0 6 1
|
||||
27 WR_DIS.OCODE EFUSE_BLK0 6 1
|
||||
28 WR_DIS.TEMP_CALIB EFUSE_BLK0 6 1
|
||||
29 WR_DIS.ADC1_INIT_CODE_ATTEN0 EFUSE_BLK0 6 1
|
||||
30 WR_DIS.ADC1_INIT_CODE_ATTEN3 EFUSE_BLK0 6 1
|
||||
31 WR_DIS.ADC1_CAL_VOL_ATTEN0 EFUSE_BLK0 6 1
|
||||
32 WR_DIS.ADC1_CAL_VOL_ATTEN3 EFUSE_BLK0 6 1
|
||||
33 WR_DIS.DIG_DBIAS_HVT EFUSE_BLK0 6 1
|
||||
34 WR_DIS.DIG_LDO_SLP_DBIAS2 EFUSE_BLK0 6 1
|
||||
35 WR_DIS.DIG_LDO_SLP_DBIAS26 EFUSE_BLK0 6 1
|
||||
36 WR_DIS.DIG_LDO_ACT_DBIAS26 EFUSE_BLK0 6 1
|
||||
37 WR_DIS.DIG_LDO_ACT_STEPD10 EFUSE_BLK0 6 1
|
||||
38 WR_DIS.RTC_LDO_SLP_DBIAS13 EFUSE_BLK0 6 1
|
||||
39 WR_DIS.RTC_LDO_SLP_DBIAS29 EFUSE_BLK0 6 1
|
||||
40 WR_DIS.RTC_LDO_SLP_DBIAS31 EFUSE_BLK0 6 1
|
||||
41 WR_DIS.RTC_LDO_ACT_DBIAS31 EFUSE_BLK0 6 1
|
||||
42 WR_DIS.RTC_LDO_ACT_DBIAS13 EFUSE_BLK0 6 1
|
||||
43 WR_DIS.ADC_CALIBRATION_3 EFUSE_BLK0 6 1
|
||||
44 WR_DIS.BLOCK_KEY0 EFUSE_BLK0 7 1
|
||||
45 RD_DIS EFUSE_BLK0 32 2
|
||||
46 RD_DIS.KEY0 EFUSE_BLK0 32 2
|
||||
47 RD_DIS.KEY0.LOW EFUSE_BLK0 32 1
|
||||
48 RD_DIS.KEY0.HI EFUSE_BLK0 33 1
|
||||
49 WDT_DELAY_SEL EFUSE_BLK0 34 2
|
||||
50 DIS_PAD_JTAG EFUSE_BLK0 36 1
|
||||
51 DIS_DOWNLOAD_ICACHE EFUSE_BLK0 37 1
|
||||
52 DIS_DOWNLOAD_MANUAL_ENCRYPT EFUSE_BLK0 38 1
|
||||
53 SPI_BOOT_CRYPT_CNT EFUSE_BLK0 39 3
|
||||
54 XTS_KEY_LENGTH_256 EFUSE_BLK0 42 1
|
||||
55 UART_PRINT_CONTROL EFUSE_BLK0 43 2
|
||||
56 FORCE_SEND_RESUME EFUSE_BLK0 45 1
|
||||
57 DIS_DOWNLOAD_MODE EFUSE_BLK0 46 1
|
||||
58 DIS_DIRECT_BOOT EFUSE_BLK0 47 1
|
||||
59 ENABLE_SECURITY_DOWNLOAD EFUSE_BLK0 48 1
|
||||
60 FLASH_TPUW EFUSE_BLK0 49 4
|
||||
61 SECURE_BOOT_EN EFUSE_BLK0 53 1
|
||||
62 SECURE_VERSION EFUSE_BLK0 54 4
|
||||
63 CUSTOM_MAC_USED EFUSE_BLK0 58 1
|
||||
64 DISABLE_WAFER_VERSION_MAJOR EFUSE_BLK0 59 1
|
||||
65 DISABLE_BLK_VERSION_MAJOR EFUSE_BLK0 60 1
|
||||
66 USER_DATA EFUSE_BLK1 0 88
|
||||
67 USER_DATA.MAC_CUSTOM EFUSE_BLK1 0 48
|
||||
68 MAC EFUSE_BLK2 0 8
|
||||
69 MAC EFUSE_BLK2 8 8
|
||||
70 MAC EFUSE_BLK2 16 8
|
||||
71 MAC EFUSE_BLK2 24 8
|
||||
72 MAC EFUSE_BLK2 32 8
|
||||
73 MAC EFUSE_BLK2 40 8
|
||||
74 WAFER_VERSION_MINOR EFUSE_BLK2 48 4
|
||||
75 WAFER_VERSION_MAJOR EFUSE_BLK2 52 2
|
||||
76 PKG_VERSION EFUSE_BLK2 54 3
|
||||
77 BLK_VERSION_MINOR EFUSE_BLK2 57 3
|
||||
78 BLK_VERSION_MAJOR EFUSE_BLK2 60 2
|
||||
79 OCODE EFUSE_BLK2 62 7
|
||||
80 TEMP_CALIB EFUSE_BLK2 69 9
|
||||
81 ADC1_INIT_CODE_ATTEN0 EFUSE_BLK2 78 8
|
||||
82 ADC1_INIT_CODE_ATTEN3 EFUSE_BLK2 86 5
|
||||
83 ADC1_CAL_VOL_ATTEN0 EFUSE_BLK2 91 8
|
||||
84 ADC1_CAL_VOL_ATTEN3 EFUSE_BLK2 99 6
|
||||
85 DIG_DBIAS_HVT EFUSE_BLK2 105 5
|
||||
86 DIG_LDO_SLP_DBIAS2 EFUSE_BLK2 110 7
|
||||
87 DIG_LDO_SLP_DBIAS26 EFUSE_BLK2 117 8
|
||||
88 DIG_LDO_ACT_DBIAS26 EFUSE_BLK2 125 6
|
||||
89 DIG_LDO_ACT_STEPD10 EFUSE_BLK2 131 4
|
||||
90 RTC_LDO_SLP_DBIAS13 EFUSE_BLK2 135 7
|
||||
91 RTC_LDO_SLP_DBIAS29 EFUSE_BLK2 142 9
|
||||
92 RTC_LDO_SLP_DBIAS31 EFUSE_BLK2 151 6
|
||||
93 RTC_LDO_ACT_DBIAS31 EFUSE_BLK2 157 6
|
||||
94 RTC_LDO_ACT_DBIAS13 EFUSE_BLK2 163 8
|
||||
95 ADC_CALIBRATION_3 EFUSE_BLK2 192 11
|
||||
96 KEY0 EFUSE_BLK3 0 256
|
||||
97 KEY0.FE_256BIT EFUSE_BLK3 0 256
|
||||
98 KEY0.FE_128BIT EFUSE_BLK3 0 128
|
||||
99 KEY0.SB_128BIT EFUSE_BLK3 128 128
|
||||
1 WR_DIS EFUSE_BLK0 0 8
|
||||
2 WR_DIS.RD_DIS EFUSE_BLK0 0 1
|
||||
3 WR_DIS.WDT_DELAY_SEL EFUSE_BLK0 1 1
|
||||
4 WR_DIS.DIS_PAD_JTAG EFUSE_BLK0 1 1
|
||||
5 WR_DIS.DIS_DOWNLOAD_ICACHE EFUSE_BLK0 1 1
|
||||
6 WR_DIS.DIS_DOWNLOAD_MANUAL_ENCRYPT EFUSE_BLK0 2 1
|
||||
7 WR_DIS.SPI_BOOT_CRYPT_CNT EFUSE_BLK0 2 1
|
||||
8 WR_DIS.XTS_KEY_LENGTH_256 EFUSE_BLK0 2 1
|
||||
9 WR_DIS.SECURE_BOOT_EN EFUSE_BLK0 2 1
|
||||
10 WR_DIS.UART_PRINT_CONTROL EFUSE_BLK0 3 1
|
||||
11 WR_DIS.FORCE_SEND_RESUME EFUSE_BLK0 3 1
|
||||
12 WR_DIS.DIS_DOWNLOAD_MODE EFUSE_BLK0 3 1
|
||||
13 WR_DIS.DIS_DIRECT_BOOT EFUSE_BLK0 3 1
|
||||
14 WR_DIS.ENABLE_SECURITY_DOWNLOAD EFUSE_BLK0 3 1
|
||||
15 WR_DIS.FLASH_TPUW EFUSE_BLK0 3 1
|
||||
16 WR_DIS.SECURE_VERSION EFUSE_BLK0 4 1
|
||||
17 WR_DIS.CUSTOM_MAC_USED EFUSE_BLK0 4 1
|
||||
18 WR_DIS.DISABLE_WAFER_VERSION_MAJOR EFUSE_BLK0 4 1
|
||||
19 WR_DIS.DISABLE_BLK_VERSION_MAJOR EFUSE_BLK0 4 1
|
||||
20 WR_DIS.CUSTOM_MAC EFUSE_BLK0 5 1
|
||||
21 WR_DIS.MAC EFUSE_BLK0 6 1
|
||||
22 WR_DIS.WAFER_VERSION_MINOR EFUSE_BLK0 6 1
|
||||
23 WR_DIS.WAFER_VERSION_MAJOR EFUSE_BLK0 6 1
|
||||
24 WR_DIS.PKG_VERSION EFUSE_BLK0 6 1
|
||||
25 WR_DIS.BLK_VERSION_MINOR EFUSE_BLK0 6 1
|
||||
26 WR_DIS.BLK_VERSION_MAJOR EFUSE_BLK0 6 1
|
||||
27 WR_DIS.OCODE EFUSE_BLK0 6 1
|
||||
28 WR_DIS.TEMP_CALIB EFUSE_BLK0 6 1
|
||||
29 WR_DIS.ADC1_INIT_CODE_ATTEN0 EFUSE_BLK0 6 1
|
||||
30 WR_DIS.ADC1_INIT_CODE_ATTEN3 EFUSE_BLK0 6 1
|
||||
31 WR_DIS.ADC1_CAL_VOL_ATTEN0 EFUSE_BLK0 6 1
|
||||
32 WR_DIS.ADC1_CAL_VOL_ATTEN3 EFUSE_BLK0 6 1
|
||||
33 WR_DIS.DIG_DBIAS_HVT EFUSE_BLK0 6 1
|
||||
34 WR_DIS.DIG_LDO_SLP_DBIAS2 EFUSE_BLK0 6 1
|
||||
35 WR_DIS.DIG_LDO_SLP_DBIAS26 EFUSE_BLK0 6 1
|
||||
36 WR_DIS.DIG_LDO_ACT_DBIAS26 EFUSE_BLK0 6 1
|
||||
37 WR_DIS.DIG_LDO_ACT_STEPD10 EFUSE_BLK0 6 1
|
||||
38 WR_DIS.RTC_LDO_SLP_DBIAS13 EFUSE_BLK0 6 1
|
||||
39 WR_DIS.RTC_LDO_SLP_DBIAS29 EFUSE_BLK0 6 1
|
||||
40 WR_DIS.RTC_LDO_SLP_DBIAS31 EFUSE_BLK0 6 1
|
||||
41 WR_DIS.RTC_LDO_ACT_DBIAS31 EFUSE_BLK0 6 1
|
||||
42 WR_DIS.RTC_LDO_ACT_DBIAS13 EFUSE_BLK0 6 1
|
||||
43 WR_DIS.ADC_CALIBRATION_3 EFUSE_BLK0 6 1
|
||||
44 WR_DIS.BLOCK_KEY0 EFUSE_BLK0 7 1
|
||||
45 RD_DIS EFUSE_BLK0 32 2
|
||||
46 RD_DIS.KEY0 EFUSE_BLK0 32 2
|
||||
47 RD_DIS.KEY0.LOW EFUSE_BLK0 32 1
|
||||
48 RD_DIS.KEY0.HI EFUSE_BLK0 33 1
|
||||
49 WDT_DELAY_SEL EFUSE_BLK0 34 2
|
||||
50 DIS_PAD_JTAG EFUSE_BLK0 36 1
|
||||
51 DIS_DOWNLOAD_ICACHE EFUSE_BLK0 37 1
|
||||
52 DIS_DOWNLOAD_MANUAL_ENCRYPT EFUSE_BLK0 38 1
|
||||
53 SPI_BOOT_CRYPT_CNT EFUSE_BLK0 39 3
|
||||
54 XTS_KEY_LENGTH_256 EFUSE_BLK0 42 1
|
||||
55 UART_PRINT_CONTROL EFUSE_BLK0 43 2
|
||||
56 FORCE_SEND_RESUME EFUSE_BLK0 45 1
|
||||
57 DIS_DOWNLOAD_MODE EFUSE_BLK0 46 1
|
||||
58 DIS_DIRECT_BOOT EFUSE_BLK0 47 1
|
||||
59 ENABLE_SECURITY_DOWNLOAD EFUSE_BLK0 48 1
|
||||
60 FLASH_TPUW EFUSE_BLK0 49 4
|
||||
61 SECURE_BOOT_EN EFUSE_BLK0 53 1
|
||||
62 SECURE_VERSION EFUSE_BLK0 54 4
|
||||
63 CUSTOM_MAC_USED EFUSE_BLK0 58 1
|
||||
64 DISABLE_WAFER_VERSION_MAJOR EFUSE_BLK0 59 1
|
||||
65 DISABLE_BLK_VERSION_MAJOR EFUSE_BLK0 60 1
|
||||
66 USER_DATA EFUSE_BLK1 0 88
|
||||
67 USER_DATA.MAC_CUSTOM EFUSE_BLK1 0 48
|
||||
68 MAC EFUSE_BLK2 0 8
|
||||
69 MAC EFUSE_BLK2 8 8
|
||||
70 MAC EFUSE_BLK2 16 8
|
||||
71 MAC EFUSE_BLK2 24 8
|
||||
72 MAC EFUSE_BLK2 32 8
|
||||
73 MAC EFUSE_BLK2 40 8
|
||||
74 WAFER_VERSION_MINOR EFUSE_BLK2 48 4
|
||||
75 WAFER_VERSION_MAJOR EFUSE_BLK2 52 2
|
||||
76 PKG_VERSION EFUSE_BLK2 54 3
|
||||
77 BLK_VERSION_MINOR EFUSE_BLK2 57 3
|
||||
78 BLK_VERSION_MAJOR EFUSE_BLK2 60 2
|
||||
79 OCODE EFUSE_BLK2 62 7
|
||||
80 TEMP_CALIB EFUSE_BLK2 69 9
|
||||
81 ADC1_INIT_CODE_ATTEN0 EFUSE_BLK2 78 8
|
||||
82 ADC1_INIT_CODE_ATTEN3 EFUSE_BLK2 86 5
|
||||
83 ADC1_CAL_VOL_ATTEN0 EFUSE_BLK2 91 8
|
||||
84 ADC1_CAL_VOL_ATTEN3 EFUSE_BLK2 99 6
|
||||
85 DIG_DBIAS_HVT EFUSE_BLK2 105 5
|
||||
86 DIG_LDO_SLP_DBIAS2 EFUSE_BLK2 110 7
|
||||
87 DIG_LDO_SLP_DBIAS26 EFUSE_BLK2 117 8
|
||||
88 DIG_LDO_ACT_DBIAS26 EFUSE_BLK2 125 6
|
||||
89 DIG_LDO_ACT_STEPD10 EFUSE_BLK2 131 4
|
||||
90 RTC_LDO_SLP_DBIAS13 EFUSE_BLK2 135 7
|
||||
91 RTC_LDO_SLP_DBIAS29 EFUSE_BLK2 142 9
|
||||
92 RTC_LDO_SLP_DBIAS31 EFUSE_BLK2 151 6
|
||||
93 RTC_LDO_ACT_DBIAS31 EFUSE_BLK2 157 6
|
||||
94 RTC_LDO_ACT_DBIAS13 EFUSE_BLK2 163 8
|
||||
95 ADC_CALIBRATION_3 EFUSE_BLK2 192 11
|
||||
96 KEY0 EFUSE_BLK3 0 256
|
||||
97 KEY0.FE_256BIT EFUSE_BLK3 0 256
|
||||
98 KEY0.FE_128BIT EFUSE_BLK3 0 128
|
||||
99 KEY0.SB_128BIT EFUSE_BLK3 128 128
|
||||
|
||||
Used bits in efuse table:
|
||||
EFUSE_BLK0
|
||||
[0 7] [0 1] [1 1] [1 2] [2 2] ... [6 6] [6 6] [6 6] [6 6] [6 6] [6 6] [6 6] [6 6] [6 6] [6 7] [32 33] [32 33] [32 60]
|
||||
EFUSE_BLK1
|
||||
[0 87] [0 47]
|
||||
EFUSE_BLK2
|
||||
[0 170] [192 202]
|
||||
EFUSE_BLK3
|
||||
[0 255] [0 255] [0 255]
|
||||
EFUSE_BLK0
|
||||
[0 7] [0 1] [1 1] [1 2] [2 2] ... [6 6] [6 6] [6 6] [6 6] [6 6] [6 6] [6 6] [6 6] [6 6] [6 7] [32 33] [32 33] [32 60]
|
||||
EFUSE_BLK1
|
||||
[0 87] [0 47]
|
||||
EFUSE_BLK2
|
||||
[0 170] [192 202]
|
||||
EFUSE_BLK3
|
||||
[0 255] [0 255] [0 255]
|
||||
Note: Not printed ranges are free for using. (bits in EFUSE_BLK0 are reserved for Espressif)
|
||||
|
||||
@@ -6,207 +6,207 @@
|
||||
Max number of bits in BLK 256
|
||||
Sorted efuse table:
|
||||
# field_name efuse_block bit_start bit_count
|
||||
1 WR_DIS EFUSE_BLK0 0 32
|
||||
2 WR_DIS.RD_DIS EFUSE_BLK0 0 1
|
||||
3 WR_DIS.DIS_ICACHE EFUSE_BLK0 2 1
|
||||
4 WR_DIS.DIS_USB_JTAG EFUSE_BLK0 2 1
|
||||
5 WR_DIS.DIS_DOWNLOAD_ICACHE EFUSE_BLK0 2 1
|
||||
6 WR_DIS.DIS_USB_SERIAL_JTAG EFUSE_BLK0 2 1
|
||||
7 WR_DIS.DIS_FORCE_DOWNLOAD EFUSE_BLK0 2 1
|
||||
8 WR_DIS.DIS_TWAI EFUSE_BLK0 2 1
|
||||
9 WR_DIS.JTAG_SEL_ENABLE EFUSE_BLK0 2 1
|
||||
10 WR_DIS.DIS_PAD_JTAG EFUSE_BLK0 2 1
|
||||
11 WR_DIS.DIS_DOWNLOAD_MANUAL_ENCRYPT EFUSE_BLK0 2 1
|
||||
12 WR_DIS.WDT_DELAY_SEL EFUSE_BLK0 3 1
|
||||
13 WR_DIS.SPI_BOOT_CRYPT_CNT EFUSE_BLK0 4 1
|
||||
14 WR_DIS.SECURE_BOOT_KEY_REVOKE0 EFUSE_BLK0 5 1
|
||||
15 WR_DIS.SECURE_BOOT_KEY_REVOKE1 EFUSE_BLK0 6 1
|
||||
16 WR_DIS.SECURE_BOOT_KEY_REVOKE2 EFUSE_BLK0 7 1
|
||||
17 WR_DIS.KEY_PURPOSE_0 EFUSE_BLK0 8 1
|
||||
18 WR_DIS.KEY_PURPOSE_1 EFUSE_BLK0 9 1
|
||||
19 WR_DIS.KEY_PURPOSE_2 EFUSE_BLK0 10 1
|
||||
20 WR_DIS.KEY_PURPOSE_3 EFUSE_BLK0 11 1
|
||||
21 WR_DIS.KEY_PURPOSE_4 EFUSE_BLK0 12 1
|
||||
22 WR_DIS.KEY_PURPOSE_5 EFUSE_BLK0 13 1
|
||||
23 WR_DIS.SECURE_BOOT_EN EFUSE_BLK0 15 1
|
||||
24 WR_DIS.SECURE_BOOT_AGGRESSIVE_REVOKE EFUSE_BLK0 16 1
|
||||
25 WR_DIS.FLASH_TPUW EFUSE_BLK0 18 1
|
||||
26 WR_DIS.DIS_DOWNLOAD_MODE EFUSE_BLK0 18 1
|
||||
27 WR_DIS.DIS_DIRECT_BOOT EFUSE_BLK0 18 1
|
||||
28 WR_DIS.DIS_USB_SERIAL_JTAG_ROM_PRINT EFUSE_BLK0 18 1
|
||||
29 WR_DIS.DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE EFUSE_BLK0 18 1
|
||||
30 WR_DIS.ENABLE_SECURITY_DOWNLOAD EFUSE_BLK0 18 1
|
||||
31 WR_DIS.UART_PRINT_CONTROL EFUSE_BLK0 18 1
|
||||
32 WR_DIS.FORCE_SEND_RESUME EFUSE_BLK0 18 1
|
||||
33 WR_DIS.SECURE_VERSION EFUSE_BLK0 18 1
|
||||
34 WR_DIS.ERR_RST_ENABLE EFUSE_BLK0 19 1
|
||||
35 WR_DIS.DISABLE_WAFER_VERSION_MAJOR EFUSE_BLK0 19 1
|
||||
36 WR_DIS.DISABLE_BLK_VERSION_MAJOR EFUSE_BLK0 19 1
|
||||
37 WR_DIS.BLK1 EFUSE_BLK0 20 1
|
||||
38 WR_DIS.MAC EFUSE_BLK0 20 1
|
||||
39 WR_DIS.SPI_PAD_CONFIG_CLK EFUSE_BLK0 20 1
|
||||
40 WR_DIS.SPI_PAD_CONFIG_Q EFUSE_BLK0 20 1
|
||||
41 WR_DIS.SPI_PAD_CONFIG_D EFUSE_BLK0 20 1
|
||||
42 WR_DIS.SPI_PAD_CONFIG_CS EFUSE_BLK0 20 1
|
||||
43 WR_DIS.SPI_PAD_CONFIG_HD EFUSE_BLK0 20 1
|
||||
44 WR_DIS.SPI_PAD_CONFIG_WP EFUSE_BLK0 20 1
|
||||
45 WR_DIS.SPI_PAD_CONFIG_DQS EFUSE_BLK0 20 1
|
||||
46 WR_DIS.SPI_PAD_CONFIG_D4 EFUSE_BLK0 20 1
|
||||
47 WR_DIS.SPI_PAD_CONFIG_D5 EFUSE_BLK0 20 1
|
||||
48 WR_DIS.SPI_PAD_CONFIG_D6 EFUSE_BLK0 20 1
|
||||
49 WR_DIS.SPI_PAD_CONFIG_D7 EFUSE_BLK0 20 1
|
||||
50 WR_DIS.WAFER_VERSION_MINOR_LO EFUSE_BLK0 20 1
|
||||
51 WR_DIS.PKG_VERSION EFUSE_BLK0 20 1
|
||||
52 WR_DIS.BLK_VERSION_MINOR EFUSE_BLK0 20 1
|
||||
53 WR_DIS.K_RTC_LDO EFUSE_BLK0 20 1
|
||||
54 WR_DIS.K_DIG_LDO EFUSE_BLK0 20 1
|
||||
55 WR_DIS.V_RTC_DBIAS20 EFUSE_BLK0 20 1
|
||||
56 WR_DIS.V_DIG_DBIAS20 EFUSE_BLK0 20 1
|
||||
57 WR_DIS.DIG_DBIAS_HVT EFUSE_BLK0 20 1
|
||||
58 WR_DIS.THRES_HVT EFUSE_BLK0 20 1
|
||||
59 WR_DIS.WAFER_VERSION_MINOR_HI EFUSE_BLK0 20 1
|
||||
60 WR_DIS.WAFER_VERSION_MAJOR EFUSE_BLK0 20 1
|
||||
61 WR_DIS.SYS_DATA_PART1 EFUSE_BLK0 21 1
|
||||
62 WR_DIS.OPTIONAL_UNIQUE_ID EFUSE_BLK0 21 1
|
||||
63 WR_DIS.BLK_VERSION_MAJOR EFUSE_BLK0 21 1
|
||||
64 WR_DIS.TEMP_CALIB EFUSE_BLK0 21 1
|
||||
65 WR_DIS.OCODE EFUSE_BLK0 21 1
|
||||
66 WR_DIS.ADC1_INIT_CODE_ATTEN0 EFUSE_BLK0 21 1
|
||||
67 WR_DIS.ADC1_INIT_CODE_ATTEN1 EFUSE_BLK0 21 1
|
||||
68 WR_DIS.ADC1_INIT_CODE_ATTEN2 EFUSE_BLK0 21 1
|
||||
69 WR_DIS.ADC1_INIT_CODE_ATTEN3 EFUSE_BLK0 21 1
|
||||
70 WR_DIS.ADC1_CAL_VOL_ATTEN0 EFUSE_BLK0 21 1
|
||||
71 WR_DIS.ADC1_CAL_VOL_ATTEN1 EFUSE_BLK0 21 1
|
||||
72 WR_DIS.ADC1_CAL_VOL_ATTEN2 EFUSE_BLK0 21 1
|
||||
73 WR_DIS.ADC1_CAL_VOL_ATTEN3 EFUSE_BLK0 21 1
|
||||
74 WR_DIS.BLOCK_USR_DATA EFUSE_BLK0 22 1
|
||||
75 WR_DIS.CUSTOM_MAC EFUSE_BLK0 22 1
|
||||
76 WR_DIS.BLOCK_KEY0 EFUSE_BLK0 23 1
|
||||
77 WR_DIS.BLOCK_KEY1 EFUSE_BLK0 24 1
|
||||
78 WR_DIS.BLOCK_KEY2 EFUSE_BLK0 25 1
|
||||
79 WR_DIS.BLOCK_KEY3 EFUSE_BLK0 26 1
|
||||
80 WR_DIS.BLOCK_KEY4 EFUSE_BLK0 27 1
|
||||
81 WR_DIS.BLOCK_KEY5 EFUSE_BLK0 28 1
|
||||
82 WR_DIS.BLOCK_SYS_DATA2 EFUSE_BLK0 29 1
|
||||
83 WR_DIS.USB_EXCHG_PINS EFUSE_BLK0 30 1
|
||||
84 WR_DIS.VDD_SPI_AS_GPIO EFUSE_BLK0 30 1
|
||||
85 WR_DIS.SOFT_DIS_JTAG EFUSE_BLK0 31 1
|
||||
86 RD_DIS EFUSE_BLK0 32 7
|
||||
87 RD_DIS.BLOCK_KEY0 EFUSE_BLK0 32 1
|
||||
88 RD_DIS.BLOCK_KEY1 EFUSE_BLK0 33 1
|
||||
89 RD_DIS.BLOCK_KEY2 EFUSE_BLK0 34 1
|
||||
90 RD_DIS.BLOCK_KEY3 EFUSE_BLK0 35 1
|
||||
91 RD_DIS.BLOCK_KEY4 EFUSE_BLK0 36 1
|
||||
92 RD_DIS.BLOCK_KEY5 EFUSE_BLK0 37 1
|
||||
93 RD_DIS.BLOCK_SYS_DATA2 EFUSE_BLK0 38 1
|
||||
94 DIS_ICACHE EFUSE_BLK0 40 1
|
||||
95 DIS_USB_JTAG EFUSE_BLK0 41 1
|
||||
96 DIS_DOWNLOAD_ICACHE EFUSE_BLK0 42 1
|
||||
97 DIS_USB_SERIAL_JTAG EFUSE_BLK0 43 1
|
||||
98 DIS_FORCE_DOWNLOAD EFUSE_BLK0 44 1
|
||||
99 DIS_TWAI EFUSE_BLK0 46 1
|
||||
100 JTAG_SEL_ENABLE EFUSE_BLK0 47 1
|
||||
101 SOFT_DIS_JTAG EFUSE_BLK0 48 3
|
||||
102 DIS_PAD_JTAG EFUSE_BLK0 51 1
|
||||
103 DIS_DOWNLOAD_MANUAL_ENCRYPT EFUSE_BLK0 52 1
|
||||
104 USB_EXCHG_PINS EFUSE_BLK0 57 1
|
||||
105 VDD_SPI_AS_GPIO EFUSE_BLK0 58 1
|
||||
106 WDT_DELAY_SEL EFUSE_BLK0 80 2
|
||||
107 SPI_BOOT_CRYPT_CNT EFUSE_BLK0 82 3
|
||||
108 SECURE_BOOT_KEY_REVOKE0 EFUSE_BLK0 85 1
|
||||
109 SECURE_BOOT_KEY_REVOKE1 EFUSE_BLK0 86 1
|
||||
110 SECURE_BOOT_KEY_REVOKE2 EFUSE_BLK0 87 1
|
||||
111 KEY_PURPOSE_0 EFUSE_BLK0 88 4
|
||||
112 KEY_PURPOSE_1 EFUSE_BLK0 92 4
|
||||
113 KEY_PURPOSE_2 EFUSE_BLK0 96 4
|
||||
114 KEY_PURPOSE_3 EFUSE_BLK0 100 4
|
||||
115 KEY_PURPOSE_4 EFUSE_BLK0 104 4
|
||||
116 KEY_PURPOSE_5 EFUSE_BLK0 108 4
|
||||
117 SECURE_BOOT_EN EFUSE_BLK0 116 1
|
||||
118 SECURE_BOOT_AGGRESSIVE_REVOKE EFUSE_BLK0 117 1
|
||||
119 FLASH_TPUW EFUSE_BLK0 124 4
|
||||
120 DIS_DOWNLOAD_MODE EFUSE_BLK0 128 1
|
||||
121 DIS_DIRECT_BOOT EFUSE_BLK0 129 1
|
||||
122 DIS_USB_SERIAL_JTAG_ROM_PRINT EFUSE_BLK0 130 1
|
||||
123 DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE EFUSE_BLK0 132 1
|
||||
124 ENABLE_SECURITY_DOWNLOAD EFUSE_BLK0 133 1
|
||||
125 UART_PRINT_CONTROL EFUSE_BLK0 134 2
|
||||
126 FORCE_SEND_RESUME EFUSE_BLK0 141 1
|
||||
127 SECURE_VERSION EFUSE_BLK0 142 16
|
||||
128 ERR_RST_ENABLE EFUSE_BLK0 159 1
|
||||
129 DISABLE_WAFER_VERSION_MAJOR EFUSE_BLK0 160 1
|
||||
130 DISABLE_BLK_VERSION_MAJOR EFUSE_BLK0 161 1
|
||||
131 MAC EFUSE_BLK1 0 8
|
||||
132 MAC EFUSE_BLK1 8 8
|
||||
133 MAC EFUSE_BLK1 16 8
|
||||
134 MAC EFUSE_BLK1 24 8
|
||||
135 MAC EFUSE_BLK1 32 8
|
||||
136 MAC EFUSE_BLK1 40 8
|
||||
137 SPI_PAD_CONFIG_CLK EFUSE_BLK1 48 6
|
||||
138 SPI_PAD_CONFIG_Q EFUSE_BLK1 54 6
|
||||
139 SPI_PAD_CONFIG_D EFUSE_BLK1 60 6
|
||||
140 SPI_PAD_CONFIG_CS EFUSE_BLK1 66 6
|
||||
141 SPI_PAD_CONFIG_HD EFUSE_BLK1 72 6
|
||||
142 SPI_PAD_CONFIG_WP EFUSE_BLK1 78 6
|
||||
143 SPI_PAD_CONFIG_DQS EFUSE_BLK1 84 6
|
||||
144 SPI_PAD_CONFIG_D4 EFUSE_BLK1 90 6
|
||||
145 SPI_PAD_CONFIG_D5 EFUSE_BLK1 96 6
|
||||
146 SPI_PAD_CONFIG_D6 EFUSE_BLK1 102 6
|
||||
147 SPI_PAD_CONFIG_D7 EFUSE_BLK1 108 6
|
||||
148 WAFER_VERSION_MINOR_LO EFUSE_BLK1 114 3
|
||||
149 PKG_VERSION EFUSE_BLK1 117 3
|
||||
150 BLK_VERSION_MINOR EFUSE_BLK1 120 3
|
||||
151 K_RTC_LDO EFUSE_BLK1 135 7
|
||||
152 K_DIG_LDO EFUSE_BLK1 142 7
|
||||
153 V_RTC_DBIAS20 EFUSE_BLK1 149 8
|
||||
154 V_DIG_DBIAS20 EFUSE_BLK1 157 8
|
||||
155 DIG_DBIAS_HVT EFUSE_BLK1 165 5
|
||||
156 THRES_HVT EFUSE_BLK1 170 10
|
||||
157 WAFER_VERSION_MINOR_HI EFUSE_BLK1 183 1
|
||||
158 WAFER_VERSION_MAJOR EFUSE_BLK1 184 2
|
||||
159 SYS_DATA_PART2 EFUSE_BLK10 0 256
|
||||
160 OPTIONAL_UNIQUE_ID EFUSE_BLK2 0 128
|
||||
161 BLK_VERSION_MAJOR EFUSE_BLK2 128 2
|
||||
162 TEMP_CALIB EFUSE_BLK2 131 9
|
||||
163 OCODE EFUSE_BLK2 140 8
|
||||
164 ADC1_INIT_CODE_ATTEN0 EFUSE_BLK2 148 10
|
||||
165 ADC1_INIT_CODE_ATTEN1 EFUSE_BLK2 158 10
|
||||
166 ADC1_INIT_CODE_ATTEN2 EFUSE_BLK2 168 10
|
||||
167 ADC1_INIT_CODE_ATTEN3 EFUSE_BLK2 178 10
|
||||
168 ADC1_CAL_VOL_ATTEN0 EFUSE_BLK2 188 10
|
||||
169 ADC1_CAL_VOL_ATTEN1 EFUSE_BLK2 198 10
|
||||
170 ADC1_CAL_VOL_ATTEN2 EFUSE_BLK2 208 10
|
||||
171 ADC1_CAL_VOL_ATTEN3 EFUSE_BLK2 218 10
|
||||
172 USER_DATA EFUSE_BLK3 0 256
|
||||
173 USER_DATA.MAC_CUSTOM EFUSE_BLK3 200 48
|
||||
174 KEY0 EFUSE_BLK4 0 256
|
||||
175 KEY1 EFUSE_BLK5 0 256
|
||||
176 KEY2 EFUSE_BLK6 0 256
|
||||
177 KEY3 EFUSE_BLK7 0 256
|
||||
178 KEY4 EFUSE_BLK8 0 256
|
||||
179 KEY5 EFUSE_BLK9 0 256
|
||||
1 WR_DIS EFUSE_BLK0 0 32
|
||||
2 WR_DIS.RD_DIS EFUSE_BLK0 0 1
|
||||
3 WR_DIS.DIS_ICACHE EFUSE_BLK0 2 1
|
||||
4 WR_DIS.DIS_USB_JTAG EFUSE_BLK0 2 1
|
||||
5 WR_DIS.DIS_DOWNLOAD_ICACHE EFUSE_BLK0 2 1
|
||||
6 WR_DIS.DIS_USB_SERIAL_JTAG EFUSE_BLK0 2 1
|
||||
7 WR_DIS.DIS_FORCE_DOWNLOAD EFUSE_BLK0 2 1
|
||||
8 WR_DIS.DIS_TWAI EFUSE_BLK0 2 1
|
||||
9 WR_DIS.JTAG_SEL_ENABLE EFUSE_BLK0 2 1
|
||||
10 WR_DIS.DIS_PAD_JTAG EFUSE_BLK0 2 1
|
||||
11 WR_DIS.DIS_DOWNLOAD_MANUAL_ENCRYPT EFUSE_BLK0 2 1
|
||||
12 WR_DIS.WDT_DELAY_SEL EFUSE_BLK0 3 1
|
||||
13 WR_DIS.SPI_BOOT_CRYPT_CNT EFUSE_BLK0 4 1
|
||||
14 WR_DIS.SECURE_BOOT_KEY_REVOKE0 EFUSE_BLK0 5 1
|
||||
15 WR_DIS.SECURE_BOOT_KEY_REVOKE1 EFUSE_BLK0 6 1
|
||||
16 WR_DIS.SECURE_BOOT_KEY_REVOKE2 EFUSE_BLK0 7 1
|
||||
17 WR_DIS.KEY_PURPOSE_0 EFUSE_BLK0 8 1
|
||||
18 WR_DIS.KEY_PURPOSE_1 EFUSE_BLK0 9 1
|
||||
19 WR_DIS.KEY_PURPOSE_2 EFUSE_BLK0 10 1
|
||||
20 WR_DIS.KEY_PURPOSE_3 EFUSE_BLK0 11 1
|
||||
21 WR_DIS.KEY_PURPOSE_4 EFUSE_BLK0 12 1
|
||||
22 WR_DIS.KEY_PURPOSE_5 EFUSE_BLK0 13 1
|
||||
23 WR_DIS.SECURE_BOOT_EN EFUSE_BLK0 15 1
|
||||
24 WR_DIS.SECURE_BOOT_AGGRESSIVE_REVOKE EFUSE_BLK0 16 1
|
||||
25 WR_DIS.FLASH_TPUW EFUSE_BLK0 18 1
|
||||
26 WR_DIS.DIS_DOWNLOAD_MODE EFUSE_BLK0 18 1
|
||||
27 WR_DIS.DIS_DIRECT_BOOT EFUSE_BLK0 18 1
|
||||
28 WR_DIS.DIS_USB_SERIAL_JTAG_ROM_PRINT EFUSE_BLK0 18 1
|
||||
29 WR_DIS.DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE EFUSE_BLK0 18 1
|
||||
30 WR_DIS.ENABLE_SECURITY_DOWNLOAD EFUSE_BLK0 18 1
|
||||
31 WR_DIS.UART_PRINT_CONTROL EFUSE_BLK0 18 1
|
||||
32 WR_DIS.FORCE_SEND_RESUME EFUSE_BLK0 18 1
|
||||
33 WR_DIS.SECURE_VERSION EFUSE_BLK0 18 1
|
||||
34 WR_DIS.ERR_RST_ENABLE EFUSE_BLK0 19 1
|
||||
35 WR_DIS.DISABLE_WAFER_VERSION_MAJOR EFUSE_BLK0 19 1
|
||||
36 WR_DIS.DISABLE_BLK_VERSION_MAJOR EFUSE_BLK0 19 1
|
||||
37 WR_DIS.BLK1 EFUSE_BLK0 20 1
|
||||
38 WR_DIS.MAC EFUSE_BLK0 20 1
|
||||
39 WR_DIS.SPI_PAD_CONFIG_CLK EFUSE_BLK0 20 1
|
||||
40 WR_DIS.SPI_PAD_CONFIG_Q EFUSE_BLK0 20 1
|
||||
41 WR_DIS.SPI_PAD_CONFIG_D EFUSE_BLK0 20 1
|
||||
42 WR_DIS.SPI_PAD_CONFIG_CS EFUSE_BLK0 20 1
|
||||
43 WR_DIS.SPI_PAD_CONFIG_HD EFUSE_BLK0 20 1
|
||||
44 WR_DIS.SPI_PAD_CONFIG_WP EFUSE_BLK0 20 1
|
||||
45 WR_DIS.SPI_PAD_CONFIG_DQS EFUSE_BLK0 20 1
|
||||
46 WR_DIS.SPI_PAD_CONFIG_D4 EFUSE_BLK0 20 1
|
||||
47 WR_DIS.SPI_PAD_CONFIG_D5 EFUSE_BLK0 20 1
|
||||
48 WR_DIS.SPI_PAD_CONFIG_D6 EFUSE_BLK0 20 1
|
||||
49 WR_DIS.SPI_PAD_CONFIG_D7 EFUSE_BLK0 20 1
|
||||
50 WR_DIS.WAFER_VERSION_MINOR_LO EFUSE_BLK0 20 1
|
||||
51 WR_DIS.PKG_VERSION EFUSE_BLK0 20 1
|
||||
52 WR_DIS.BLK_VERSION_MINOR EFUSE_BLK0 20 1
|
||||
53 WR_DIS.K_RTC_LDO EFUSE_BLK0 20 1
|
||||
54 WR_DIS.K_DIG_LDO EFUSE_BLK0 20 1
|
||||
55 WR_DIS.V_RTC_DBIAS20 EFUSE_BLK0 20 1
|
||||
56 WR_DIS.V_DIG_DBIAS20 EFUSE_BLK0 20 1
|
||||
57 WR_DIS.DIG_DBIAS_HVT EFUSE_BLK0 20 1
|
||||
58 WR_DIS.THRES_HVT EFUSE_BLK0 20 1
|
||||
59 WR_DIS.WAFER_VERSION_MINOR_HI EFUSE_BLK0 20 1
|
||||
60 WR_DIS.WAFER_VERSION_MAJOR EFUSE_BLK0 20 1
|
||||
61 WR_DIS.SYS_DATA_PART1 EFUSE_BLK0 21 1
|
||||
62 WR_DIS.OPTIONAL_UNIQUE_ID EFUSE_BLK0 21 1
|
||||
63 WR_DIS.BLK_VERSION_MAJOR EFUSE_BLK0 21 1
|
||||
64 WR_DIS.TEMP_CALIB EFUSE_BLK0 21 1
|
||||
65 WR_DIS.OCODE EFUSE_BLK0 21 1
|
||||
66 WR_DIS.ADC1_INIT_CODE_ATTEN0 EFUSE_BLK0 21 1
|
||||
67 WR_DIS.ADC1_INIT_CODE_ATTEN1 EFUSE_BLK0 21 1
|
||||
68 WR_DIS.ADC1_INIT_CODE_ATTEN2 EFUSE_BLK0 21 1
|
||||
69 WR_DIS.ADC1_INIT_CODE_ATTEN3 EFUSE_BLK0 21 1
|
||||
70 WR_DIS.ADC1_CAL_VOL_ATTEN0 EFUSE_BLK0 21 1
|
||||
71 WR_DIS.ADC1_CAL_VOL_ATTEN1 EFUSE_BLK0 21 1
|
||||
72 WR_DIS.ADC1_CAL_VOL_ATTEN2 EFUSE_BLK0 21 1
|
||||
73 WR_DIS.ADC1_CAL_VOL_ATTEN3 EFUSE_BLK0 21 1
|
||||
74 WR_DIS.BLOCK_USR_DATA EFUSE_BLK0 22 1
|
||||
75 WR_DIS.CUSTOM_MAC EFUSE_BLK0 22 1
|
||||
76 WR_DIS.BLOCK_KEY0 EFUSE_BLK0 23 1
|
||||
77 WR_DIS.BLOCK_KEY1 EFUSE_BLK0 24 1
|
||||
78 WR_DIS.BLOCK_KEY2 EFUSE_BLK0 25 1
|
||||
79 WR_DIS.BLOCK_KEY3 EFUSE_BLK0 26 1
|
||||
80 WR_DIS.BLOCK_KEY4 EFUSE_BLK0 27 1
|
||||
81 WR_DIS.BLOCK_KEY5 EFUSE_BLK0 28 1
|
||||
82 WR_DIS.BLOCK_SYS_DATA2 EFUSE_BLK0 29 1
|
||||
83 WR_DIS.USB_EXCHG_PINS EFUSE_BLK0 30 1
|
||||
84 WR_DIS.VDD_SPI_AS_GPIO EFUSE_BLK0 30 1
|
||||
85 WR_DIS.SOFT_DIS_JTAG EFUSE_BLK0 31 1
|
||||
86 RD_DIS EFUSE_BLK0 32 7
|
||||
87 RD_DIS.BLOCK_KEY0 EFUSE_BLK0 32 1
|
||||
88 RD_DIS.BLOCK_KEY1 EFUSE_BLK0 33 1
|
||||
89 RD_DIS.BLOCK_KEY2 EFUSE_BLK0 34 1
|
||||
90 RD_DIS.BLOCK_KEY3 EFUSE_BLK0 35 1
|
||||
91 RD_DIS.BLOCK_KEY4 EFUSE_BLK0 36 1
|
||||
92 RD_DIS.BLOCK_KEY5 EFUSE_BLK0 37 1
|
||||
93 RD_DIS.BLOCK_SYS_DATA2 EFUSE_BLK0 38 1
|
||||
94 DIS_ICACHE EFUSE_BLK0 40 1
|
||||
95 DIS_USB_JTAG EFUSE_BLK0 41 1
|
||||
96 DIS_DOWNLOAD_ICACHE EFUSE_BLK0 42 1
|
||||
97 DIS_USB_SERIAL_JTAG EFUSE_BLK0 43 1
|
||||
98 DIS_FORCE_DOWNLOAD EFUSE_BLK0 44 1
|
||||
99 DIS_TWAI EFUSE_BLK0 46 1
|
||||
100 JTAG_SEL_ENABLE EFUSE_BLK0 47 1
|
||||
101 SOFT_DIS_JTAG EFUSE_BLK0 48 3
|
||||
102 DIS_PAD_JTAG EFUSE_BLK0 51 1
|
||||
103 DIS_DOWNLOAD_MANUAL_ENCRYPT EFUSE_BLK0 52 1
|
||||
104 USB_EXCHG_PINS EFUSE_BLK0 57 1
|
||||
105 VDD_SPI_AS_GPIO EFUSE_BLK0 58 1
|
||||
106 WDT_DELAY_SEL EFUSE_BLK0 80 2
|
||||
107 SPI_BOOT_CRYPT_CNT EFUSE_BLK0 82 3
|
||||
108 SECURE_BOOT_KEY_REVOKE0 EFUSE_BLK0 85 1
|
||||
109 SECURE_BOOT_KEY_REVOKE1 EFUSE_BLK0 86 1
|
||||
110 SECURE_BOOT_KEY_REVOKE2 EFUSE_BLK0 87 1
|
||||
111 KEY_PURPOSE_0 EFUSE_BLK0 88 4
|
||||
112 KEY_PURPOSE_1 EFUSE_BLK0 92 4
|
||||
113 KEY_PURPOSE_2 EFUSE_BLK0 96 4
|
||||
114 KEY_PURPOSE_3 EFUSE_BLK0 100 4
|
||||
115 KEY_PURPOSE_4 EFUSE_BLK0 104 4
|
||||
116 KEY_PURPOSE_5 EFUSE_BLK0 108 4
|
||||
117 SECURE_BOOT_EN EFUSE_BLK0 116 1
|
||||
118 SECURE_BOOT_AGGRESSIVE_REVOKE EFUSE_BLK0 117 1
|
||||
119 FLASH_TPUW EFUSE_BLK0 124 4
|
||||
120 DIS_DOWNLOAD_MODE EFUSE_BLK0 128 1
|
||||
121 DIS_DIRECT_BOOT EFUSE_BLK0 129 1
|
||||
122 DIS_USB_SERIAL_JTAG_ROM_PRINT EFUSE_BLK0 130 1
|
||||
123 DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE EFUSE_BLK0 132 1
|
||||
124 ENABLE_SECURITY_DOWNLOAD EFUSE_BLK0 133 1
|
||||
125 UART_PRINT_CONTROL EFUSE_BLK0 134 2
|
||||
126 FORCE_SEND_RESUME EFUSE_BLK0 141 1
|
||||
127 SECURE_VERSION EFUSE_BLK0 142 16
|
||||
128 ERR_RST_ENABLE EFUSE_BLK0 159 1
|
||||
129 DISABLE_WAFER_VERSION_MAJOR EFUSE_BLK0 160 1
|
||||
130 DISABLE_BLK_VERSION_MAJOR EFUSE_BLK0 161 1
|
||||
131 MAC EFUSE_BLK1 0 8
|
||||
132 MAC EFUSE_BLK1 8 8
|
||||
133 MAC EFUSE_BLK1 16 8
|
||||
134 MAC EFUSE_BLK1 24 8
|
||||
135 MAC EFUSE_BLK1 32 8
|
||||
136 MAC EFUSE_BLK1 40 8
|
||||
137 SPI_PAD_CONFIG_CLK EFUSE_BLK1 48 6
|
||||
138 SPI_PAD_CONFIG_Q EFUSE_BLK1 54 6
|
||||
139 SPI_PAD_CONFIG_D EFUSE_BLK1 60 6
|
||||
140 SPI_PAD_CONFIG_CS EFUSE_BLK1 66 6
|
||||
141 SPI_PAD_CONFIG_HD EFUSE_BLK1 72 6
|
||||
142 SPI_PAD_CONFIG_WP EFUSE_BLK1 78 6
|
||||
143 SPI_PAD_CONFIG_DQS EFUSE_BLK1 84 6
|
||||
144 SPI_PAD_CONFIG_D4 EFUSE_BLK1 90 6
|
||||
145 SPI_PAD_CONFIG_D5 EFUSE_BLK1 96 6
|
||||
146 SPI_PAD_CONFIG_D6 EFUSE_BLK1 102 6
|
||||
147 SPI_PAD_CONFIG_D7 EFUSE_BLK1 108 6
|
||||
148 WAFER_VERSION_MINOR_LO EFUSE_BLK1 114 3
|
||||
149 PKG_VERSION EFUSE_BLK1 117 3
|
||||
150 BLK_VERSION_MINOR EFUSE_BLK1 120 3
|
||||
151 K_RTC_LDO EFUSE_BLK1 135 7
|
||||
152 K_DIG_LDO EFUSE_BLK1 142 7
|
||||
153 V_RTC_DBIAS20 EFUSE_BLK1 149 8
|
||||
154 V_DIG_DBIAS20 EFUSE_BLK1 157 8
|
||||
155 DIG_DBIAS_HVT EFUSE_BLK1 165 5
|
||||
156 THRES_HVT EFUSE_BLK1 170 10
|
||||
157 WAFER_VERSION_MINOR_HI EFUSE_BLK1 183 1
|
||||
158 WAFER_VERSION_MAJOR EFUSE_BLK1 184 2
|
||||
159 SYS_DATA_PART2 EFUSE_BLK10 0 256
|
||||
160 OPTIONAL_UNIQUE_ID EFUSE_BLK2 0 128
|
||||
161 BLK_VERSION_MAJOR EFUSE_BLK2 128 2
|
||||
162 TEMP_CALIB EFUSE_BLK2 131 9
|
||||
163 OCODE EFUSE_BLK2 140 8
|
||||
164 ADC1_INIT_CODE_ATTEN0 EFUSE_BLK2 148 10
|
||||
165 ADC1_INIT_CODE_ATTEN1 EFUSE_BLK2 158 10
|
||||
166 ADC1_INIT_CODE_ATTEN2 EFUSE_BLK2 168 10
|
||||
167 ADC1_INIT_CODE_ATTEN3 EFUSE_BLK2 178 10
|
||||
168 ADC1_CAL_VOL_ATTEN0 EFUSE_BLK2 188 10
|
||||
169 ADC1_CAL_VOL_ATTEN1 EFUSE_BLK2 198 10
|
||||
170 ADC1_CAL_VOL_ATTEN2 EFUSE_BLK2 208 10
|
||||
171 ADC1_CAL_VOL_ATTEN3 EFUSE_BLK2 218 10
|
||||
172 USER_DATA EFUSE_BLK3 0 256
|
||||
173 USER_DATA.MAC_CUSTOM EFUSE_BLK3 200 48
|
||||
174 KEY0 EFUSE_BLK4 0 256
|
||||
175 KEY1 EFUSE_BLK5 0 256
|
||||
176 KEY2 EFUSE_BLK6 0 256
|
||||
177 KEY3 EFUSE_BLK7 0 256
|
||||
178 KEY4 EFUSE_BLK8 0 256
|
||||
179 KEY5 EFUSE_BLK9 0 256
|
||||
|
||||
Used bits in efuse table:
|
||||
EFUSE_BLK0
|
||||
[0 31] [0 0] [2 2] ... [40 44] [46 52] [57 58] [80 111] [116 117] [124 130] [132 135] [141 157] [159 161]
|
||||
EFUSE_BLK1
|
||||
[0 122] [135 179] [183 185]
|
||||
EFUSE_BLK10
|
||||
[0 255]
|
||||
EFUSE_BLK2
|
||||
[0 129] [131 227]
|
||||
EFUSE_BLK3
|
||||
[0 255] [200 247]
|
||||
EFUSE_BLK4
|
||||
[0 255]
|
||||
EFUSE_BLK5
|
||||
[0 255]
|
||||
EFUSE_BLK6
|
||||
[0 255]
|
||||
EFUSE_BLK7
|
||||
[0 255]
|
||||
EFUSE_BLK8
|
||||
[0 255]
|
||||
EFUSE_BLK9
|
||||
[0 255]
|
||||
EFUSE_BLK0
|
||||
[0 31] [0 0] [2 2] ... [40 44] [46 52] [57 58] [80 111] [116 117] [124 130] [132 135] [141 157] [159 161]
|
||||
EFUSE_BLK1
|
||||
[0 122] [135 179] [183 185]
|
||||
EFUSE_BLK10
|
||||
[0 255]
|
||||
EFUSE_BLK2
|
||||
[0 129] [131 227]
|
||||
EFUSE_BLK3
|
||||
[0 255] [200 247]
|
||||
EFUSE_BLK4
|
||||
[0 255]
|
||||
EFUSE_BLK5
|
||||
[0 255]
|
||||
EFUSE_BLK6
|
||||
[0 255]
|
||||
EFUSE_BLK7
|
||||
[0 255]
|
||||
EFUSE_BLK8
|
||||
[0 255]
|
||||
EFUSE_BLK9
|
||||
[0 255]
|
||||
Note: Not printed ranges are free for using. (bits in EFUSE_BLK0 are reserved for Espressif)
|
||||
|
||||
@@ -8,167 +8,167 @@
|
||||
Verifying efuse table...
|
||||
Sorted efuse table:
|
||||
# field_name efuse_block bit_start bit_count
|
||||
1 WR_DIS EFUSE_BLK0 0 32
|
||||
2 WR_DIS.RD_DIS EFUSE_BLK0 0 1
|
||||
3 WR_DIS.CRYPT_DPA_ENABLE EFUSE_BLK0 1 1
|
||||
4 WR_DIS.SWAP_UART_SDIO_EN EFUSE_BLK0 2 1
|
||||
5 WR_DIS.DIS_ICACHE EFUSE_BLK0 2 1
|
||||
6 WR_DIS.DIS_USB_JTAG EFUSE_BLK0 2 1
|
||||
7 WR_DIS.DIS_DOWNLOAD_ICACHE EFUSE_BLK0 2 1
|
||||
8 WR_DIS.DIS_USB_SERIAL_JTAG EFUSE_BLK0 2 1
|
||||
9 WR_DIS.DIS_FORCE_DOWNLOAD EFUSE_BLK0 2 1
|
||||
10 WR_DIS.DIS_TWAI EFUSE_BLK0 2 1
|
||||
11 WR_DIS.JTAG_SEL_ENABLE EFUSE_BLK0 2 1
|
||||
12 WR_DIS.DIS_PAD_JTAG EFUSE_BLK0 2 1
|
||||
13 WR_DIS.DIS_DOWNLOAD_MANUAL_ENCRYPT EFUSE_BLK0 2 1
|
||||
14 WR_DIS.WDT_DELAY_SEL EFUSE_BLK0 3 1
|
||||
15 WR_DIS.SPI_BOOT_CRYPT_CNT EFUSE_BLK0 4 1
|
||||
16 WR_DIS.SECURE_BOOT_KEY_REVOKE0 EFUSE_BLK0 5 1
|
||||
17 WR_DIS.SECURE_BOOT_KEY_REVOKE1 EFUSE_BLK0 6 1
|
||||
18 WR_DIS.SECURE_BOOT_KEY_REVOKE2 EFUSE_BLK0 7 1
|
||||
19 WR_DIS.KEY_PURPOSE_0 EFUSE_BLK0 8 1
|
||||
20 WR_DIS.KEY_PURPOSE_1 EFUSE_BLK0 9 1
|
||||
21 WR_DIS.KEY_PURPOSE_2 EFUSE_BLK0 10 1
|
||||
22 WR_DIS.KEY_PURPOSE_3 EFUSE_BLK0 11 1
|
||||
23 WR_DIS.KEY_PURPOSE_4 EFUSE_BLK0 12 1
|
||||
24 WR_DIS.KEY_PURPOSE_5 EFUSE_BLK0 13 1
|
||||
25 WR_DIS.SEC_DPA_LEVEL EFUSE_BLK0 14 1
|
||||
26 WR_DIS.SECURE_BOOT_EN EFUSE_BLK0 15 1
|
||||
27 WR_DIS.SECURE_BOOT_AGGRESSIVE_REVOKE EFUSE_BLK0 16 1
|
||||
28 WR_DIS.SPI_DOWNLOAD_MSPI_DIS EFUSE_BLK0 17 1
|
||||
29 WR_DIS.FLASH_TPUW EFUSE_BLK0 18 1
|
||||
30 WR_DIS.DIS_DOWNLOAD_MODE EFUSE_BLK0 18 1
|
||||
31 WR_DIS.DIS_DIRECT_BOOT EFUSE_BLK0 18 1
|
||||
32 WR_DIS.DIS_USB_SERIAL_JTAG_ROM_PRINT EFUSE_BLK0 18 1
|
||||
33 WR_DIS.DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE EFUSE_BLK0 18 1
|
||||
34 WR_DIS.ENABLE_SECURITY_DOWNLOAD EFUSE_BLK0 18 1
|
||||
35 WR_DIS.UART_PRINT_CONTROL EFUSE_BLK0 18 1
|
||||
36 WR_DIS.FORCE_SEND_RESUME EFUSE_BLK0 18 1
|
||||
37 WR_DIS.SECURE_VERSION EFUSE_BLK0 18 1
|
||||
38 WR_DIS.SECURE_BOOT_DISABLE_FAST_WAKE EFUSE_BLK0 19 1
|
||||
39 WR_DIS.DISABLE_WAFER_VERSION_MAJOR EFUSE_BLK0 19 1
|
||||
40 WR_DIS.DISABLE_BLK_VERSION_MAJOR EFUSE_BLK0 19 1
|
||||
41 WR_DIS.BLK1 EFUSE_BLK0 20 1
|
||||
42 WR_DIS.MAC EFUSE_BLK0 20 1
|
||||
43 WR_DIS.MAC_EXT EFUSE_BLK0 20 1
|
||||
44 WR_DIS.WAFER_VERSION_MINOR EFUSE_BLK0 20 1
|
||||
45 WR_DIS.WAFER_VERSION_MAJOR EFUSE_BLK0 20 1
|
||||
46 WR_DIS.PKG_VERSION EFUSE_BLK0 20 1
|
||||
47 WR_DIS.BLK_VERSION_MINOR EFUSE_BLK0 20 1
|
||||
48 WR_DIS.BLK_VERSION_MAJOR EFUSE_BLK0 20 1
|
||||
49 WR_DIS.FLASH_CAP EFUSE_BLK0 20 1
|
||||
50 WR_DIS.FLASH_TEMP EFUSE_BLK0 20 1
|
||||
51 WR_DIS.FLASH_VENDOR EFUSE_BLK0 20 1
|
||||
52 WR_DIS.SYS_DATA_PART1 EFUSE_BLK0 21 1
|
||||
53 WR_DIS.OPTIONAL_UNIQUE_ID EFUSE_BLK0 21 1
|
||||
54 WR_DIS.BLOCK_USR_DATA EFUSE_BLK0 22 1
|
||||
55 WR_DIS.CUSTOM_MAC EFUSE_BLK0 22 1
|
||||
56 WR_DIS.BLOCK_KEY0 EFUSE_BLK0 23 1
|
||||
57 WR_DIS.BLOCK_KEY1 EFUSE_BLK0 24 1
|
||||
58 WR_DIS.BLOCK_KEY2 EFUSE_BLK0 25 1
|
||||
59 WR_DIS.BLOCK_KEY3 EFUSE_BLK0 26 1
|
||||
60 WR_DIS.BLOCK_KEY4 EFUSE_BLK0 27 1
|
||||
61 WR_DIS.BLOCK_KEY5 EFUSE_BLK0 28 1
|
||||
62 WR_DIS.BLOCK_SYS_DATA2 EFUSE_BLK0 29 1
|
||||
63 WR_DIS.USB_EXCHG_PINS EFUSE_BLK0 30 1
|
||||
64 WR_DIS.VDD_SPI_AS_GPIO EFUSE_BLK0 30 1
|
||||
65 WR_DIS.SOFT_DIS_JTAG EFUSE_BLK0 31 1
|
||||
66 RD_DIS EFUSE_BLK0 32 7
|
||||
67 RD_DIS.BLOCK_KEY0 EFUSE_BLK0 32 1
|
||||
68 RD_DIS.BLOCK_KEY1 EFUSE_BLK0 33 1
|
||||
69 RD_DIS.BLOCK_KEY2 EFUSE_BLK0 34 1
|
||||
70 RD_DIS.BLOCK_KEY3 EFUSE_BLK0 35 1
|
||||
71 RD_DIS.BLOCK_KEY4 EFUSE_BLK0 36 1
|
||||
72 RD_DIS.BLOCK_KEY5 EFUSE_BLK0 37 1
|
||||
73 RD_DIS.BLOCK_SYS_DATA2 EFUSE_BLK0 38 1
|
||||
74 SWAP_UART_SDIO_EN EFUSE_BLK0 39 1
|
||||
75 DIS_ICACHE EFUSE_BLK0 40 1
|
||||
76 DIS_USB_JTAG EFUSE_BLK0 41 1
|
||||
77 DIS_DOWNLOAD_ICACHE EFUSE_BLK0 42 1
|
||||
78 DIS_USB_SERIAL_JTAG EFUSE_BLK0 43 1
|
||||
79 DIS_FORCE_DOWNLOAD EFUSE_BLK0 44 1
|
||||
80 SPI_DOWNLOAD_MSPI_DIS EFUSE_BLK0 45 1
|
||||
81 DIS_TWAI EFUSE_BLK0 46 1
|
||||
82 JTAG_SEL_ENABLE EFUSE_BLK0 47 1
|
||||
83 SOFT_DIS_JTAG EFUSE_BLK0 48 3
|
||||
84 DIS_PAD_JTAG EFUSE_BLK0 51 1
|
||||
85 DIS_DOWNLOAD_MANUAL_ENCRYPT EFUSE_BLK0 52 1
|
||||
86 USB_EXCHG_PINS EFUSE_BLK0 57 1
|
||||
87 VDD_SPI_AS_GPIO EFUSE_BLK0 58 1
|
||||
88 WDT_DELAY_SEL EFUSE_BLK0 80 2
|
||||
89 SPI_BOOT_CRYPT_CNT EFUSE_BLK0 82 3
|
||||
90 SECURE_BOOT_KEY_REVOKE0 EFUSE_BLK0 85 1
|
||||
91 SECURE_BOOT_KEY_REVOKE1 EFUSE_BLK0 86 1
|
||||
92 SECURE_BOOT_KEY_REVOKE2 EFUSE_BLK0 87 1
|
||||
93 KEY_PURPOSE_0 EFUSE_BLK0 88 4
|
||||
94 KEY_PURPOSE_1 EFUSE_BLK0 92 4
|
||||
95 KEY_PURPOSE_2 EFUSE_BLK0 96 4
|
||||
96 KEY_PURPOSE_3 EFUSE_BLK0 100 4
|
||||
97 KEY_PURPOSE_4 EFUSE_BLK0 104 4
|
||||
98 KEY_PURPOSE_5 EFUSE_BLK0 108 4
|
||||
99 SEC_DPA_LEVEL EFUSE_BLK0 112 2
|
||||
100 CRYPT_DPA_ENABLE EFUSE_BLK0 114 1
|
||||
101 SECURE_BOOT_EN EFUSE_BLK0 116 1
|
||||
102 SECURE_BOOT_AGGRESSIVE_REVOKE EFUSE_BLK0 117 1
|
||||
103 FLASH_TPUW EFUSE_BLK0 124 4
|
||||
104 DIS_DOWNLOAD_MODE EFUSE_BLK0 128 1
|
||||
105 DIS_DIRECT_BOOT EFUSE_BLK0 129 1
|
||||
106 DIS_USB_SERIAL_JTAG_ROM_PRINT EFUSE_BLK0 130 1
|
||||
107 DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE EFUSE_BLK0 132 1
|
||||
108 ENABLE_SECURITY_DOWNLOAD EFUSE_BLK0 133 1
|
||||
109 UART_PRINT_CONTROL EFUSE_BLK0 134 2
|
||||
110 FORCE_SEND_RESUME EFUSE_BLK0 141 1
|
||||
111 SECURE_VERSION EFUSE_BLK0 142 16
|
||||
112 SECURE_BOOT_DISABLE_FAST_WAKE EFUSE_BLK0 158 1
|
||||
113 DISABLE_WAFER_VERSION_MAJOR EFUSE_BLK0 160 1
|
||||
114 DISABLE_BLK_VERSION_MAJOR EFUSE_BLK0 161 1
|
||||
115 MAC EFUSE_BLK1 0 8
|
||||
116 MAC EFUSE_BLK1 8 8
|
||||
117 MAC EFUSE_BLK1 16 8
|
||||
118 MAC EFUSE_BLK1 24 8
|
||||
119 MAC EFUSE_BLK1 32 8
|
||||
120 MAC EFUSE_BLK1 40 8
|
||||
121 MAC_EXT EFUSE_BLK1 48 16
|
||||
122 WAFER_VERSION_MINOR EFUSE_BLK1 114 4
|
||||
123 WAFER_VERSION_MAJOR EFUSE_BLK1 118 2
|
||||
124 PKG_VERSION EFUSE_BLK1 120 3
|
||||
125 BLK_VERSION_MINOR EFUSE_BLK1 123 3
|
||||
126 BLK_VERSION_MAJOR EFUSE_BLK1 126 2
|
||||
127 FLASH_CAP EFUSE_BLK1 128 3
|
||||
128 FLASH_TEMP EFUSE_BLK1 131 2
|
||||
129 FLASH_VENDOR EFUSE_BLK1 133 3
|
||||
130 SYS_DATA_PART2 EFUSE_BLK10 0 256
|
||||
131 OPTIONAL_UNIQUE_ID EFUSE_BLK2 0 128
|
||||
132 USER_DATA EFUSE_BLK3 0 256
|
||||
133 USER_DATA.MAC_CUSTOM EFUSE_BLK3 200 48
|
||||
134 KEY0 EFUSE_BLK4 0 256
|
||||
135 KEY1 EFUSE_BLK5 0 256
|
||||
136 KEY2 EFUSE_BLK6 0 256
|
||||
137 KEY3 EFUSE_BLK7 0 256
|
||||
138 KEY4 EFUSE_BLK8 0 256
|
||||
139 KEY5 EFUSE_BLK9 0 256
|
||||
1 WR_DIS EFUSE_BLK0 0 32
|
||||
2 WR_DIS.RD_DIS EFUSE_BLK0 0 1
|
||||
3 WR_DIS.CRYPT_DPA_ENABLE EFUSE_BLK0 1 1
|
||||
4 WR_DIS.SWAP_UART_SDIO_EN EFUSE_BLK0 2 1
|
||||
5 WR_DIS.DIS_ICACHE EFUSE_BLK0 2 1
|
||||
6 WR_DIS.DIS_USB_JTAG EFUSE_BLK0 2 1
|
||||
7 WR_DIS.DIS_DOWNLOAD_ICACHE EFUSE_BLK0 2 1
|
||||
8 WR_DIS.DIS_USB_SERIAL_JTAG EFUSE_BLK0 2 1
|
||||
9 WR_DIS.DIS_FORCE_DOWNLOAD EFUSE_BLK0 2 1
|
||||
10 WR_DIS.DIS_TWAI EFUSE_BLK0 2 1
|
||||
11 WR_DIS.JTAG_SEL_ENABLE EFUSE_BLK0 2 1
|
||||
12 WR_DIS.DIS_PAD_JTAG EFUSE_BLK0 2 1
|
||||
13 WR_DIS.DIS_DOWNLOAD_MANUAL_ENCRYPT EFUSE_BLK0 2 1
|
||||
14 WR_DIS.WDT_DELAY_SEL EFUSE_BLK0 3 1
|
||||
15 WR_DIS.SPI_BOOT_CRYPT_CNT EFUSE_BLK0 4 1
|
||||
16 WR_DIS.SECURE_BOOT_KEY_REVOKE0 EFUSE_BLK0 5 1
|
||||
17 WR_DIS.SECURE_BOOT_KEY_REVOKE1 EFUSE_BLK0 6 1
|
||||
18 WR_DIS.SECURE_BOOT_KEY_REVOKE2 EFUSE_BLK0 7 1
|
||||
19 WR_DIS.KEY_PURPOSE_0 EFUSE_BLK0 8 1
|
||||
20 WR_DIS.KEY_PURPOSE_1 EFUSE_BLK0 9 1
|
||||
21 WR_DIS.KEY_PURPOSE_2 EFUSE_BLK0 10 1
|
||||
22 WR_DIS.KEY_PURPOSE_3 EFUSE_BLK0 11 1
|
||||
23 WR_DIS.KEY_PURPOSE_4 EFUSE_BLK0 12 1
|
||||
24 WR_DIS.KEY_PURPOSE_5 EFUSE_BLK0 13 1
|
||||
25 WR_DIS.SEC_DPA_LEVEL EFUSE_BLK0 14 1
|
||||
26 WR_DIS.SECURE_BOOT_EN EFUSE_BLK0 15 1
|
||||
27 WR_DIS.SECURE_BOOT_AGGRESSIVE_REVOKE EFUSE_BLK0 16 1
|
||||
28 WR_DIS.SPI_DOWNLOAD_MSPI_DIS EFUSE_BLK0 17 1
|
||||
29 WR_DIS.FLASH_TPUW EFUSE_BLK0 18 1
|
||||
30 WR_DIS.DIS_DOWNLOAD_MODE EFUSE_BLK0 18 1
|
||||
31 WR_DIS.DIS_DIRECT_BOOT EFUSE_BLK0 18 1
|
||||
32 WR_DIS.DIS_USB_SERIAL_JTAG_ROM_PRINT EFUSE_BLK0 18 1
|
||||
33 WR_DIS.DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE EFUSE_BLK0 18 1
|
||||
34 WR_DIS.ENABLE_SECURITY_DOWNLOAD EFUSE_BLK0 18 1
|
||||
35 WR_DIS.UART_PRINT_CONTROL EFUSE_BLK0 18 1
|
||||
36 WR_DIS.FORCE_SEND_RESUME EFUSE_BLK0 18 1
|
||||
37 WR_DIS.SECURE_VERSION EFUSE_BLK0 18 1
|
||||
38 WR_DIS.SECURE_BOOT_DISABLE_FAST_WAKE EFUSE_BLK0 19 1
|
||||
39 WR_DIS.DISABLE_WAFER_VERSION_MAJOR EFUSE_BLK0 19 1
|
||||
40 WR_DIS.DISABLE_BLK_VERSION_MAJOR EFUSE_BLK0 19 1
|
||||
41 WR_DIS.BLK1 EFUSE_BLK0 20 1
|
||||
42 WR_DIS.MAC EFUSE_BLK0 20 1
|
||||
43 WR_DIS.MAC_EXT EFUSE_BLK0 20 1
|
||||
44 WR_DIS.WAFER_VERSION_MINOR EFUSE_BLK0 20 1
|
||||
45 WR_DIS.WAFER_VERSION_MAJOR EFUSE_BLK0 20 1
|
||||
46 WR_DIS.PKG_VERSION EFUSE_BLK0 20 1
|
||||
47 WR_DIS.BLK_VERSION_MINOR EFUSE_BLK0 20 1
|
||||
48 WR_DIS.BLK_VERSION_MAJOR EFUSE_BLK0 20 1
|
||||
49 WR_DIS.FLASH_CAP EFUSE_BLK0 20 1
|
||||
50 WR_DIS.FLASH_TEMP EFUSE_BLK0 20 1
|
||||
51 WR_DIS.FLASH_VENDOR EFUSE_BLK0 20 1
|
||||
52 WR_DIS.SYS_DATA_PART1 EFUSE_BLK0 21 1
|
||||
53 WR_DIS.OPTIONAL_UNIQUE_ID EFUSE_BLK0 21 1
|
||||
54 WR_DIS.BLOCK_USR_DATA EFUSE_BLK0 22 1
|
||||
55 WR_DIS.CUSTOM_MAC EFUSE_BLK0 22 1
|
||||
56 WR_DIS.BLOCK_KEY0 EFUSE_BLK0 23 1
|
||||
57 WR_DIS.BLOCK_KEY1 EFUSE_BLK0 24 1
|
||||
58 WR_DIS.BLOCK_KEY2 EFUSE_BLK0 25 1
|
||||
59 WR_DIS.BLOCK_KEY3 EFUSE_BLK0 26 1
|
||||
60 WR_DIS.BLOCK_KEY4 EFUSE_BLK0 27 1
|
||||
61 WR_DIS.BLOCK_KEY5 EFUSE_BLK0 28 1
|
||||
62 WR_DIS.BLOCK_SYS_DATA2 EFUSE_BLK0 29 1
|
||||
63 WR_DIS.USB_EXCHG_PINS EFUSE_BLK0 30 1
|
||||
64 WR_DIS.VDD_SPI_AS_GPIO EFUSE_BLK0 30 1
|
||||
65 WR_DIS.SOFT_DIS_JTAG EFUSE_BLK0 31 1
|
||||
66 RD_DIS EFUSE_BLK0 32 7
|
||||
67 RD_DIS.BLOCK_KEY0 EFUSE_BLK0 32 1
|
||||
68 RD_DIS.BLOCK_KEY1 EFUSE_BLK0 33 1
|
||||
69 RD_DIS.BLOCK_KEY2 EFUSE_BLK0 34 1
|
||||
70 RD_DIS.BLOCK_KEY3 EFUSE_BLK0 35 1
|
||||
71 RD_DIS.BLOCK_KEY4 EFUSE_BLK0 36 1
|
||||
72 RD_DIS.BLOCK_KEY5 EFUSE_BLK0 37 1
|
||||
73 RD_DIS.BLOCK_SYS_DATA2 EFUSE_BLK0 38 1
|
||||
74 SWAP_UART_SDIO_EN EFUSE_BLK0 39 1
|
||||
75 DIS_ICACHE EFUSE_BLK0 40 1
|
||||
76 DIS_USB_JTAG EFUSE_BLK0 41 1
|
||||
77 DIS_DOWNLOAD_ICACHE EFUSE_BLK0 42 1
|
||||
78 DIS_USB_SERIAL_JTAG EFUSE_BLK0 43 1
|
||||
79 DIS_FORCE_DOWNLOAD EFUSE_BLK0 44 1
|
||||
80 SPI_DOWNLOAD_MSPI_DIS EFUSE_BLK0 45 1
|
||||
81 DIS_TWAI EFUSE_BLK0 46 1
|
||||
82 JTAG_SEL_ENABLE EFUSE_BLK0 47 1
|
||||
83 SOFT_DIS_JTAG EFUSE_BLK0 48 3
|
||||
84 DIS_PAD_JTAG EFUSE_BLK0 51 1
|
||||
85 DIS_DOWNLOAD_MANUAL_ENCRYPT EFUSE_BLK0 52 1
|
||||
86 USB_EXCHG_PINS EFUSE_BLK0 57 1
|
||||
87 VDD_SPI_AS_GPIO EFUSE_BLK0 58 1
|
||||
88 WDT_DELAY_SEL EFUSE_BLK0 80 2
|
||||
89 SPI_BOOT_CRYPT_CNT EFUSE_BLK0 82 3
|
||||
90 SECURE_BOOT_KEY_REVOKE0 EFUSE_BLK0 85 1
|
||||
91 SECURE_BOOT_KEY_REVOKE1 EFUSE_BLK0 86 1
|
||||
92 SECURE_BOOT_KEY_REVOKE2 EFUSE_BLK0 87 1
|
||||
93 KEY_PURPOSE_0 EFUSE_BLK0 88 4
|
||||
94 KEY_PURPOSE_1 EFUSE_BLK0 92 4
|
||||
95 KEY_PURPOSE_2 EFUSE_BLK0 96 4
|
||||
96 KEY_PURPOSE_3 EFUSE_BLK0 100 4
|
||||
97 KEY_PURPOSE_4 EFUSE_BLK0 104 4
|
||||
98 KEY_PURPOSE_5 EFUSE_BLK0 108 4
|
||||
99 SEC_DPA_LEVEL EFUSE_BLK0 112 2
|
||||
100 CRYPT_DPA_ENABLE EFUSE_BLK0 114 1
|
||||
101 SECURE_BOOT_EN EFUSE_BLK0 116 1
|
||||
102 SECURE_BOOT_AGGRESSIVE_REVOKE EFUSE_BLK0 117 1
|
||||
103 FLASH_TPUW EFUSE_BLK0 124 4
|
||||
104 DIS_DOWNLOAD_MODE EFUSE_BLK0 128 1
|
||||
105 DIS_DIRECT_BOOT EFUSE_BLK0 129 1
|
||||
106 DIS_USB_SERIAL_JTAG_ROM_PRINT EFUSE_BLK0 130 1
|
||||
107 DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE EFUSE_BLK0 132 1
|
||||
108 ENABLE_SECURITY_DOWNLOAD EFUSE_BLK0 133 1
|
||||
109 UART_PRINT_CONTROL EFUSE_BLK0 134 2
|
||||
110 FORCE_SEND_RESUME EFUSE_BLK0 141 1
|
||||
111 SECURE_VERSION EFUSE_BLK0 142 16
|
||||
112 SECURE_BOOT_DISABLE_FAST_WAKE EFUSE_BLK0 158 1
|
||||
113 DISABLE_WAFER_VERSION_MAJOR EFUSE_BLK0 160 1
|
||||
114 DISABLE_BLK_VERSION_MAJOR EFUSE_BLK0 161 1
|
||||
115 MAC EFUSE_BLK1 0 8
|
||||
116 MAC EFUSE_BLK1 8 8
|
||||
117 MAC EFUSE_BLK1 16 8
|
||||
118 MAC EFUSE_BLK1 24 8
|
||||
119 MAC EFUSE_BLK1 32 8
|
||||
120 MAC EFUSE_BLK1 40 8
|
||||
121 MAC_EXT EFUSE_BLK1 48 16
|
||||
122 WAFER_VERSION_MINOR EFUSE_BLK1 114 4
|
||||
123 WAFER_VERSION_MAJOR EFUSE_BLK1 118 2
|
||||
124 PKG_VERSION EFUSE_BLK1 120 3
|
||||
125 BLK_VERSION_MINOR EFUSE_BLK1 123 3
|
||||
126 BLK_VERSION_MAJOR EFUSE_BLK1 126 2
|
||||
127 FLASH_CAP EFUSE_BLK1 128 3
|
||||
128 FLASH_TEMP EFUSE_BLK1 131 2
|
||||
129 FLASH_VENDOR EFUSE_BLK1 133 3
|
||||
130 SYS_DATA_PART2 EFUSE_BLK10 0 256
|
||||
131 OPTIONAL_UNIQUE_ID EFUSE_BLK2 0 128
|
||||
132 USER_DATA EFUSE_BLK3 0 256
|
||||
133 USER_DATA.MAC_CUSTOM EFUSE_BLK3 200 48
|
||||
134 KEY0 EFUSE_BLK4 0 256
|
||||
135 KEY1 EFUSE_BLK5 0 256
|
||||
136 KEY2 EFUSE_BLK6 0 256
|
||||
137 KEY3 EFUSE_BLK7 0 256
|
||||
138 KEY4 EFUSE_BLK8 0 256
|
||||
139 KEY5 EFUSE_BLK9 0 256
|
||||
|
||||
Used bits in efuse table:
|
||||
EFUSE_BLK0
|
||||
[0 31] [0 2] [2 2] ... [30 38] [32 52] [57 58] [80 114] [116 117] [124 130] [132 135] [141 158] [160 161]
|
||||
EFUSE_BLK1
|
||||
[0 63] [114 135]
|
||||
EFUSE_BLK10
|
||||
[0 255]
|
||||
EFUSE_BLK2
|
||||
[0 127]
|
||||
EFUSE_BLK3
|
||||
[0 255] [200 247]
|
||||
EFUSE_BLK4
|
||||
[0 255]
|
||||
EFUSE_BLK5
|
||||
[0 255]
|
||||
EFUSE_BLK6
|
||||
[0 255]
|
||||
EFUSE_BLK7
|
||||
[0 255]
|
||||
EFUSE_BLK8
|
||||
[0 255]
|
||||
EFUSE_BLK9
|
||||
[0 255]
|
||||
EFUSE_BLK0
|
||||
[0 31] [0 2] [2 2] ... [30 38] [32 52] [57 58] [80 114] [116 117] [124 130] [132 135] [141 158] [160 161]
|
||||
EFUSE_BLK1
|
||||
[0 63] [114 135]
|
||||
EFUSE_BLK10
|
||||
[0 255]
|
||||
EFUSE_BLK2
|
||||
[0 127]
|
||||
EFUSE_BLK3
|
||||
[0 255] [200 247]
|
||||
EFUSE_BLK4
|
||||
[0 255]
|
||||
EFUSE_BLK5
|
||||
[0 255]
|
||||
EFUSE_BLK6
|
||||
[0 255]
|
||||
EFUSE_BLK7
|
||||
[0 255]
|
||||
EFUSE_BLK8
|
||||
[0 255]
|
||||
EFUSE_BLK9
|
||||
[0 255]
|
||||
Note: Not printed ranges are free for using. (bits in EFUSE_BLK0 are reserved for Espressif)
|
||||
|
||||
@@ -8,170 +8,170 @@
|
||||
Verifying efuse table...
|
||||
Sorted efuse table:
|
||||
# field_name efuse_block bit_start bit_count
|
||||
1 WR_DIS EFUSE_BLK0 0 32
|
||||
2 WR_DIS.RD_DIS EFUSE_BLK0 0 1
|
||||
3 WR_DIS.DIS_ICACHE EFUSE_BLK0 2 1
|
||||
4 WR_DIS.DIS_USB_JTAG EFUSE_BLK0 2 1
|
||||
5 WR_DIS.POWERGLITCH_EN EFUSE_BLK0 2 1
|
||||
6 WR_DIS.DIS_FORCE_DOWNLOAD EFUSE_BLK0 2 1
|
||||
7 WR_DIS.SPI_DOWNLOAD_MSPI_DIS EFUSE_BLK0 2 1
|
||||
8 WR_DIS.DIS_TWAI EFUSE_BLK0 2 1
|
||||
9 WR_DIS.JTAG_SEL_ENABLE EFUSE_BLK0 2 1
|
||||
10 WR_DIS.DIS_PAD_JTAG EFUSE_BLK0 2 1
|
||||
11 WR_DIS.DIS_DOWNLOAD_MANUAL_ENCRYPT EFUSE_BLK0 2 1
|
||||
12 WR_DIS.WDT_DELAY_SEL EFUSE_BLK0 3 1
|
||||
13 WR_DIS.SPI_BOOT_CRYPT_CNT EFUSE_BLK0 4 1
|
||||
14 WR_DIS.SECURE_BOOT_KEY_REVOKE0 EFUSE_BLK0 5 1
|
||||
15 WR_DIS.SECURE_BOOT_KEY_REVOKE1 EFUSE_BLK0 6 1
|
||||
16 WR_DIS.SECURE_BOOT_KEY_REVOKE2 EFUSE_BLK0 7 1
|
||||
17 WR_DIS.KEY_PURPOSE_0 EFUSE_BLK0 8 1
|
||||
18 WR_DIS.KEY_PURPOSE_1 EFUSE_BLK0 9 1
|
||||
19 WR_DIS.KEY_PURPOSE_2 EFUSE_BLK0 10 1
|
||||
20 WR_DIS.KEY_PURPOSE_3 EFUSE_BLK0 11 1
|
||||
21 WR_DIS.KEY_PURPOSE_4 EFUSE_BLK0 12 1
|
||||
22 WR_DIS.KEY_PURPOSE_5 EFUSE_BLK0 13 1
|
||||
23 WR_DIS.SEC_DPA_LEVEL EFUSE_BLK0 14 1
|
||||
24 WR_DIS.CRYPT_DPA_ENABLE EFUSE_BLK0 14 1
|
||||
25 WR_DIS.SECURE_BOOT_EN EFUSE_BLK0 15 1
|
||||
26 WR_DIS.SECURE_BOOT_AGGRESSIVE_REVOKE EFUSE_BLK0 16 1
|
||||
27 WR_DIS.ECDSA_FORCE_USE_HARDWARE_K EFUSE_BLK0 17 1
|
||||
28 WR_DIS.FLASH_TPUW EFUSE_BLK0 18 1
|
||||
29 WR_DIS.DIS_DOWNLOAD_MODE EFUSE_BLK0 18 1
|
||||
30 WR_DIS.DIS_DIRECT_BOOT EFUSE_BLK0 18 1
|
||||
31 WR_DIS.DIS_USB_SERIAL_JTAG_ROM_PRINT EFUSE_BLK0 18 1
|
||||
32 WR_DIS.DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE EFUSE_BLK0 18 1
|
||||
33 WR_DIS.ENABLE_SECURITY_DOWNLOAD EFUSE_BLK0 18 1
|
||||
34 WR_DIS.UART_PRINT_CONTROL EFUSE_BLK0 18 1
|
||||
35 WR_DIS.FORCE_SEND_RESUME EFUSE_BLK0 18 1
|
||||
36 WR_DIS.SECURE_VERSION EFUSE_BLK0 18 1
|
||||
37 WR_DIS.SECURE_BOOT_DISABLE_FAST_WAKE EFUSE_BLK0 18 1
|
||||
38 WR_DIS.HYS_EN_PAD0 EFUSE_BLK0 19 1
|
||||
39 WR_DIS.HYS_EN_PAD1 EFUSE_BLK0 19 1
|
||||
40 WR_DIS.BLK1 EFUSE_BLK0 20 1
|
||||
41 WR_DIS.MAC EFUSE_BLK0 20 1
|
||||
42 WR_DIS.MAC_EXT EFUSE_BLK0 20 1
|
||||
43 WR_DIS.WAFER_VERSION_MINOR EFUSE_BLK0 20 1
|
||||
44 WR_DIS.WAFER_VERSION_MAJOR EFUSE_BLK0 20 1
|
||||
45 WR_DIS.DISABLE_WAFER_VERSION_MAJOR EFUSE_BLK0 20 1
|
||||
46 WR_DIS.FLASH_CAP EFUSE_BLK0 20 1
|
||||
47 WR_DIS.FLASH_TEMP EFUSE_BLK0 20 1
|
||||
48 WR_DIS.FLASH_VENDOR EFUSE_BLK0 20 1
|
||||
49 WR_DIS.PKG_VERSION EFUSE_BLK0 20 1
|
||||
50 WR_DIS.SYS_DATA_PART1 EFUSE_BLK0 21 1
|
||||
51 WR_DIS.OPTIONAL_UNIQUE_ID EFUSE_BLK0 21 1
|
||||
52 WR_DIS.BLK_VERSION_MINOR EFUSE_BLK0 21 1
|
||||
53 WR_DIS.BLK_VERSION_MAJOR EFUSE_BLK0 21 1
|
||||
54 WR_DIS.DISABLE_BLK_VERSION_MAJOR EFUSE_BLK0 21 1
|
||||
55 WR_DIS.BLOCK_USR_DATA EFUSE_BLK0 22 1
|
||||
56 WR_DIS.CUSTOM_MAC EFUSE_BLK0 22 1
|
||||
57 WR_DIS.BLOCK_KEY0 EFUSE_BLK0 23 1
|
||||
58 WR_DIS.BLOCK_KEY1 EFUSE_BLK0 24 1
|
||||
59 WR_DIS.BLOCK_KEY2 EFUSE_BLK0 25 1
|
||||
60 WR_DIS.BLOCK_KEY3 EFUSE_BLK0 26 1
|
||||
61 WR_DIS.BLOCK_KEY4 EFUSE_BLK0 27 1
|
||||
62 WR_DIS.BLOCK_KEY5 EFUSE_BLK0 28 1
|
||||
63 WR_DIS.BLOCK_SYS_DATA2 EFUSE_BLK0 29 1
|
||||
64 WR_DIS.USB_EXCHG_PINS EFUSE_BLK0 30 1
|
||||
65 WR_DIS.VDD_SPI_AS_GPIO EFUSE_BLK0 30 1
|
||||
66 WR_DIS.SOFT_DIS_JTAG EFUSE_BLK0 31 1
|
||||
67 RD_DIS EFUSE_BLK0 32 7
|
||||
68 RD_DIS.BLOCK_KEY0 EFUSE_BLK0 32 1
|
||||
69 RD_DIS.BLOCK_KEY1 EFUSE_BLK0 33 1
|
||||
70 RD_DIS.BLOCK_KEY2 EFUSE_BLK0 34 1
|
||||
71 RD_DIS.BLOCK_KEY3 EFUSE_BLK0 35 1
|
||||
72 RD_DIS.BLOCK_KEY4 EFUSE_BLK0 36 1
|
||||
73 RD_DIS.BLOCK_KEY5 EFUSE_BLK0 37 1
|
||||
74 RD_DIS.BLOCK_SYS_DATA2 EFUSE_BLK0 38 1
|
||||
75 DIS_ICACHE EFUSE_BLK0 40 1
|
||||
76 DIS_USB_JTAG EFUSE_BLK0 41 1
|
||||
77 POWERGLITCH_EN EFUSE_BLK0 42 1
|
||||
78 DIS_FORCE_DOWNLOAD EFUSE_BLK0 44 1
|
||||
79 SPI_DOWNLOAD_MSPI_DIS EFUSE_BLK0 45 1
|
||||
80 DIS_TWAI EFUSE_BLK0 46 1
|
||||
81 JTAG_SEL_ENABLE EFUSE_BLK0 47 1
|
||||
82 SOFT_DIS_JTAG EFUSE_BLK0 48 3
|
||||
83 DIS_PAD_JTAG EFUSE_BLK0 51 1
|
||||
84 DIS_DOWNLOAD_MANUAL_ENCRYPT EFUSE_BLK0 52 1
|
||||
85 USB_EXCHG_PINS EFUSE_BLK0 57 1
|
||||
86 VDD_SPI_AS_GPIO EFUSE_BLK0 58 1
|
||||
87 WDT_DELAY_SEL EFUSE_BLK0 80 2
|
||||
88 SPI_BOOT_CRYPT_CNT EFUSE_BLK0 82 3
|
||||
89 SECURE_BOOT_KEY_REVOKE0 EFUSE_BLK0 85 1
|
||||
90 SECURE_BOOT_KEY_REVOKE1 EFUSE_BLK0 86 1
|
||||
91 SECURE_BOOT_KEY_REVOKE2 EFUSE_BLK0 87 1
|
||||
92 KEY_PURPOSE_0 EFUSE_BLK0 88 4
|
||||
93 KEY_PURPOSE_1 EFUSE_BLK0 92 4
|
||||
94 KEY_PURPOSE_2 EFUSE_BLK0 96 4
|
||||
95 KEY_PURPOSE_3 EFUSE_BLK0 100 4
|
||||
96 KEY_PURPOSE_4 EFUSE_BLK0 104 4
|
||||
97 KEY_PURPOSE_5 EFUSE_BLK0 108 4
|
||||
98 SEC_DPA_LEVEL EFUSE_BLK0 112 2
|
||||
99 ECDSA_FORCE_USE_HARDWARE_K EFUSE_BLK0 114 1
|
||||
100 CRYPT_DPA_ENABLE EFUSE_BLK0 115 1
|
||||
101 SECURE_BOOT_EN EFUSE_BLK0 116 1
|
||||
102 SECURE_BOOT_AGGRESSIVE_REVOKE EFUSE_BLK0 117 1
|
||||
103 FLASH_TPUW EFUSE_BLK0 124 4
|
||||
104 DIS_DOWNLOAD_MODE EFUSE_BLK0 128 1
|
||||
105 DIS_DIRECT_BOOT EFUSE_BLK0 129 1
|
||||
106 DIS_USB_SERIAL_JTAG_ROM_PRINT EFUSE_BLK0 130 1
|
||||
107 DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE EFUSE_BLK0 132 1
|
||||
108 ENABLE_SECURITY_DOWNLOAD EFUSE_BLK0 133 1
|
||||
109 UART_PRINT_CONTROL EFUSE_BLK0 134 2
|
||||
110 FORCE_SEND_RESUME EFUSE_BLK0 136 1
|
||||
111 SECURE_VERSION EFUSE_BLK0 137 16
|
||||
112 SECURE_BOOT_DISABLE_FAST_WAKE EFUSE_BLK0 153 1
|
||||
113 HYS_EN_PAD0 EFUSE_BLK0 154 6
|
||||
114 HYS_EN_PAD1 EFUSE_BLK0 160 22
|
||||
115 MAC EFUSE_BLK1 0 8
|
||||
116 MAC EFUSE_BLK1 8 8
|
||||
117 MAC EFUSE_BLK1 16 8
|
||||
118 MAC EFUSE_BLK1 24 8
|
||||
119 MAC EFUSE_BLK1 32 8
|
||||
120 MAC EFUSE_BLK1 40 8
|
||||
121 MAC_EXT EFUSE_BLK1 48 16
|
||||
122 WAFER_VERSION_MINOR EFUSE_BLK1 114 3
|
||||
123 WAFER_VERSION_MAJOR EFUSE_BLK1 117 2
|
||||
124 DISABLE_WAFER_VERSION_MAJOR EFUSE_BLK1 119 1
|
||||
125 FLASH_CAP EFUSE_BLK1 120 3
|
||||
126 FLASH_TEMP EFUSE_BLK1 123 2
|
||||
127 FLASH_VENDOR EFUSE_BLK1 125 3
|
||||
128 PKG_VERSION EFUSE_BLK1 128 3
|
||||
129 SYS_DATA_PART2 EFUSE_BLK10 0 256
|
||||
130 OPTIONAL_UNIQUE_ID EFUSE_BLK2 0 128
|
||||
131 BLK_VERSION_MINOR EFUSE_BLK2 130 3
|
||||
132 BLK_VERSION_MAJOR EFUSE_BLK2 133 2
|
||||
133 DISABLE_BLK_VERSION_MAJOR EFUSE_BLK2 135 1
|
||||
134 USER_DATA EFUSE_BLK3 0 256
|
||||
135 USER_DATA.MAC_CUSTOM EFUSE_BLK3 200 48
|
||||
136 KEY0 EFUSE_BLK4 0 256
|
||||
137 KEY1 EFUSE_BLK5 0 256
|
||||
138 KEY2 EFUSE_BLK6 0 256
|
||||
139 KEY3 EFUSE_BLK7 0 256
|
||||
140 KEY4 EFUSE_BLK8 0 256
|
||||
141 KEY5 EFUSE_BLK9 0 256
|
||||
1 WR_DIS EFUSE_BLK0 0 32
|
||||
2 WR_DIS.RD_DIS EFUSE_BLK0 0 1
|
||||
3 WR_DIS.DIS_ICACHE EFUSE_BLK0 2 1
|
||||
4 WR_DIS.DIS_USB_JTAG EFUSE_BLK0 2 1
|
||||
5 WR_DIS.POWERGLITCH_EN EFUSE_BLK0 2 1
|
||||
6 WR_DIS.DIS_FORCE_DOWNLOAD EFUSE_BLK0 2 1
|
||||
7 WR_DIS.SPI_DOWNLOAD_MSPI_DIS EFUSE_BLK0 2 1
|
||||
8 WR_DIS.DIS_TWAI EFUSE_BLK0 2 1
|
||||
9 WR_DIS.JTAG_SEL_ENABLE EFUSE_BLK0 2 1
|
||||
10 WR_DIS.DIS_PAD_JTAG EFUSE_BLK0 2 1
|
||||
11 WR_DIS.DIS_DOWNLOAD_MANUAL_ENCRYPT EFUSE_BLK0 2 1
|
||||
12 WR_DIS.WDT_DELAY_SEL EFUSE_BLK0 3 1
|
||||
13 WR_DIS.SPI_BOOT_CRYPT_CNT EFUSE_BLK0 4 1
|
||||
14 WR_DIS.SECURE_BOOT_KEY_REVOKE0 EFUSE_BLK0 5 1
|
||||
15 WR_DIS.SECURE_BOOT_KEY_REVOKE1 EFUSE_BLK0 6 1
|
||||
16 WR_DIS.SECURE_BOOT_KEY_REVOKE2 EFUSE_BLK0 7 1
|
||||
17 WR_DIS.KEY_PURPOSE_0 EFUSE_BLK0 8 1
|
||||
18 WR_DIS.KEY_PURPOSE_1 EFUSE_BLK0 9 1
|
||||
19 WR_DIS.KEY_PURPOSE_2 EFUSE_BLK0 10 1
|
||||
20 WR_DIS.KEY_PURPOSE_3 EFUSE_BLK0 11 1
|
||||
21 WR_DIS.KEY_PURPOSE_4 EFUSE_BLK0 12 1
|
||||
22 WR_DIS.KEY_PURPOSE_5 EFUSE_BLK0 13 1
|
||||
23 WR_DIS.SEC_DPA_LEVEL EFUSE_BLK0 14 1
|
||||
24 WR_DIS.CRYPT_DPA_ENABLE EFUSE_BLK0 14 1
|
||||
25 WR_DIS.SECURE_BOOT_EN EFUSE_BLK0 15 1
|
||||
26 WR_DIS.SECURE_BOOT_AGGRESSIVE_REVOKE EFUSE_BLK0 16 1
|
||||
27 WR_DIS.ECDSA_FORCE_USE_HARDWARE_K EFUSE_BLK0 17 1
|
||||
28 WR_DIS.FLASH_TPUW EFUSE_BLK0 18 1
|
||||
29 WR_DIS.DIS_DOWNLOAD_MODE EFUSE_BLK0 18 1
|
||||
30 WR_DIS.DIS_DIRECT_BOOT EFUSE_BLK0 18 1
|
||||
31 WR_DIS.DIS_USB_SERIAL_JTAG_ROM_PRINT EFUSE_BLK0 18 1
|
||||
32 WR_DIS.DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE EFUSE_BLK0 18 1
|
||||
33 WR_DIS.ENABLE_SECURITY_DOWNLOAD EFUSE_BLK0 18 1
|
||||
34 WR_DIS.UART_PRINT_CONTROL EFUSE_BLK0 18 1
|
||||
35 WR_DIS.FORCE_SEND_RESUME EFUSE_BLK0 18 1
|
||||
36 WR_DIS.SECURE_VERSION EFUSE_BLK0 18 1
|
||||
37 WR_DIS.SECURE_BOOT_DISABLE_FAST_WAKE EFUSE_BLK0 18 1
|
||||
38 WR_DIS.HYS_EN_PAD0 EFUSE_BLK0 19 1
|
||||
39 WR_DIS.HYS_EN_PAD1 EFUSE_BLK0 19 1
|
||||
40 WR_DIS.BLK1 EFUSE_BLK0 20 1
|
||||
41 WR_DIS.MAC EFUSE_BLK0 20 1
|
||||
42 WR_DIS.MAC_EXT EFUSE_BLK0 20 1
|
||||
43 WR_DIS.WAFER_VERSION_MINOR EFUSE_BLK0 20 1
|
||||
44 WR_DIS.WAFER_VERSION_MAJOR EFUSE_BLK0 20 1
|
||||
45 WR_DIS.DISABLE_WAFER_VERSION_MAJOR EFUSE_BLK0 20 1
|
||||
46 WR_DIS.FLASH_CAP EFUSE_BLK0 20 1
|
||||
47 WR_DIS.FLASH_TEMP EFUSE_BLK0 20 1
|
||||
48 WR_DIS.FLASH_VENDOR EFUSE_BLK0 20 1
|
||||
49 WR_DIS.PKG_VERSION EFUSE_BLK0 20 1
|
||||
50 WR_DIS.SYS_DATA_PART1 EFUSE_BLK0 21 1
|
||||
51 WR_DIS.OPTIONAL_UNIQUE_ID EFUSE_BLK0 21 1
|
||||
52 WR_DIS.BLK_VERSION_MINOR EFUSE_BLK0 21 1
|
||||
53 WR_DIS.BLK_VERSION_MAJOR EFUSE_BLK0 21 1
|
||||
54 WR_DIS.DISABLE_BLK_VERSION_MAJOR EFUSE_BLK0 21 1
|
||||
55 WR_DIS.BLOCK_USR_DATA EFUSE_BLK0 22 1
|
||||
56 WR_DIS.CUSTOM_MAC EFUSE_BLK0 22 1
|
||||
57 WR_DIS.BLOCK_KEY0 EFUSE_BLK0 23 1
|
||||
58 WR_DIS.BLOCK_KEY1 EFUSE_BLK0 24 1
|
||||
59 WR_DIS.BLOCK_KEY2 EFUSE_BLK0 25 1
|
||||
60 WR_DIS.BLOCK_KEY3 EFUSE_BLK0 26 1
|
||||
61 WR_DIS.BLOCK_KEY4 EFUSE_BLK0 27 1
|
||||
62 WR_DIS.BLOCK_KEY5 EFUSE_BLK0 28 1
|
||||
63 WR_DIS.BLOCK_SYS_DATA2 EFUSE_BLK0 29 1
|
||||
64 WR_DIS.USB_EXCHG_PINS EFUSE_BLK0 30 1
|
||||
65 WR_DIS.VDD_SPI_AS_GPIO EFUSE_BLK0 30 1
|
||||
66 WR_DIS.SOFT_DIS_JTAG EFUSE_BLK0 31 1
|
||||
67 RD_DIS EFUSE_BLK0 32 7
|
||||
68 RD_DIS.BLOCK_KEY0 EFUSE_BLK0 32 1
|
||||
69 RD_DIS.BLOCK_KEY1 EFUSE_BLK0 33 1
|
||||
70 RD_DIS.BLOCK_KEY2 EFUSE_BLK0 34 1
|
||||
71 RD_DIS.BLOCK_KEY3 EFUSE_BLK0 35 1
|
||||
72 RD_DIS.BLOCK_KEY4 EFUSE_BLK0 36 1
|
||||
73 RD_DIS.BLOCK_KEY5 EFUSE_BLK0 37 1
|
||||
74 RD_DIS.BLOCK_SYS_DATA2 EFUSE_BLK0 38 1
|
||||
75 DIS_ICACHE EFUSE_BLK0 40 1
|
||||
76 DIS_USB_JTAG EFUSE_BLK0 41 1
|
||||
77 POWERGLITCH_EN EFUSE_BLK0 42 1
|
||||
78 DIS_FORCE_DOWNLOAD EFUSE_BLK0 44 1
|
||||
79 SPI_DOWNLOAD_MSPI_DIS EFUSE_BLK0 45 1
|
||||
80 DIS_TWAI EFUSE_BLK0 46 1
|
||||
81 JTAG_SEL_ENABLE EFUSE_BLK0 47 1
|
||||
82 SOFT_DIS_JTAG EFUSE_BLK0 48 3
|
||||
83 DIS_PAD_JTAG EFUSE_BLK0 51 1
|
||||
84 DIS_DOWNLOAD_MANUAL_ENCRYPT EFUSE_BLK0 52 1
|
||||
85 USB_EXCHG_PINS EFUSE_BLK0 57 1
|
||||
86 VDD_SPI_AS_GPIO EFUSE_BLK0 58 1
|
||||
87 WDT_DELAY_SEL EFUSE_BLK0 80 2
|
||||
88 SPI_BOOT_CRYPT_CNT EFUSE_BLK0 82 3
|
||||
89 SECURE_BOOT_KEY_REVOKE0 EFUSE_BLK0 85 1
|
||||
90 SECURE_BOOT_KEY_REVOKE1 EFUSE_BLK0 86 1
|
||||
91 SECURE_BOOT_KEY_REVOKE2 EFUSE_BLK0 87 1
|
||||
92 KEY_PURPOSE_0 EFUSE_BLK0 88 4
|
||||
93 KEY_PURPOSE_1 EFUSE_BLK0 92 4
|
||||
94 KEY_PURPOSE_2 EFUSE_BLK0 96 4
|
||||
95 KEY_PURPOSE_3 EFUSE_BLK0 100 4
|
||||
96 KEY_PURPOSE_4 EFUSE_BLK0 104 4
|
||||
97 KEY_PURPOSE_5 EFUSE_BLK0 108 4
|
||||
98 SEC_DPA_LEVEL EFUSE_BLK0 112 2
|
||||
99 ECDSA_FORCE_USE_HARDWARE_K EFUSE_BLK0 114 1
|
||||
100 CRYPT_DPA_ENABLE EFUSE_BLK0 115 1
|
||||
101 SECURE_BOOT_EN EFUSE_BLK0 116 1
|
||||
102 SECURE_BOOT_AGGRESSIVE_REVOKE EFUSE_BLK0 117 1
|
||||
103 FLASH_TPUW EFUSE_BLK0 124 4
|
||||
104 DIS_DOWNLOAD_MODE EFUSE_BLK0 128 1
|
||||
105 DIS_DIRECT_BOOT EFUSE_BLK0 129 1
|
||||
106 DIS_USB_SERIAL_JTAG_ROM_PRINT EFUSE_BLK0 130 1
|
||||
107 DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE EFUSE_BLK0 132 1
|
||||
108 ENABLE_SECURITY_DOWNLOAD EFUSE_BLK0 133 1
|
||||
109 UART_PRINT_CONTROL EFUSE_BLK0 134 2
|
||||
110 FORCE_SEND_RESUME EFUSE_BLK0 136 1
|
||||
111 SECURE_VERSION EFUSE_BLK0 137 16
|
||||
112 SECURE_BOOT_DISABLE_FAST_WAKE EFUSE_BLK0 153 1
|
||||
113 HYS_EN_PAD0 EFUSE_BLK0 154 6
|
||||
114 HYS_EN_PAD1 EFUSE_BLK0 160 22
|
||||
115 MAC EFUSE_BLK1 0 8
|
||||
116 MAC EFUSE_BLK1 8 8
|
||||
117 MAC EFUSE_BLK1 16 8
|
||||
118 MAC EFUSE_BLK1 24 8
|
||||
119 MAC EFUSE_BLK1 32 8
|
||||
120 MAC EFUSE_BLK1 40 8
|
||||
121 MAC_EXT EFUSE_BLK1 48 16
|
||||
122 WAFER_VERSION_MINOR EFUSE_BLK1 114 3
|
||||
123 WAFER_VERSION_MAJOR EFUSE_BLK1 117 2
|
||||
124 DISABLE_WAFER_VERSION_MAJOR EFUSE_BLK1 119 1
|
||||
125 FLASH_CAP EFUSE_BLK1 120 3
|
||||
126 FLASH_TEMP EFUSE_BLK1 123 2
|
||||
127 FLASH_VENDOR EFUSE_BLK1 125 3
|
||||
128 PKG_VERSION EFUSE_BLK1 128 3
|
||||
129 SYS_DATA_PART2 EFUSE_BLK10 0 256
|
||||
130 OPTIONAL_UNIQUE_ID EFUSE_BLK2 0 128
|
||||
131 BLK_VERSION_MINOR EFUSE_BLK2 130 3
|
||||
132 BLK_VERSION_MAJOR EFUSE_BLK2 133 2
|
||||
133 DISABLE_BLK_VERSION_MAJOR EFUSE_BLK2 135 1
|
||||
134 USER_DATA EFUSE_BLK3 0 256
|
||||
135 USER_DATA.MAC_CUSTOM EFUSE_BLK3 200 48
|
||||
136 KEY0 EFUSE_BLK4 0 256
|
||||
137 KEY1 EFUSE_BLK5 0 256
|
||||
138 KEY2 EFUSE_BLK6 0 256
|
||||
139 KEY3 EFUSE_BLK7 0 256
|
||||
140 KEY4 EFUSE_BLK8 0 256
|
||||
141 KEY5 EFUSE_BLK9 0 256
|
||||
|
||||
Used bits in efuse table:
|
||||
EFUSE_BLK0
|
||||
[0 31] [0 0] [2 2] ... [21 22] [22 30] [30 38] [32 38] [40 42] [44 52] [57 58] [80 117] [124 130] [132 181]
|
||||
EFUSE_BLK1
|
||||
[0 63] [114 130]
|
||||
EFUSE_BLK10
|
||||
[0 255]
|
||||
EFUSE_BLK2
|
||||
[0 127] [130 135]
|
||||
EFUSE_BLK3
|
||||
[0 255] [200 247]
|
||||
EFUSE_BLK4
|
||||
[0 255]
|
||||
EFUSE_BLK5
|
||||
[0 255]
|
||||
EFUSE_BLK6
|
||||
[0 255]
|
||||
EFUSE_BLK7
|
||||
[0 255]
|
||||
EFUSE_BLK8
|
||||
[0 255]
|
||||
EFUSE_BLK9
|
||||
[0 255]
|
||||
EFUSE_BLK0
|
||||
[0 31] [0 0] [2 2] ... [21 22] [22 30] [30 38] [32 38] [40 42] [44 52] [57 58] [80 117] [124 130] [132 181]
|
||||
EFUSE_BLK1
|
||||
[0 63] [114 130]
|
||||
EFUSE_BLK10
|
||||
[0 255]
|
||||
EFUSE_BLK2
|
||||
[0 127] [130 135]
|
||||
EFUSE_BLK3
|
||||
[0 255] [200 247]
|
||||
EFUSE_BLK4
|
||||
[0 255]
|
||||
EFUSE_BLK5
|
||||
[0 255]
|
||||
EFUSE_BLK6
|
||||
[0 255]
|
||||
EFUSE_BLK7
|
||||
[0 255]
|
||||
EFUSE_BLK8
|
||||
[0 255]
|
||||
EFUSE_BLK9
|
||||
[0 255]
|
||||
Note: Not printed ranges are free for using. (bits in EFUSE_BLK0 are reserved for Espressif)
|
||||
|
||||
|
||||
@@ -8,150 +8,150 @@
|
||||
Verifying efuse table...
|
||||
Sorted efuse table:
|
||||
# field_name efuse_block bit_start bit_count
|
||||
1 WR_DIS EFUSE_BLK0 0 32
|
||||
2 WR_DIS.RD_DIS EFUSE_BLK0 0 1
|
||||
3 WR_DIS.SPI_BOOT_CRYPT_CNT EFUSE_BLK0 4 1
|
||||
4 WR_DIS.SECURE_BOOT_KEY_REVOKE0 EFUSE_BLK0 5 1
|
||||
5 WR_DIS.SECURE_BOOT_KEY_REVOKE1 EFUSE_BLK0 6 1
|
||||
6 WR_DIS.SECURE_BOOT_KEY_REVOKE2 EFUSE_BLK0 7 1
|
||||
7 WR_DIS.KEY_PURPOSE_0 EFUSE_BLK0 8 1
|
||||
8 WR_DIS.KEY_PURPOSE_1 EFUSE_BLK0 9 1
|
||||
9 WR_DIS.KEY_PURPOSE_2 EFUSE_BLK0 10 1
|
||||
10 WR_DIS.KEY_PURPOSE_3 EFUSE_BLK0 11 1
|
||||
11 WR_DIS.KEY_PURPOSE_4 EFUSE_BLK0 12 1
|
||||
12 WR_DIS.KEY_PURPOSE_5 EFUSE_BLK0 13 1
|
||||
13 WR_DIS.SECURE_BOOT_EN EFUSE_BLK0 15 1
|
||||
14 WR_DIS.BLK1 EFUSE_BLK0 20 1
|
||||
15 WR_DIS.MAC EFUSE_BLK0 20 1
|
||||
16 WR_DIS.MAC_EXT EFUSE_BLK0 20 1
|
||||
17 WR_DIS.BLOCK_SYS_DATA1 EFUSE_BLK0 21 1
|
||||
18 WR_DIS.BLOCK_USR_DATA EFUSE_BLK0 22 1
|
||||
19 WR_DIS.BLOCK_KEY0 EFUSE_BLK0 23 1
|
||||
20 WR_DIS.BLOCK_KEY1 EFUSE_BLK0 24 1
|
||||
21 WR_DIS.BLOCK_KEY2 EFUSE_BLK0 25 1
|
||||
22 WR_DIS.BLOCK_KEY3 EFUSE_BLK0 26 1
|
||||
23 WR_DIS.BLOCK_KEY4 EFUSE_BLK0 27 1
|
||||
24 WR_DIS.BLOCK_KEY5 EFUSE_BLK0 28 1
|
||||
25 WR_DIS.BLOCK_SYS_DATA2 EFUSE_BLK0 29 1
|
||||
26 RD_DIS EFUSE_BLK0 32 7
|
||||
27 RD_DIS.BLOCK_KEY0 EFUSE_BLK0 32 1
|
||||
28 RD_DIS.BLOCK_KEY1 EFUSE_BLK0 33 1
|
||||
29 RD_DIS.BLOCK_KEY2 EFUSE_BLK0 34 1
|
||||
30 RD_DIS.BLOCK_KEY3 EFUSE_BLK0 35 1
|
||||
31 RD_DIS.BLOCK_KEY4 EFUSE_BLK0 36 1
|
||||
32 RD_DIS.BLOCK_KEY5 EFUSE_BLK0 37 1
|
||||
33 RD_DIS.BLOCK_SYS_DATA2 EFUSE_BLK0 38 1
|
||||
34 USB_DEVICE_EXCHG_PINS EFUSE_BLK0 39 1
|
||||
35 USB_OTG11_EXCHG_PINS EFUSE_BLK0 40 1
|
||||
36 DIS_USB_JTAG EFUSE_BLK0 41 1
|
||||
37 POWERGLITCH_EN EFUSE_BLK0 42 1
|
||||
38 DIS_FORCE_DOWNLOAD EFUSE_BLK0 44 1
|
||||
39 SPI_DOWNLOAD_MSPI_DIS EFUSE_BLK0 45 1
|
||||
40 DIS_TWAI EFUSE_BLK0 46 1
|
||||
41 JTAG_SEL_ENABLE EFUSE_BLK0 47 1
|
||||
42 SOFT_DIS_JTAG EFUSE_BLK0 48 3
|
||||
43 DIS_PAD_JTAG EFUSE_BLK0 51 1
|
||||
44 DIS_DOWNLOAD_MANUAL_ENCRYPT EFUSE_BLK0 52 1
|
||||
45 USB_PHY_SEL EFUSE_BLK0 57 1
|
||||
46 KM_HUK_GEN_STATE_LOW EFUSE_BLK0 58 6
|
||||
47 KM_HUK_GEN_STATE_HIGH EFUSE_BLK0 64 3
|
||||
48 KM_RND_SWITCH_CYCLE EFUSE_BLK0 67 2
|
||||
49 KM_DEPLOY_ONLY_ONCE EFUSE_BLK0 69 4
|
||||
50 FORCE_USE_KEY_MANAGER_KEY EFUSE_BLK0 73 4
|
||||
51 FORCE_DISABLE_SW_INIT_KEY EFUSE_BLK0 77 1
|
||||
52 XTS_KEY_LENGTH_256 EFUSE_BLK0 78 1
|
||||
53 WDT_DELAY_SEL EFUSE_BLK0 80 2
|
||||
54 SPI_BOOT_CRYPT_CNT EFUSE_BLK0 82 3
|
||||
55 SECURE_BOOT_KEY_REVOKE0 EFUSE_BLK0 85 1
|
||||
56 SECURE_BOOT_KEY_REVOKE1 EFUSE_BLK0 86 1
|
||||
57 SECURE_BOOT_KEY_REVOKE2 EFUSE_BLK0 87 1
|
||||
58 KEY_PURPOSE_0 EFUSE_BLK0 88 4
|
||||
59 KEY_PURPOSE_1 EFUSE_BLK0 92 4
|
||||
60 KEY_PURPOSE_2 EFUSE_BLK0 96 4
|
||||
61 KEY_PURPOSE_3 EFUSE_BLK0 100 4
|
||||
62 KEY_PURPOSE_4 EFUSE_BLK0 104 4
|
||||
63 KEY_PURPOSE_5 EFUSE_BLK0 108 4
|
||||
64 SEC_DPA_LEVEL EFUSE_BLK0 112 2
|
||||
65 ECDSA_ENABLE_SOFT_K EFUSE_BLK0 114 1
|
||||
66 CRYPT_DPA_ENABLE EFUSE_BLK0 115 1
|
||||
67 SECURE_BOOT_EN EFUSE_BLK0 116 1
|
||||
68 SECURE_BOOT_AGGRESSIVE_REVOKE EFUSE_BLK0 117 1
|
||||
69 FLASH_TYPE EFUSE_BLK0 119 1
|
||||
70 FLASH_PAGE_SIZE EFUSE_BLK0 120 2
|
||||
71 FLASH_ECC_EN EFUSE_BLK0 122 1
|
||||
72 DIS_USB_OTG_DOWNLOAD_MODE EFUSE_BLK0 123 1
|
||||
73 FLASH_TPUW EFUSE_BLK0 124 4
|
||||
74 DIS_DOWNLOAD_MODE EFUSE_BLK0 128 1
|
||||
75 DIS_DIRECT_BOOT EFUSE_BLK0 129 1
|
||||
76 DIS_USB_SERIAL_JTAG_ROM_PRINT EFUSE_BLK0 130 1
|
||||
77 LOCK_KM_KEY EFUSE_BLK0 131 1
|
||||
78 DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE EFUSE_BLK0 132 1
|
||||
79 ENABLE_SECURITY_DOWNLOAD EFUSE_BLK0 133 1
|
||||
80 UART_PRINT_CONTROL EFUSE_BLK0 134 2
|
||||
81 FORCE_SEND_RESUME EFUSE_BLK0 136 1
|
||||
82 SECURE_VERSION EFUSE_BLK0 137 16
|
||||
83 SECURE_BOOT_DISABLE_FAST_WAKE EFUSE_BLK0 153 1
|
||||
84 HYS_EN_PAD EFUSE_BLK0 154 1
|
||||
85 DCDC_VSET EFUSE_BLK0 155 5
|
||||
86 PXA0_TIEH_SEL_0 EFUSE_BLK0 160 2
|
||||
87 PXA0_TIEH_SEL_1 EFUSE_BLK0 162 2
|
||||
88 PXA0_TIEH_SEL_2 EFUSE_BLK0 164 2
|
||||
89 PXA0_TIEH_SEL_3 EFUSE_BLK0 166 2
|
||||
90 KM_DISABLE_DEPLOY_MODE EFUSE_BLK0 168 4
|
||||
91 HP_PWR_SRC_SEL EFUSE_BLK0 178 1
|
||||
92 DCDC_VSET_EN EFUSE_BLK0 179 1
|
||||
93 DIS_WDT EFUSE_BLK0 180 1
|
||||
94 DIS_SWD EFUSE_BLK0 181 1
|
||||
95 MAC EFUSE_BLK1 0 8
|
||||
96 MAC EFUSE_BLK1 8 8
|
||||
97 MAC EFUSE_BLK1 16 8
|
||||
98 MAC EFUSE_BLK1 24 8
|
||||
99 MAC EFUSE_BLK1 32 8
|
||||
100 MAC EFUSE_BLK1 40 8
|
||||
101 MAC_EXT EFUSE_BLK1 48 8
|
||||
102 MAC_EXT EFUSE_BLK1 56 8
|
||||
103 SYS_DATA_PART2 EFUSE_BLK10 0 256
|
||||
104 BLOCK_SYS_DATA1 EFUSE_BLK2 0 256
|
||||
105 USER_DATA EFUSE_BLK3 0 256
|
||||
106 USER_DATA.MAC_CUSTOM EFUSE_BLK3 200 48
|
||||
107 KEY0 EFUSE_BLK4 0 256
|
||||
108 KEY1 EFUSE_BLK5 0 256
|
||||
109 KEY2 EFUSE_BLK6 0 256
|
||||
110 KEY3 EFUSE_BLK7 0 256
|
||||
111 KEY4 EFUSE_BLK8 0 256
|
||||
112 KEY5 EFUSE_BLK9 0 256
|
||||
|
||||
1 WR_DIS EFUSE_BLK0 0 32
|
||||
2 WR_DIS.RD_DIS EFUSE_BLK0 0 1
|
||||
3 WR_DIS.SPI_BOOT_CRYPT_CNT EFUSE_BLK0 4 1
|
||||
4 WR_DIS.SECURE_BOOT_KEY_REVOKE0 EFUSE_BLK0 5 1
|
||||
5 WR_DIS.SECURE_BOOT_KEY_REVOKE1 EFUSE_BLK0 6 1
|
||||
6 WR_DIS.SECURE_BOOT_KEY_REVOKE2 EFUSE_BLK0 7 1
|
||||
7 WR_DIS.KEY_PURPOSE_0 EFUSE_BLK0 8 1
|
||||
8 WR_DIS.KEY_PURPOSE_1 EFUSE_BLK0 9 1
|
||||
9 WR_DIS.KEY_PURPOSE_2 EFUSE_BLK0 10 1
|
||||
10 WR_DIS.KEY_PURPOSE_3 EFUSE_BLK0 11 1
|
||||
11 WR_DIS.KEY_PURPOSE_4 EFUSE_BLK0 12 1
|
||||
12 WR_DIS.KEY_PURPOSE_5 EFUSE_BLK0 13 1
|
||||
13 WR_DIS.SECURE_BOOT_EN EFUSE_BLK0 15 1
|
||||
14 WR_DIS.BLK1 EFUSE_BLK0 20 1
|
||||
15 WR_DIS.MAC EFUSE_BLK0 20 1
|
||||
16 WR_DIS.MAC_EXT EFUSE_BLK0 20 1
|
||||
17 WR_DIS.BLOCK_SYS_DATA1 EFUSE_BLK0 21 1
|
||||
18 WR_DIS.BLOCK_USR_DATA EFUSE_BLK0 22 1
|
||||
19 WR_DIS.BLOCK_KEY0 EFUSE_BLK0 23 1
|
||||
20 WR_DIS.BLOCK_KEY1 EFUSE_BLK0 24 1
|
||||
21 WR_DIS.BLOCK_KEY2 EFUSE_BLK0 25 1
|
||||
22 WR_DIS.BLOCK_KEY3 EFUSE_BLK0 26 1
|
||||
23 WR_DIS.BLOCK_KEY4 EFUSE_BLK0 27 1
|
||||
24 WR_DIS.BLOCK_KEY5 EFUSE_BLK0 28 1
|
||||
25 WR_DIS.BLOCK_SYS_DATA2 EFUSE_BLK0 29 1
|
||||
26 RD_DIS EFUSE_BLK0 32 7
|
||||
27 RD_DIS.BLOCK_KEY0 EFUSE_BLK0 32 1
|
||||
28 RD_DIS.BLOCK_KEY1 EFUSE_BLK0 33 1
|
||||
29 RD_DIS.BLOCK_KEY2 EFUSE_BLK0 34 1
|
||||
30 RD_DIS.BLOCK_KEY3 EFUSE_BLK0 35 1
|
||||
31 RD_DIS.BLOCK_KEY4 EFUSE_BLK0 36 1
|
||||
32 RD_DIS.BLOCK_KEY5 EFUSE_BLK0 37 1
|
||||
33 RD_DIS.BLOCK_SYS_DATA2 EFUSE_BLK0 38 1
|
||||
34 USB_DEVICE_EXCHG_PINS EFUSE_BLK0 39 1
|
||||
35 USB_OTG11_EXCHG_PINS EFUSE_BLK0 40 1
|
||||
36 DIS_USB_JTAG EFUSE_BLK0 41 1
|
||||
37 POWERGLITCH_EN EFUSE_BLK0 42 1
|
||||
38 DIS_FORCE_DOWNLOAD EFUSE_BLK0 44 1
|
||||
39 SPI_DOWNLOAD_MSPI_DIS EFUSE_BLK0 45 1
|
||||
40 DIS_TWAI EFUSE_BLK0 46 1
|
||||
41 JTAG_SEL_ENABLE EFUSE_BLK0 47 1
|
||||
42 SOFT_DIS_JTAG EFUSE_BLK0 48 3
|
||||
43 DIS_PAD_JTAG EFUSE_BLK0 51 1
|
||||
44 DIS_DOWNLOAD_MANUAL_ENCRYPT EFUSE_BLK0 52 1
|
||||
45 USB_PHY_SEL EFUSE_BLK0 57 1
|
||||
46 KM_HUK_GEN_STATE_LOW EFUSE_BLK0 58 6
|
||||
47 KM_HUK_GEN_STATE_HIGH EFUSE_BLK0 64 3
|
||||
48 KM_RND_SWITCH_CYCLE EFUSE_BLK0 67 2
|
||||
49 KM_DEPLOY_ONLY_ONCE EFUSE_BLK0 69 4
|
||||
50 FORCE_USE_KEY_MANAGER_KEY EFUSE_BLK0 73 4
|
||||
51 FORCE_DISABLE_SW_INIT_KEY EFUSE_BLK0 77 1
|
||||
52 XTS_KEY_LENGTH_256 EFUSE_BLK0 78 1
|
||||
53 WDT_DELAY_SEL EFUSE_BLK0 80 2
|
||||
54 SPI_BOOT_CRYPT_CNT EFUSE_BLK0 82 3
|
||||
55 SECURE_BOOT_KEY_REVOKE0 EFUSE_BLK0 85 1
|
||||
56 SECURE_BOOT_KEY_REVOKE1 EFUSE_BLK0 86 1
|
||||
57 SECURE_BOOT_KEY_REVOKE2 EFUSE_BLK0 87 1
|
||||
58 KEY_PURPOSE_0 EFUSE_BLK0 88 4
|
||||
59 KEY_PURPOSE_1 EFUSE_BLK0 92 4
|
||||
60 KEY_PURPOSE_2 EFUSE_BLK0 96 4
|
||||
61 KEY_PURPOSE_3 EFUSE_BLK0 100 4
|
||||
62 KEY_PURPOSE_4 EFUSE_BLK0 104 4
|
||||
63 KEY_PURPOSE_5 EFUSE_BLK0 108 4
|
||||
64 SEC_DPA_LEVEL EFUSE_BLK0 112 2
|
||||
65 ECDSA_ENABLE_SOFT_K EFUSE_BLK0 114 1
|
||||
66 CRYPT_DPA_ENABLE EFUSE_BLK0 115 1
|
||||
67 SECURE_BOOT_EN EFUSE_BLK0 116 1
|
||||
68 SECURE_BOOT_AGGRESSIVE_REVOKE EFUSE_BLK0 117 1
|
||||
69 FLASH_TYPE EFUSE_BLK0 119 1
|
||||
70 FLASH_PAGE_SIZE EFUSE_BLK0 120 2
|
||||
71 FLASH_ECC_EN EFUSE_BLK0 122 1
|
||||
72 DIS_USB_OTG_DOWNLOAD_MODE EFUSE_BLK0 123 1
|
||||
73 FLASH_TPUW EFUSE_BLK0 124 4
|
||||
74 DIS_DOWNLOAD_MODE EFUSE_BLK0 128 1
|
||||
75 DIS_DIRECT_BOOT EFUSE_BLK0 129 1
|
||||
76 DIS_USB_SERIAL_JTAG_ROM_PRINT EFUSE_BLK0 130 1
|
||||
77 LOCK_KM_KEY EFUSE_BLK0 131 1
|
||||
78 DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE EFUSE_BLK0 132 1
|
||||
79 ENABLE_SECURITY_DOWNLOAD EFUSE_BLK0 133 1
|
||||
80 UART_PRINT_CONTROL EFUSE_BLK0 134 2
|
||||
81 FORCE_SEND_RESUME EFUSE_BLK0 136 1
|
||||
82 SECURE_VERSION EFUSE_BLK0 137 16
|
||||
83 SECURE_BOOT_DISABLE_FAST_WAKE EFUSE_BLK0 153 1
|
||||
84 HYS_EN_PAD EFUSE_BLK0 154 1
|
||||
85 DCDC_VSET EFUSE_BLK0 155 5
|
||||
86 PXA0_TIEH_SEL_0 EFUSE_BLK0 160 2
|
||||
87 PXA0_TIEH_SEL_1 EFUSE_BLK0 162 2
|
||||
88 PXA0_TIEH_SEL_2 EFUSE_BLK0 164 2
|
||||
89 PXA0_TIEH_SEL_3 EFUSE_BLK0 166 2
|
||||
90 KM_DISABLE_DEPLOY_MODE EFUSE_BLK0 168 4
|
||||
91 HP_PWR_SRC_SEL EFUSE_BLK0 178 1
|
||||
92 DCDC_VSET_EN EFUSE_BLK0 179 1
|
||||
93 DIS_WDT EFUSE_BLK0 180 1
|
||||
94 DIS_SWD EFUSE_BLK0 181 1
|
||||
95 MAC EFUSE_BLK1 0 8
|
||||
96 MAC EFUSE_BLK1 8 8
|
||||
97 MAC EFUSE_BLK1 16 8
|
||||
98 MAC EFUSE_BLK1 24 8
|
||||
99 MAC EFUSE_BLK1 32 8
|
||||
100 MAC EFUSE_BLK1 40 8
|
||||
101 MAC_EXT EFUSE_BLK1 48 8
|
||||
102 MAC_EXT EFUSE_BLK1 56 8
|
||||
103 SYS_DATA_PART2 EFUSE_BLK10 0 256
|
||||
104 BLOCK_SYS_DATA1 EFUSE_BLK2 0 256
|
||||
105 USER_DATA EFUSE_BLK3 0 256
|
||||
106 USER_DATA.MAC_CUSTOM EFUSE_BLK3 200 48
|
||||
107 KEY0 EFUSE_BLK4 0 256
|
||||
108 KEY1 EFUSE_BLK5 0 256
|
||||
109 KEY2 EFUSE_BLK6 0 256
|
||||
110 KEY3 EFUSE_BLK7 0 256
|
||||
111 KEY4 EFUSE_BLK8 0 256
|
||||
112 KEY5 EFUSE_BLK9 0 256
|
||||
|
||||
Used bits in efuse table:
|
||||
EFUSE_BLK0
|
||||
[0 31] [0 0] [4 13] [15 15] [20 20] [20 20] [20 29] [32 38] [32 42] [44 52] [57 78] [80 117] [119 171] [178 181]
|
||||
|
||||
EFUSE_BLK1
|
||||
[0 63]
|
||||
|
||||
EFUSE_BLK10
|
||||
[0 255]
|
||||
|
||||
EFUSE_BLK2
|
||||
[0 255]
|
||||
|
||||
EFUSE_BLK3
|
||||
[0 255] [200 247]
|
||||
|
||||
EFUSE_BLK4
|
||||
[0 255]
|
||||
|
||||
EFUSE_BLK5
|
||||
[0 255]
|
||||
|
||||
EFUSE_BLK6
|
||||
[0 255]
|
||||
|
||||
EFUSE_BLK7
|
||||
[0 255]
|
||||
|
||||
EFUSE_BLK8
|
||||
[0 255]
|
||||
|
||||
EFUSE_BLK9
|
||||
[0 255]
|
||||
EFUSE_BLK0
|
||||
[0 31] [0 0] [4 13] [15 15] [20 20] [20 20] [20 29] [32 38] [32 42] [44 52] [57 78] [80 117] [119 171] [178 181]
|
||||
|
||||
EFUSE_BLK1
|
||||
[0 63]
|
||||
|
||||
EFUSE_BLK10
|
||||
[0 255]
|
||||
|
||||
EFUSE_BLK2
|
||||
[0 255]
|
||||
|
||||
EFUSE_BLK3
|
||||
[0 255] [200 247]
|
||||
|
||||
EFUSE_BLK4
|
||||
[0 255]
|
||||
|
||||
EFUSE_BLK5
|
||||
[0 255]
|
||||
|
||||
EFUSE_BLK6
|
||||
[0 255]
|
||||
|
||||
EFUSE_BLK7
|
||||
[0 255]
|
||||
|
||||
EFUSE_BLK8
|
||||
[0 255]
|
||||
|
||||
EFUSE_BLK9
|
||||
[0 255]
|
||||
Note: Not printed ranges are free for using. (bits in EFUSE_BLK0 are reserved for Espressif)
|
||||
|
||||
@@ -8,227 +8,227 @@
|
||||
Max number of bits in BLK 256
|
||||
Sorted efuse table:
|
||||
# field_name efuse_block bit_start bit_count
|
||||
1 WR_DIS EFUSE_BLK0 0 32
|
||||
2 WR_DIS.RD_DIS EFUSE_BLK0 0 1
|
||||
3 WR_DIS.DIS_ICACHE EFUSE_BLK0 2 1
|
||||
4 WR_DIS.DIS_DCACHE EFUSE_BLK0 2 1
|
||||
5 WR_DIS.DIS_DOWNLOAD_ICACHE EFUSE_BLK0 2 1
|
||||
6 WR_DIS.DIS_DOWNLOAD_DCACHE EFUSE_BLK0 2 1
|
||||
7 WR_DIS.DIS_FORCE_DOWNLOAD EFUSE_BLK0 2 1
|
||||
8 WR_DIS.DIS_USB EFUSE_BLK0 2 1
|
||||
9 WR_DIS.DIS_TWAI EFUSE_BLK0 2 1
|
||||
10 WR_DIS.DIS_BOOT_REMAP EFUSE_BLK0 2 1
|
||||
11 WR_DIS.SOFT_DIS_JTAG EFUSE_BLK0 2 1
|
||||
12 WR_DIS.HARD_DIS_JTAG EFUSE_BLK0 2 1
|
||||
13 WR_DIS.DIS_DOWNLOAD_MANUAL_ENCRYPT EFUSE_BLK0 2 1
|
||||
14 WR_DIS.VDD_SPI_XPD EFUSE_BLK0 3 1
|
||||
15 WR_DIS.VDD_SPI_TIEH EFUSE_BLK0 3 1
|
||||
16 WR_DIS.VDD_SPI_FORCE EFUSE_BLK0 3 1
|
||||
17 WR_DIS.WDT_DELAY_SEL EFUSE_BLK0 3 1
|
||||
18 WR_DIS.SPI_BOOT_CRYPT_CNT EFUSE_BLK0 4 1
|
||||
19 WR_DIS.SECURE_BOOT_KEY_REVOKE0 EFUSE_BLK0 5 1
|
||||
20 WR_DIS.SECURE_BOOT_KEY_REVOKE1 EFUSE_BLK0 6 1
|
||||
21 WR_DIS.SECURE_BOOT_KEY_REVOKE2 EFUSE_BLK0 7 1
|
||||
22 WR_DIS.KEY_PURPOSE_0 EFUSE_BLK0 8 1
|
||||
23 WR_DIS.KEY_PURPOSE_1 EFUSE_BLK0 9 1
|
||||
24 WR_DIS.KEY_PURPOSE_2 EFUSE_BLK0 10 1
|
||||
25 WR_DIS.KEY_PURPOSE_3 EFUSE_BLK0 11 1
|
||||
26 WR_DIS.KEY_PURPOSE_4 EFUSE_BLK0 12 1
|
||||
27 WR_DIS.KEY_PURPOSE_5 EFUSE_BLK0 13 1
|
||||
28 WR_DIS.SECURE_BOOT_EN EFUSE_BLK0 15 1
|
||||
29 WR_DIS.SECURE_BOOT_AGGRESSIVE_REVOKE EFUSE_BLK0 16 1
|
||||
30 WR_DIS.FLASH_TPUW EFUSE_BLK0 18 1
|
||||
31 WR_DIS.DIS_DOWNLOAD_MODE EFUSE_BLK0 18 1
|
||||
32 WR_DIS.DIS_LEGACY_SPI_BOOT EFUSE_BLK0 18 1
|
||||
33 WR_DIS.UART_PRINT_CHANNEL EFUSE_BLK0 18 1
|
||||
34 WR_DIS.DIS_USB_DOWNLOAD_MODE EFUSE_BLK0 18 1
|
||||
35 WR_DIS.ENABLE_SECURITY_DOWNLOAD EFUSE_BLK0 18 1
|
||||
36 WR_DIS.UART_PRINT_CONTROL EFUSE_BLK0 18 1
|
||||
37 WR_DIS.PIN_POWER_SELECTION EFUSE_BLK0 18 1
|
||||
38 WR_DIS.FLASH_TYPE EFUSE_BLK0 18 1
|
||||
39 WR_DIS.FORCE_SEND_RESUME EFUSE_BLK0 18 1
|
||||
40 WR_DIS.SECURE_VERSION EFUSE_BLK0 18 1
|
||||
41 WR_DIS.BLK1 EFUSE_BLK0 20 1
|
||||
42 WR_DIS.MAC EFUSE_BLK0 20 1
|
||||
43 WR_DIS.SPI_PAD_CONFIG_CLK EFUSE_BLK0 20 1
|
||||
44 WR_DIS.SPI_PAD_CONFIG_Q EFUSE_BLK0 20 1
|
||||
45 WR_DIS.SPI_PAD_CONFIG_D EFUSE_BLK0 20 1
|
||||
46 WR_DIS.SPI_PAD_CONFIG_CS EFUSE_BLK0 20 1
|
||||
47 WR_DIS.SPI_PAD_CONFIG_HD EFUSE_BLK0 20 1
|
||||
48 WR_DIS.SPI_PAD_CONFIG_WP EFUSE_BLK0 20 1
|
||||
49 WR_DIS.SPI_PAD_CONFIG_DQS EFUSE_BLK0 20 1
|
||||
50 WR_DIS.SPI_PAD_CONFIG_D4 EFUSE_BLK0 20 1
|
||||
51 WR_DIS.SPI_PAD_CONFIG_D5 EFUSE_BLK0 20 1
|
||||
52 WR_DIS.SPI_PAD_CONFIG_D6 EFUSE_BLK0 20 1
|
||||
53 WR_DIS.SPI_PAD_CONFIG_D7 EFUSE_BLK0 20 1
|
||||
54 WR_DIS.WAFER_VERSION_MAJOR EFUSE_BLK0 20 1
|
||||
55 WR_DIS.WAFER_VERSION_MINOR_HI EFUSE_BLK0 20 1
|
||||
56 WR_DIS.FLASH_VERSION EFUSE_BLK0 20 1
|
||||
57 WR_DIS.BLK_VERSION_MAJOR EFUSE_BLK0 20 1
|
||||
58 WR_DIS.PSRAM_VERSION EFUSE_BLK0 20 1
|
||||
59 WR_DIS.PKG_VERSION EFUSE_BLK0 20 1
|
||||
60 WR_DIS.WAFER_VERSION_MINOR_LO EFUSE_BLK0 20 1
|
||||
61 WR_DIS.SYS_DATA_PART1 EFUSE_BLK0 21 1
|
||||
62 WR_DIS.OPTIONAL_UNIQUE_ID EFUSE_BLK0 21 1
|
||||
63 WR_DIS.ADC_CALIB EFUSE_BLK0 21 1
|
||||
64 WR_DIS.BLK_VERSION_MINOR EFUSE_BLK0 21 1
|
||||
65 WR_DIS.TEMP_CALIB EFUSE_BLK0 21 1
|
||||
66 WR_DIS.RTCCALIB_V1IDX_A10H EFUSE_BLK0 21 1
|
||||
67 WR_DIS.RTCCALIB_V1IDX_A11H EFUSE_BLK0 21 1
|
||||
68 WR_DIS.RTCCALIB_V1IDX_A12H EFUSE_BLK0 21 1
|
||||
69 WR_DIS.RTCCALIB_V1IDX_A13H EFUSE_BLK0 21 1
|
||||
70 WR_DIS.RTCCALIB_V1IDX_A20H EFUSE_BLK0 21 1
|
||||
71 WR_DIS.RTCCALIB_V1IDX_A21H EFUSE_BLK0 21 1
|
||||
72 WR_DIS.RTCCALIB_V1IDX_A22H EFUSE_BLK0 21 1
|
||||
73 WR_DIS.RTCCALIB_V1IDX_A23H EFUSE_BLK0 21 1
|
||||
74 WR_DIS.RTCCALIB_V1IDX_A10L EFUSE_BLK0 21 1
|
||||
75 WR_DIS.RTCCALIB_V1IDX_A11L EFUSE_BLK0 21 1
|
||||
76 WR_DIS.RTCCALIB_V1IDX_A12L EFUSE_BLK0 21 1
|
||||
77 WR_DIS.RTCCALIB_V1IDX_A13L EFUSE_BLK0 21 1
|
||||
78 WR_DIS.RTCCALIB_V1IDX_A20L EFUSE_BLK0 21 1
|
||||
79 WR_DIS.RTCCALIB_V1IDX_A21L EFUSE_BLK0 21 1
|
||||
80 WR_DIS.RTCCALIB_V1IDX_A22L EFUSE_BLK0 21 1
|
||||
81 WR_DIS.RTCCALIB_V1IDX_A23L EFUSE_BLK0 21 1
|
||||
82 WR_DIS.BLOCK_USR_DATA EFUSE_BLK0 22 1
|
||||
83 WR_DIS.CUSTOM_MAC EFUSE_BLK0 22 1
|
||||
84 WR_DIS.BLOCK_KEY0 EFUSE_BLK0 23 1
|
||||
85 WR_DIS.BLOCK_KEY1 EFUSE_BLK0 24 1
|
||||
86 WR_DIS.BLOCK_KEY2 EFUSE_BLK0 25 1
|
||||
87 WR_DIS.BLOCK_KEY3 EFUSE_BLK0 26 1
|
||||
88 WR_DIS.BLOCK_KEY4 EFUSE_BLK0 27 1
|
||||
89 WR_DIS.BLOCK_KEY5 EFUSE_BLK0 28 1
|
||||
90 WR_DIS.BLOCK_SYS_DATA2 EFUSE_BLK0 29 1
|
||||
91 WR_DIS.USB_EXCHG_PINS EFUSE_BLK0 30 1
|
||||
92 WR_DIS.USB_EXT_PHY_ENABLE EFUSE_BLK0 30 1
|
||||
93 WR_DIS.USB_FORCE_NOPERSIST EFUSE_BLK0 30 1
|
||||
94 WR_DIS.BLOCK0_VERSION EFUSE_BLK0 30 1
|
||||
95 RD_DIS EFUSE_BLK0 32 7
|
||||
96 RD_DIS.BLOCK_KEY0 EFUSE_BLK0 32 1
|
||||
97 RD_DIS.BLOCK_KEY1 EFUSE_BLK0 33 1
|
||||
98 RD_DIS.BLOCK_KEY2 EFUSE_BLK0 34 1
|
||||
99 RD_DIS.BLOCK_KEY3 EFUSE_BLK0 35 1
|
||||
100 RD_DIS.BLOCK_KEY4 EFUSE_BLK0 36 1
|
||||
101 RD_DIS.BLOCK_KEY5 EFUSE_BLK0 37 1
|
||||
102 RD_DIS.BLOCK_SYS_DATA2 EFUSE_BLK0 38 1
|
||||
103 DIS_ICACHE EFUSE_BLK0 40 1
|
||||
104 DIS_DCACHE EFUSE_BLK0 41 1
|
||||
105 DIS_DOWNLOAD_ICACHE EFUSE_BLK0 42 1
|
||||
106 DIS_DOWNLOAD_DCACHE EFUSE_BLK0 43 1
|
||||
107 DIS_FORCE_DOWNLOAD EFUSE_BLK0 44 1
|
||||
108 DIS_USB EFUSE_BLK0 45 1
|
||||
109 DIS_TWAI EFUSE_BLK0 46 1
|
||||
110 DIS_BOOT_REMAP EFUSE_BLK0 47 1
|
||||
111 SOFT_DIS_JTAG EFUSE_BLK0 49 1
|
||||
112 HARD_DIS_JTAG EFUSE_BLK0 50 1
|
||||
113 DIS_DOWNLOAD_MANUAL_ENCRYPT EFUSE_BLK0 51 1
|
||||
114 USB_EXCHG_PINS EFUSE_BLK0 56 1
|
||||
115 USB_EXT_PHY_ENABLE EFUSE_BLK0 57 1
|
||||
116 USB_FORCE_NOPERSIST EFUSE_BLK0 58 1
|
||||
117 BLOCK0_VERSION EFUSE_BLK0 59 2
|
||||
118 VDD_SPI_XPD EFUSE_BLK0 68 1
|
||||
119 VDD_SPI_TIEH EFUSE_BLK0 69 1
|
||||
120 VDD_SPI_FORCE EFUSE_BLK0 70 1
|
||||
121 WDT_DELAY_SEL EFUSE_BLK0 80 2
|
||||
122 SPI_BOOT_CRYPT_CNT EFUSE_BLK0 82 3
|
||||
123 SECURE_BOOT_KEY_REVOKE0 EFUSE_BLK0 85 1
|
||||
124 SECURE_BOOT_KEY_REVOKE1 EFUSE_BLK0 86 1
|
||||
125 SECURE_BOOT_KEY_REVOKE2 EFUSE_BLK0 87 1
|
||||
126 KEY_PURPOSE_0 EFUSE_BLK0 88 4
|
||||
127 KEY_PURPOSE_1 EFUSE_BLK0 92 4
|
||||
128 KEY_PURPOSE_2 EFUSE_BLK0 96 4
|
||||
129 KEY_PURPOSE_3 EFUSE_BLK0 100 4
|
||||
130 KEY_PURPOSE_4 EFUSE_BLK0 104 4
|
||||
131 KEY_PURPOSE_5 EFUSE_BLK0 108 4
|
||||
132 SECURE_BOOT_EN EFUSE_BLK0 116 1
|
||||
133 SECURE_BOOT_AGGRESSIVE_REVOKE EFUSE_BLK0 117 1
|
||||
134 FLASH_TPUW EFUSE_BLK0 124 4
|
||||
135 DIS_DOWNLOAD_MODE EFUSE_BLK0 128 1
|
||||
136 DIS_LEGACY_SPI_BOOT EFUSE_BLK0 129 1
|
||||
137 UART_PRINT_CHANNEL EFUSE_BLK0 130 1
|
||||
138 DIS_USB_DOWNLOAD_MODE EFUSE_BLK0 132 1
|
||||
139 ENABLE_SECURITY_DOWNLOAD EFUSE_BLK0 133 1
|
||||
140 UART_PRINT_CONTROL EFUSE_BLK0 134 2
|
||||
141 PIN_POWER_SELECTION EFUSE_BLK0 136 1
|
||||
142 FLASH_TYPE EFUSE_BLK0 137 1
|
||||
143 FORCE_SEND_RESUME EFUSE_BLK0 138 1
|
||||
144 SECURE_VERSION EFUSE_BLK0 139 16
|
||||
145 DISABLE_WAFER_VERSION_MAJOR EFUSE_BLK0 160 1
|
||||
146 DISABLE_BLK_VERSION_MAJOR EFUSE_BLK0 161 1
|
||||
147 MAC EFUSE_BLK1 0 8
|
||||
148 MAC EFUSE_BLK1 8 8
|
||||
149 MAC EFUSE_BLK1 16 8
|
||||
150 MAC EFUSE_BLK1 24 8
|
||||
151 MAC EFUSE_BLK1 32 8
|
||||
152 MAC EFUSE_BLK1 40 8
|
||||
153 SPI_PAD_CONFIG_CLK EFUSE_BLK1 48 6
|
||||
154 SPI_PAD_CONFIG_Q EFUSE_BLK1 54 6
|
||||
155 SPI_PAD_CONFIG_D EFUSE_BLK1 60 6
|
||||
156 SPI_PAD_CONFIG_CS EFUSE_BLK1 66 6
|
||||
157 SPI_PAD_CONFIG_HD EFUSE_BLK1 72 6
|
||||
158 SPI_PAD_CONFIG_WP EFUSE_BLK1 78 6
|
||||
159 SPI_PAD_CONFIG_DQS EFUSE_BLK1 84 6
|
||||
160 SPI_PAD_CONFIG_D4 EFUSE_BLK1 90 6
|
||||
161 SPI_PAD_CONFIG_D5 EFUSE_BLK1 96 6
|
||||
162 SPI_PAD_CONFIG_D6 EFUSE_BLK1 102 6
|
||||
163 SPI_PAD_CONFIG_D7 EFUSE_BLK1 108 6
|
||||
164 WAFER_VERSION_MAJOR EFUSE_BLK1 114 2
|
||||
165 WAFER_VERSION_MINOR_HI EFUSE_BLK1 116 1
|
||||
166 FLASH_VERSION EFUSE_BLK1 117 4
|
||||
167 BLK_VERSION_MAJOR EFUSE_BLK1 121 2
|
||||
168 PSRAM_VERSION EFUSE_BLK1 124 4
|
||||
169 PKG_VERSION EFUSE_BLK1 128 4
|
||||
170 WAFER_VERSION_MINOR_LO EFUSE_BLK1 132 3
|
||||
171 SYS_DATA_PART2 EFUSE_BLK10 0 256
|
||||
172 OPTIONAL_UNIQUE_ID EFUSE_BLK2 0 128
|
||||
173 ADC_CALIB EFUSE_BLK2 128 4
|
||||
174 BLK_VERSION_MINOR EFUSE_BLK2 132 3
|
||||
175 TEMP_CALIB EFUSE_BLK2 135 9
|
||||
176 RTCCALIB_V1IDX_A10H EFUSE_BLK2 144 8
|
||||
177 RTCCALIB_V1IDX_A11H EFUSE_BLK2 152 8
|
||||
178 RTCCALIB_V1IDX_A12H EFUSE_BLK2 160 8
|
||||
179 RTCCALIB_V1IDX_A13H EFUSE_BLK2 168 8
|
||||
180 RTCCALIB_V1IDX_A20H EFUSE_BLK2 176 8
|
||||
181 RTCCALIB_V1IDX_A21H EFUSE_BLK2 184 8
|
||||
182 RTCCALIB_V1IDX_A22H EFUSE_BLK2 192 8
|
||||
183 RTCCALIB_V1IDX_A23H EFUSE_BLK2 200 8
|
||||
184 RTCCALIB_V1IDX_A10L EFUSE_BLK2 208 6
|
||||
185 RTCCALIB_V1IDX_A11L EFUSE_BLK2 214 6
|
||||
186 RTCCALIB_V1IDX_A12L EFUSE_BLK2 220 6
|
||||
187 RTCCALIB_V1IDX_A13L EFUSE_BLK2 226 6
|
||||
188 RTCCALIB_V1IDX_A20L EFUSE_BLK2 232 6
|
||||
189 RTCCALIB_V1IDX_A21L EFUSE_BLK2 238 6
|
||||
190 RTCCALIB_V1IDX_A22L EFUSE_BLK2 244 6
|
||||
191 RTCCALIB_V1IDX_A23L EFUSE_BLK2 250 6
|
||||
192 USER_DATA EFUSE_BLK3 0 256
|
||||
193 USER_DATA.MAC_CUSTOM EFUSE_BLK3 200 48
|
||||
194 KEY0 EFUSE_BLK4 0 256
|
||||
195 KEY1 EFUSE_BLK5 0 256
|
||||
196 KEY2 EFUSE_BLK6 0 256
|
||||
197 KEY3 EFUSE_BLK7 0 256
|
||||
198 KEY4 EFUSE_BLK8 0 256
|
||||
199 KEY5 EFUSE_BLK9 0 256
|
||||
1 WR_DIS EFUSE_BLK0 0 32
|
||||
2 WR_DIS.RD_DIS EFUSE_BLK0 0 1
|
||||
3 WR_DIS.DIS_ICACHE EFUSE_BLK0 2 1
|
||||
4 WR_DIS.DIS_DCACHE EFUSE_BLK0 2 1
|
||||
5 WR_DIS.DIS_DOWNLOAD_ICACHE EFUSE_BLK0 2 1
|
||||
6 WR_DIS.DIS_DOWNLOAD_DCACHE EFUSE_BLK0 2 1
|
||||
7 WR_DIS.DIS_FORCE_DOWNLOAD EFUSE_BLK0 2 1
|
||||
8 WR_DIS.DIS_USB EFUSE_BLK0 2 1
|
||||
9 WR_DIS.DIS_TWAI EFUSE_BLK0 2 1
|
||||
10 WR_DIS.DIS_BOOT_REMAP EFUSE_BLK0 2 1
|
||||
11 WR_DIS.SOFT_DIS_JTAG EFUSE_BLK0 2 1
|
||||
12 WR_DIS.HARD_DIS_JTAG EFUSE_BLK0 2 1
|
||||
13 WR_DIS.DIS_DOWNLOAD_MANUAL_ENCRYPT EFUSE_BLK0 2 1
|
||||
14 WR_DIS.VDD_SPI_XPD EFUSE_BLK0 3 1
|
||||
15 WR_DIS.VDD_SPI_TIEH EFUSE_BLK0 3 1
|
||||
16 WR_DIS.VDD_SPI_FORCE EFUSE_BLK0 3 1
|
||||
17 WR_DIS.WDT_DELAY_SEL EFUSE_BLK0 3 1
|
||||
18 WR_DIS.SPI_BOOT_CRYPT_CNT EFUSE_BLK0 4 1
|
||||
19 WR_DIS.SECURE_BOOT_KEY_REVOKE0 EFUSE_BLK0 5 1
|
||||
20 WR_DIS.SECURE_BOOT_KEY_REVOKE1 EFUSE_BLK0 6 1
|
||||
21 WR_DIS.SECURE_BOOT_KEY_REVOKE2 EFUSE_BLK0 7 1
|
||||
22 WR_DIS.KEY_PURPOSE_0 EFUSE_BLK0 8 1
|
||||
23 WR_DIS.KEY_PURPOSE_1 EFUSE_BLK0 9 1
|
||||
24 WR_DIS.KEY_PURPOSE_2 EFUSE_BLK0 10 1
|
||||
25 WR_DIS.KEY_PURPOSE_3 EFUSE_BLK0 11 1
|
||||
26 WR_DIS.KEY_PURPOSE_4 EFUSE_BLK0 12 1
|
||||
27 WR_DIS.KEY_PURPOSE_5 EFUSE_BLK0 13 1
|
||||
28 WR_DIS.SECURE_BOOT_EN EFUSE_BLK0 15 1
|
||||
29 WR_DIS.SECURE_BOOT_AGGRESSIVE_REVOKE EFUSE_BLK0 16 1
|
||||
30 WR_DIS.FLASH_TPUW EFUSE_BLK0 18 1
|
||||
31 WR_DIS.DIS_DOWNLOAD_MODE EFUSE_BLK0 18 1
|
||||
32 WR_DIS.DIS_LEGACY_SPI_BOOT EFUSE_BLK0 18 1
|
||||
33 WR_DIS.UART_PRINT_CHANNEL EFUSE_BLK0 18 1
|
||||
34 WR_DIS.DIS_USB_DOWNLOAD_MODE EFUSE_BLK0 18 1
|
||||
35 WR_DIS.ENABLE_SECURITY_DOWNLOAD EFUSE_BLK0 18 1
|
||||
36 WR_DIS.UART_PRINT_CONTROL EFUSE_BLK0 18 1
|
||||
37 WR_DIS.PIN_POWER_SELECTION EFUSE_BLK0 18 1
|
||||
38 WR_DIS.FLASH_TYPE EFUSE_BLK0 18 1
|
||||
39 WR_DIS.FORCE_SEND_RESUME EFUSE_BLK0 18 1
|
||||
40 WR_DIS.SECURE_VERSION EFUSE_BLK0 18 1
|
||||
41 WR_DIS.BLK1 EFUSE_BLK0 20 1
|
||||
42 WR_DIS.MAC EFUSE_BLK0 20 1
|
||||
43 WR_DIS.SPI_PAD_CONFIG_CLK EFUSE_BLK0 20 1
|
||||
44 WR_DIS.SPI_PAD_CONFIG_Q EFUSE_BLK0 20 1
|
||||
45 WR_DIS.SPI_PAD_CONFIG_D EFUSE_BLK0 20 1
|
||||
46 WR_DIS.SPI_PAD_CONFIG_CS EFUSE_BLK0 20 1
|
||||
47 WR_DIS.SPI_PAD_CONFIG_HD EFUSE_BLK0 20 1
|
||||
48 WR_DIS.SPI_PAD_CONFIG_WP EFUSE_BLK0 20 1
|
||||
49 WR_DIS.SPI_PAD_CONFIG_DQS EFUSE_BLK0 20 1
|
||||
50 WR_DIS.SPI_PAD_CONFIG_D4 EFUSE_BLK0 20 1
|
||||
51 WR_DIS.SPI_PAD_CONFIG_D5 EFUSE_BLK0 20 1
|
||||
52 WR_DIS.SPI_PAD_CONFIG_D6 EFUSE_BLK0 20 1
|
||||
53 WR_DIS.SPI_PAD_CONFIG_D7 EFUSE_BLK0 20 1
|
||||
54 WR_DIS.WAFER_VERSION_MAJOR EFUSE_BLK0 20 1
|
||||
55 WR_DIS.WAFER_VERSION_MINOR_HI EFUSE_BLK0 20 1
|
||||
56 WR_DIS.FLASH_VERSION EFUSE_BLK0 20 1
|
||||
57 WR_DIS.BLK_VERSION_MAJOR EFUSE_BLK0 20 1
|
||||
58 WR_DIS.PSRAM_VERSION EFUSE_BLK0 20 1
|
||||
59 WR_DIS.PKG_VERSION EFUSE_BLK0 20 1
|
||||
60 WR_DIS.WAFER_VERSION_MINOR_LO EFUSE_BLK0 20 1
|
||||
61 WR_DIS.SYS_DATA_PART1 EFUSE_BLK0 21 1
|
||||
62 WR_DIS.OPTIONAL_UNIQUE_ID EFUSE_BLK0 21 1
|
||||
63 WR_DIS.ADC_CALIB EFUSE_BLK0 21 1
|
||||
64 WR_DIS.BLK_VERSION_MINOR EFUSE_BLK0 21 1
|
||||
65 WR_DIS.TEMP_CALIB EFUSE_BLK0 21 1
|
||||
66 WR_DIS.RTCCALIB_V1IDX_A10H EFUSE_BLK0 21 1
|
||||
67 WR_DIS.RTCCALIB_V1IDX_A11H EFUSE_BLK0 21 1
|
||||
68 WR_DIS.RTCCALIB_V1IDX_A12H EFUSE_BLK0 21 1
|
||||
69 WR_DIS.RTCCALIB_V1IDX_A13H EFUSE_BLK0 21 1
|
||||
70 WR_DIS.RTCCALIB_V1IDX_A20H EFUSE_BLK0 21 1
|
||||
71 WR_DIS.RTCCALIB_V1IDX_A21H EFUSE_BLK0 21 1
|
||||
72 WR_DIS.RTCCALIB_V1IDX_A22H EFUSE_BLK0 21 1
|
||||
73 WR_DIS.RTCCALIB_V1IDX_A23H EFUSE_BLK0 21 1
|
||||
74 WR_DIS.RTCCALIB_V1IDX_A10L EFUSE_BLK0 21 1
|
||||
75 WR_DIS.RTCCALIB_V1IDX_A11L EFUSE_BLK0 21 1
|
||||
76 WR_DIS.RTCCALIB_V1IDX_A12L EFUSE_BLK0 21 1
|
||||
77 WR_DIS.RTCCALIB_V1IDX_A13L EFUSE_BLK0 21 1
|
||||
78 WR_DIS.RTCCALIB_V1IDX_A20L EFUSE_BLK0 21 1
|
||||
79 WR_DIS.RTCCALIB_V1IDX_A21L EFUSE_BLK0 21 1
|
||||
80 WR_DIS.RTCCALIB_V1IDX_A22L EFUSE_BLK0 21 1
|
||||
81 WR_DIS.RTCCALIB_V1IDX_A23L EFUSE_BLK0 21 1
|
||||
82 WR_DIS.BLOCK_USR_DATA EFUSE_BLK0 22 1
|
||||
83 WR_DIS.CUSTOM_MAC EFUSE_BLK0 22 1
|
||||
84 WR_DIS.BLOCK_KEY0 EFUSE_BLK0 23 1
|
||||
85 WR_DIS.BLOCK_KEY1 EFUSE_BLK0 24 1
|
||||
86 WR_DIS.BLOCK_KEY2 EFUSE_BLK0 25 1
|
||||
87 WR_DIS.BLOCK_KEY3 EFUSE_BLK0 26 1
|
||||
88 WR_DIS.BLOCK_KEY4 EFUSE_BLK0 27 1
|
||||
89 WR_DIS.BLOCK_KEY5 EFUSE_BLK0 28 1
|
||||
90 WR_DIS.BLOCK_SYS_DATA2 EFUSE_BLK0 29 1
|
||||
91 WR_DIS.USB_EXCHG_PINS EFUSE_BLK0 30 1
|
||||
92 WR_DIS.USB_EXT_PHY_ENABLE EFUSE_BLK0 30 1
|
||||
93 WR_DIS.USB_FORCE_NOPERSIST EFUSE_BLK0 30 1
|
||||
94 WR_DIS.BLOCK0_VERSION EFUSE_BLK0 30 1
|
||||
95 RD_DIS EFUSE_BLK0 32 7
|
||||
96 RD_DIS.BLOCK_KEY0 EFUSE_BLK0 32 1
|
||||
97 RD_DIS.BLOCK_KEY1 EFUSE_BLK0 33 1
|
||||
98 RD_DIS.BLOCK_KEY2 EFUSE_BLK0 34 1
|
||||
99 RD_DIS.BLOCK_KEY3 EFUSE_BLK0 35 1
|
||||
100 RD_DIS.BLOCK_KEY4 EFUSE_BLK0 36 1
|
||||
101 RD_DIS.BLOCK_KEY5 EFUSE_BLK0 37 1
|
||||
102 RD_DIS.BLOCK_SYS_DATA2 EFUSE_BLK0 38 1
|
||||
103 DIS_ICACHE EFUSE_BLK0 40 1
|
||||
104 DIS_DCACHE EFUSE_BLK0 41 1
|
||||
105 DIS_DOWNLOAD_ICACHE EFUSE_BLK0 42 1
|
||||
106 DIS_DOWNLOAD_DCACHE EFUSE_BLK0 43 1
|
||||
107 DIS_FORCE_DOWNLOAD EFUSE_BLK0 44 1
|
||||
108 DIS_USB EFUSE_BLK0 45 1
|
||||
109 DIS_TWAI EFUSE_BLK0 46 1
|
||||
110 DIS_BOOT_REMAP EFUSE_BLK0 47 1
|
||||
111 SOFT_DIS_JTAG EFUSE_BLK0 49 1
|
||||
112 HARD_DIS_JTAG EFUSE_BLK0 50 1
|
||||
113 DIS_DOWNLOAD_MANUAL_ENCRYPT EFUSE_BLK0 51 1
|
||||
114 USB_EXCHG_PINS EFUSE_BLK0 56 1
|
||||
115 USB_EXT_PHY_ENABLE EFUSE_BLK0 57 1
|
||||
116 USB_FORCE_NOPERSIST EFUSE_BLK0 58 1
|
||||
117 BLOCK0_VERSION EFUSE_BLK0 59 2
|
||||
118 VDD_SPI_XPD EFUSE_BLK0 68 1
|
||||
119 VDD_SPI_TIEH EFUSE_BLK0 69 1
|
||||
120 VDD_SPI_FORCE EFUSE_BLK0 70 1
|
||||
121 WDT_DELAY_SEL EFUSE_BLK0 80 2
|
||||
122 SPI_BOOT_CRYPT_CNT EFUSE_BLK0 82 3
|
||||
123 SECURE_BOOT_KEY_REVOKE0 EFUSE_BLK0 85 1
|
||||
124 SECURE_BOOT_KEY_REVOKE1 EFUSE_BLK0 86 1
|
||||
125 SECURE_BOOT_KEY_REVOKE2 EFUSE_BLK0 87 1
|
||||
126 KEY_PURPOSE_0 EFUSE_BLK0 88 4
|
||||
127 KEY_PURPOSE_1 EFUSE_BLK0 92 4
|
||||
128 KEY_PURPOSE_2 EFUSE_BLK0 96 4
|
||||
129 KEY_PURPOSE_3 EFUSE_BLK0 100 4
|
||||
130 KEY_PURPOSE_4 EFUSE_BLK0 104 4
|
||||
131 KEY_PURPOSE_5 EFUSE_BLK0 108 4
|
||||
132 SECURE_BOOT_EN EFUSE_BLK0 116 1
|
||||
133 SECURE_BOOT_AGGRESSIVE_REVOKE EFUSE_BLK0 117 1
|
||||
134 FLASH_TPUW EFUSE_BLK0 124 4
|
||||
135 DIS_DOWNLOAD_MODE EFUSE_BLK0 128 1
|
||||
136 DIS_LEGACY_SPI_BOOT EFUSE_BLK0 129 1
|
||||
137 UART_PRINT_CHANNEL EFUSE_BLK0 130 1
|
||||
138 DIS_USB_DOWNLOAD_MODE EFUSE_BLK0 132 1
|
||||
139 ENABLE_SECURITY_DOWNLOAD EFUSE_BLK0 133 1
|
||||
140 UART_PRINT_CONTROL EFUSE_BLK0 134 2
|
||||
141 PIN_POWER_SELECTION EFUSE_BLK0 136 1
|
||||
142 FLASH_TYPE EFUSE_BLK0 137 1
|
||||
143 FORCE_SEND_RESUME EFUSE_BLK0 138 1
|
||||
144 SECURE_VERSION EFUSE_BLK0 139 16
|
||||
145 DISABLE_WAFER_VERSION_MAJOR EFUSE_BLK0 160 1
|
||||
146 DISABLE_BLK_VERSION_MAJOR EFUSE_BLK0 161 1
|
||||
147 MAC EFUSE_BLK1 0 8
|
||||
148 MAC EFUSE_BLK1 8 8
|
||||
149 MAC EFUSE_BLK1 16 8
|
||||
150 MAC EFUSE_BLK1 24 8
|
||||
151 MAC EFUSE_BLK1 32 8
|
||||
152 MAC EFUSE_BLK1 40 8
|
||||
153 SPI_PAD_CONFIG_CLK EFUSE_BLK1 48 6
|
||||
154 SPI_PAD_CONFIG_Q EFUSE_BLK1 54 6
|
||||
155 SPI_PAD_CONFIG_D EFUSE_BLK1 60 6
|
||||
156 SPI_PAD_CONFIG_CS EFUSE_BLK1 66 6
|
||||
157 SPI_PAD_CONFIG_HD EFUSE_BLK1 72 6
|
||||
158 SPI_PAD_CONFIG_WP EFUSE_BLK1 78 6
|
||||
159 SPI_PAD_CONFIG_DQS EFUSE_BLK1 84 6
|
||||
160 SPI_PAD_CONFIG_D4 EFUSE_BLK1 90 6
|
||||
161 SPI_PAD_CONFIG_D5 EFUSE_BLK1 96 6
|
||||
162 SPI_PAD_CONFIG_D6 EFUSE_BLK1 102 6
|
||||
163 SPI_PAD_CONFIG_D7 EFUSE_BLK1 108 6
|
||||
164 WAFER_VERSION_MAJOR EFUSE_BLK1 114 2
|
||||
165 WAFER_VERSION_MINOR_HI EFUSE_BLK1 116 1
|
||||
166 FLASH_VERSION EFUSE_BLK1 117 4
|
||||
167 BLK_VERSION_MAJOR EFUSE_BLK1 121 2
|
||||
168 PSRAM_VERSION EFUSE_BLK1 124 4
|
||||
169 PKG_VERSION EFUSE_BLK1 128 4
|
||||
170 WAFER_VERSION_MINOR_LO EFUSE_BLK1 132 3
|
||||
171 SYS_DATA_PART2 EFUSE_BLK10 0 256
|
||||
172 OPTIONAL_UNIQUE_ID EFUSE_BLK2 0 128
|
||||
173 ADC_CALIB EFUSE_BLK2 128 4
|
||||
174 BLK_VERSION_MINOR EFUSE_BLK2 132 3
|
||||
175 TEMP_CALIB EFUSE_BLK2 135 9
|
||||
176 RTCCALIB_V1IDX_A10H EFUSE_BLK2 144 8
|
||||
177 RTCCALIB_V1IDX_A11H EFUSE_BLK2 152 8
|
||||
178 RTCCALIB_V1IDX_A12H EFUSE_BLK2 160 8
|
||||
179 RTCCALIB_V1IDX_A13H EFUSE_BLK2 168 8
|
||||
180 RTCCALIB_V1IDX_A20H EFUSE_BLK2 176 8
|
||||
181 RTCCALIB_V1IDX_A21H EFUSE_BLK2 184 8
|
||||
182 RTCCALIB_V1IDX_A22H EFUSE_BLK2 192 8
|
||||
183 RTCCALIB_V1IDX_A23H EFUSE_BLK2 200 8
|
||||
184 RTCCALIB_V1IDX_A10L EFUSE_BLK2 208 6
|
||||
185 RTCCALIB_V1IDX_A11L EFUSE_BLK2 214 6
|
||||
186 RTCCALIB_V1IDX_A12L EFUSE_BLK2 220 6
|
||||
187 RTCCALIB_V1IDX_A13L EFUSE_BLK2 226 6
|
||||
188 RTCCALIB_V1IDX_A20L EFUSE_BLK2 232 6
|
||||
189 RTCCALIB_V1IDX_A21L EFUSE_BLK2 238 6
|
||||
190 RTCCALIB_V1IDX_A22L EFUSE_BLK2 244 6
|
||||
191 RTCCALIB_V1IDX_A23L EFUSE_BLK2 250 6
|
||||
192 USER_DATA EFUSE_BLK3 0 256
|
||||
193 USER_DATA.MAC_CUSTOM EFUSE_BLK3 200 48
|
||||
194 KEY0 EFUSE_BLK4 0 256
|
||||
195 KEY1 EFUSE_BLK5 0 256
|
||||
196 KEY2 EFUSE_BLK6 0 256
|
||||
197 KEY3 EFUSE_BLK7 0 256
|
||||
198 KEY4 EFUSE_BLK8 0 256
|
||||
199 KEY5 EFUSE_BLK9 0 256
|
||||
|
||||
Used bits in efuse table:
|
||||
EFUSE_BLK0
|
||||
[0 31] [0 0] [2 2] ... [32 38] [40 47] [49 51] [56 60] [68 70] [80 111] [116 117] [124 130] [132 154] [160 161]
|
||||
EFUSE_BLK1
|
||||
[0 122] [124 134]
|
||||
EFUSE_BLK10
|
||||
[0 255]
|
||||
EFUSE_BLK2
|
||||
[0 255]
|
||||
EFUSE_BLK3
|
||||
[0 255] [200 247]
|
||||
EFUSE_BLK4
|
||||
[0 255]
|
||||
EFUSE_BLK5
|
||||
[0 255]
|
||||
EFUSE_BLK6
|
||||
[0 255]
|
||||
EFUSE_BLK7
|
||||
[0 255]
|
||||
EFUSE_BLK8
|
||||
[0 255]
|
||||
EFUSE_BLK9
|
||||
[0 255]
|
||||
Note: Not printed ranges are free for using. (bits in EFUSE_BLK0 are reserved for Espressif)
|
||||
EFUSE_BLK0
|
||||
[0 31] [0 0] [2 2] ... [32 38] [40 47] [49 51] [56 60] [68 70] [80 111] [116 117] [124 130] [132 154] [160 161]
|
||||
EFUSE_BLK1
|
||||
[0 122] [124 134]
|
||||
EFUSE_BLK10
|
||||
[0 255]
|
||||
EFUSE_BLK2
|
||||
[0 255]
|
||||
EFUSE_BLK3
|
||||
[0 255] [200 247]
|
||||
EFUSE_BLK4
|
||||
[0 255]
|
||||
EFUSE_BLK5
|
||||
[0 255]
|
||||
EFUSE_BLK6
|
||||
[0 255]
|
||||
EFUSE_BLK7
|
||||
[0 255]
|
||||
EFUSE_BLK8
|
||||
[0 255]
|
||||
EFUSE_BLK9
|
||||
[0 255]
|
||||
Note: Not printed ranges are free for using. (bits in EFUSE_BLK0 are reserved for Espressif)
|
||||
|
||||
@@ -6,247 +6,247 @@
|
||||
Max number of bits in BLK 256
|
||||
Sorted efuse table:
|
||||
# field_name efuse_block bit_start bit_count
|
||||
1 WR_DIS EFUSE_BLK0 0 32
|
||||
2 WR_DIS.RD_DIS EFUSE_BLK0 0 1
|
||||
3 WR_DIS.DIS_ICACHE EFUSE_BLK0 2 1
|
||||
4 WR_DIS.DIS_DCACHE EFUSE_BLK0 2 1
|
||||
5 WR_DIS.DIS_DOWNLOAD_ICACHE EFUSE_BLK0 2 1
|
||||
6 WR_DIS.DIS_DOWNLOAD_DCACHE EFUSE_BLK0 2 1
|
||||
7 WR_DIS.DIS_FORCE_DOWNLOAD EFUSE_BLK0 2 1
|
||||
8 WR_DIS.DIS_USB_OTG EFUSE_BLK0 2 1
|
||||
9 WR_DIS.DIS_TWAI EFUSE_BLK0 2 1
|
||||
10 WR_DIS.DIS_APP_CPU EFUSE_BLK0 2 1
|
||||
11 WR_DIS.DIS_PAD_JTAG EFUSE_BLK0 2 1
|
||||
12 WR_DIS.DIS_DOWNLOAD_MANUAL_ENCRYPT EFUSE_BLK0 2 1
|
||||
13 WR_DIS.DIS_USB_JTAG EFUSE_BLK0 2 1
|
||||
14 WR_DIS.DIS_USB_SERIAL_JTAG EFUSE_BLK0 2 1
|
||||
15 WR_DIS.STRAP_JTAG_SEL EFUSE_BLK0 2 1
|
||||
16 WR_DIS.USB_PHY_SEL EFUSE_BLK0 2 1
|
||||
17 WR_DIS.VDD_SPI_XPD EFUSE_BLK0 3 1
|
||||
18 WR_DIS.VDD_SPI_TIEH EFUSE_BLK0 3 1
|
||||
19 WR_DIS.VDD_SPI_FORCE EFUSE_BLK0 3 1
|
||||
20 WR_DIS.WDT_DELAY_SEL EFUSE_BLK0 3 1
|
||||
21 WR_DIS.SPI_BOOT_CRYPT_CNT EFUSE_BLK0 4 1
|
||||
22 WR_DIS.SECURE_BOOT_KEY_REVOKE0 EFUSE_BLK0 5 1
|
||||
23 WR_DIS.SECURE_BOOT_KEY_REVOKE1 EFUSE_BLK0 6 1
|
||||
24 WR_DIS.SECURE_BOOT_KEY_REVOKE2 EFUSE_BLK0 7 1
|
||||
25 WR_DIS.KEY_PURPOSE_0 EFUSE_BLK0 8 1
|
||||
26 WR_DIS.KEY_PURPOSE_1 EFUSE_BLK0 9 1
|
||||
27 WR_DIS.KEY_PURPOSE_2 EFUSE_BLK0 10 1
|
||||
28 WR_DIS.KEY_PURPOSE_3 EFUSE_BLK0 11 1
|
||||
29 WR_DIS.KEY_PURPOSE_4 EFUSE_BLK0 12 1
|
||||
30 WR_DIS.KEY_PURPOSE_5 EFUSE_BLK0 13 1
|
||||
31 WR_DIS.SECURE_BOOT_EN EFUSE_BLK0 15 1
|
||||
32 WR_DIS.SECURE_BOOT_AGGRESSIVE_REVOKE EFUSE_BLK0 16 1
|
||||
33 WR_DIS.FLASH_TPUW EFUSE_BLK0 18 1
|
||||
34 WR_DIS.DIS_DOWNLOAD_MODE EFUSE_BLK0 18 1
|
||||
35 WR_DIS.DIS_DIRECT_BOOT EFUSE_BLK0 18 1
|
||||
36 WR_DIS.DIS_USB_SERIAL_JTAG_ROM_PRINT EFUSE_BLK0 18 1
|
||||
37 WR_DIS.FLASH_ECC_MODE EFUSE_BLK0 18 1
|
||||
38 WR_DIS.DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE EFUSE_BLK0 18 1
|
||||
39 WR_DIS.ENABLE_SECURITY_DOWNLOAD EFUSE_BLK0 18 1
|
||||
40 WR_DIS.UART_PRINT_CONTROL EFUSE_BLK0 18 1
|
||||
41 WR_DIS.PIN_POWER_SELECTION EFUSE_BLK0 18 1
|
||||
42 WR_DIS.FLASH_TYPE EFUSE_BLK0 18 1
|
||||
43 WR_DIS.FLASH_PAGE_SIZE EFUSE_BLK0 18 1
|
||||
44 WR_DIS.FLASH_ECC_EN EFUSE_BLK0 18 1
|
||||
45 WR_DIS.FORCE_SEND_RESUME EFUSE_BLK0 18 1
|
||||
46 WR_DIS.SECURE_VERSION EFUSE_BLK0 18 1
|
||||
47 WR_DIS.DIS_USB_OTG_DOWNLOAD_MODE EFUSE_BLK0 19 1
|
||||
48 WR_DIS.DISABLE_WAFER_VERSION_MAJOR EFUSE_BLK0 19 1
|
||||
49 WR_DIS.DISABLE_BLK_VERSION_MAJOR EFUSE_BLK0 19 1
|
||||
50 WR_DIS.BLK1 EFUSE_BLK0 20 1
|
||||
51 WR_DIS.MAC EFUSE_BLK0 20 1
|
||||
52 WR_DIS.SPI_PAD_CONFIG_CLK EFUSE_BLK0 20 1
|
||||
53 WR_DIS.SPI_PAD_CONFIG_Q EFUSE_BLK0 20 1
|
||||
54 WR_DIS.SPI_PAD_CONFIG_D EFUSE_BLK0 20 1
|
||||
55 WR_DIS.SPI_PAD_CONFIG_CS EFUSE_BLK0 20 1
|
||||
56 WR_DIS.SPI_PAD_CONFIG_HD EFUSE_BLK0 20 1
|
||||
57 WR_DIS.SPI_PAD_CONFIG_WP EFUSE_BLK0 20 1
|
||||
58 WR_DIS.SPI_PAD_CONFIG_DQS EFUSE_BLK0 20 1
|
||||
59 WR_DIS.SPI_PAD_CONFIG_D4 EFUSE_BLK0 20 1
|
||||
60 WR_DIS.SPI_PAD_CONFIG_D5 EFUSE_BLK0 20 1
|
||||
61 WR_DIS.SPI_PAD_CONFIG_D6 EFUSE_BLK0 20 1
|
||||
62 WR_DIS.SPI_PAD_CONFIG_D7 EFUSE_BLK0 20 1
|
||||
63 WR_DIS.WAFER_VERSION_MINOR_LO EFUSE_BLK0 20 1
|
||||
64 WR_DIS.PKG_VERSION EFUSE_BLK0 20 1
|
||||
65 WR_DIS.BLK_VERSION_MINOR EFUSE_BLK0 20 1
|
||||
66 WR_DIS.K_RTC_LDO EFUSE_BLK0 20 1
|
||||
67 WR_DIS.K_DIG_LDO EFUSE_BLK0 20 1
|
||||
68 WR_DIS.V_RTC_DBIAS20 EFUSE_BLK0 20 1
|
||||
69 WR_DIS.V_DIG_DBIAS20 EFUSE_BLK0 20 1
|
||||
70 WR_DIS.DIG_DBIAS_HVT EFUSE_BLK0 20 1
|
||||
71 WR_DIS.WAFER_VERSION_MINOR_HI EFUSE_BLK0 20 1
|
||||
72 WR_DIS.WAFER_VERSION_MAJOR EFUSE_BLK0 20 1
|
||||
73 WR_DIS.ADC2_CAL_VOL_ATTEN3 EFUSE_BLK0 20 1
|
||||
74 WR_DIS.SYS_DATA_PART1 EFUSE_BLK0 21 1
|
||||
75 WR_DIS.OPTIONAL_UNIQUE_ID EFUSE_BLK0 21 1
|
||||
76 WR_DIS.BLK_VERSION_MAJOR EFUSE_BLK0 21 1
|
||||
77 WR_DIS.TEMP_CALIB EFUSE_BLK0 21 1
|
||||
78 WR_DIS.OCODE EFUSE_BLK0 21 1
|
||||
79 WR_DIS.ADC1_INIT_CODE_ATTEN0 EFUSE_BLK0 21 1
|
||||
80 WR_DIS.ADC1_INIT_CODE_ATTEN1 EFUSE_BLK0 21 1
|
||||
81 WR_DIS.ADC1_INIT_CODE_ATTEN2 EFUSE_BLK0 21 1
|
||||
82 WR_DIS.ADC1_INIT_CODE_ATTEN3 EFUSE_BLK0 21 1
|
||||
83 WR_DIS.ADC2_INIT_CODE_ATTEN0 EFUSE_BLK0 21 1
|
||||
84 WR_DIS.ADC2_INIT_CODE_ATTEN1 EFUSE_BLK0 21 1
|
||||
85 WR_DIS.ADC2_INIT_CODE_ATTEN2 EFUSE_BLK0 21 1
|
||||
86 WR_DIS.ADC2_INIT_CODE_ATTEN3 EFUSE_BLK0 21 1
|
||||
87 WR_DIS.ADC1_CAL_VOL_ATTEN0 EFUSE_BLK0 21 1
|
||||
88 WR_DIS.ADC1_CAL_VOL_ATTEN1 EFUSE_BLK0 21 1
|
||||
89 WR_DIS.ADC1_CAL_VOL_ATTEN2 EFUSE_BLK0 21 1
|
||||
90 WR_DIS.ADC1_CAL_VOL_ATTEN3 EFUSE_BLK0 21 1
|
||||
91 WR_DIS.ADC2_CAL_VOL_ATTEN0 EFUSE_BLK0 21 1
|
||||
92 WR_DIS.ADC2_CAL_VOL_ATTEN1 EFUSE_BLK0 21 1
|
||||
93 WR_DIS.ADC2_CAL_VOL_ATTEN2 EFUSE_BLK0 21 1
|
||||
94 WR_DIS.BLOCK_USR_DATA EFUSE_BLK0 22 1
|
||||
95 WR_DIS.CUSTOM_MAC EFUSE_BLK0 22 1
|
||||
96 WR_DIS.BLOCK_KEY0 EFUSE_BLK0 23 1
|
||||
97 WR_DIS.BLOCK_KEY1 EFUSE_BLK0 24 1
|
||||
98 WR_DIS.BLOCK_KEY2 EFUSE_BLK0 25 1
|
||||
99 WR_DIS.BLOCK_KEY3 EFUSE_BLK0 26 1
|
||||
100 WR_DIS.BLOCK_KEY4 EFUSE_BLK0 27 1
|
||||
101 WR_DIS.BLOCK_KEY5 EFUSE_BLK0 28 1
|
||||
102 WR_DIS.BLOCK_SYS_DATA2 EFUSE_BLK0 29 1
|
||||
103 WR_DIS.USB_EXCHG_PINS EFUSE_BLK0 30 1
|
||||
104 WR_DIS.USB_EXT_PHY_ENABLE EFUSE_BLK0 30 1
|
||||
105 WR_DIS.SOFT_DIS_JTAG EFUSE_BLK0 31 1
|
||||
106 RD_DIS EFUSE_BLK0 32 7
|
||||
107 RD_DIS.BLOCK_KEY0 EFUSE_BLK0 32 1
|
||||
108 RD_DIS.BLOCK_KEY1 EFUSE_BLK0 33 1
|
||||
109 RD_DIS.BLOCK_KEY2 EFUSE_BLK0 34 1
|
||||
110 RD_DIS.BLOCK_KEY3 EFUSE_BLK0 35 1
|
||||
111 RD_DIS.BLOCK_KEY4 EFUSE_BLK0 36 1
|
||||
112 RD_DIS.BLOCK_KEY5 EFUSE_BLK0 37 1
|
||||
113 RD_DIS.BLOCK_SYS_DATA2 EFUSE_BLK0 38 1
|
||||
114 DIS_ICACHE EFUSE_BLK0 40 1
|
||||
115 DIS_DCACHE EFUSE_BLK0 41 1
|
||||
116 DIS_DOWNLOAD_ICACHE EFUSE_BLK0 42 1
|
||||
117 DIS_DOWNLOAD_DCACHE EFUSE_BLK0 43 1
|
||||
118 DIS_FORCE_DOWNLOAD EFUSE_BLK0 44 1
|
||||
119 DIS_USB_OTG EFUSE_BLK0 45 1
|
||||
120 DIS_TWAI EFUSE_BLK0 46 1
|
||||
121 DIS_APP_CPU EFUSE_BLK0 47 1
|
||||
122 SOFT_DIS_JTAG EFUSE_BLK0 48 3
|
||||
123 DIS_PAD_JTAG EFUSE_BLK0 51 1
|
||||
124 DIS_DOWNLOAD_MANUAL_ENCRYPT EFUSE_BLK0 52 1
|
||||
125 USB_EXCHG_PINS EFUSE_BLK0 57 1
|
||||
126 USB_EXT_PHY_ENABLE EFUSE_BLK0 58 1
|
||||
127 VDD_SPI_XPD EFUSE_BLK0 68 1
|
||||
128 VDD_SPI_TIEH EFUSE_BLK0 69 1
|
||||
129 VDD_SPI_FORCE EFUSE_BLK0 70 1
|
||||
130 WDT_DELAY_SEL EFUSE_BLK0 80 2
|
||||
131 SPI_BOOT_CRYPT_CNT EFUSE_BLK0 82 3
|
||||
132 SECURE_BOOT_KEY_REVOKE0 EFUSE_BLK0 85 1
|
||||
133 SECURE_BOOT_KEY_REVOKE1 EFUSE_BLK0 86 1
|
||||
134 SECURE_BOOT_KEY_REVOKE2 EFUSE_BLK0 87 1
|
||||
135 KEY_PURPOSE_0 EFUSE_BLK0 88 4
|
||||
136 KEY_PURPOSE_1 EFUSE_BLK0 92 4
|
||||
137 KEY_PURPOSE_2 EFUSE_BLK0 96 4
|
||||
138 KEY_PURPOSE_3 EFUSE_BLK0 100 4
|
||||
139 KEY_PURPOSE_4 EFUSE_BLK0 104 4
|
||||
140 KEY_PURPOSE_5 EFUSE_BLK0 108 4
|
||||
141 SECURE_BOOT_EN EFUSE_BLK0 116 1
|
||||
142 SECURE_BOOT_AGGRESSIVE_REVOKE EFUSE_BLK0 117 1
|
||||
143 DIS_USB_JTAG EFUSE_BLK0 118 1
|
||||
144 DIS_USB_SERIAL_JTAG EFUSE_BLK0 119 1
|
||||
145 STRAP_JTAG_SEL EFUSE_BLK0 120 1
|
||||
146 USB_PHY_SEL EFUSE_BLK0 121 1
|
||||
147 FLASH_TPUW EFUSE_BLK0 124 4
|
||||
148 DIS_DOWNLOAD_MODE EFUSE_BLK0 128 1
|
||||
149 DIS_DIRECT_BOOT EFUSE_BLK0 129 1
|
||||
150 DIS_USB_SERIAL_JTAG_ROM_PRINT EFUSE_BLK0 130 1
|
||||
151 FLASH_ECC_MODE EFUSE_BLK0 131 1
|
||||
152 DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE EFUSE_BLK0 132 1
|
||||
153 ENABLE_SECURITY_DOWNLOAD EFUSE_BLK0 133 1
|
||||
154 UART_PRINT_CONTROL EFUSE_BLK0 134 2
|
||||
155 PIN_POWER_SELECTION EFUSE_BLK0 136 1
|
||||
156 FLASH_TYPE EFUSE_BLK0 137 1
|
||||
157 FLASH_PAGE_SIZE EFUSE_BLK0 138 2
|
||||
158 FLASH_ECC_EN EFUSE_BLK0 140 1
|
||||
159 FORCE_SEND_RESUME EFUSE_BLK0 141 1
|
||||
160 SECURE_VERSION EFUSE_BLK0 142 16
|
||||
161 DIS_USB_OTG_DOWNLOAD_MODE EFUSE_BLK0 159 1
|
||||
162 DISABLE_WAFER_VERSION_MAJOR EFUSE_BLK0 160 1
|
||||
163 DISABLE_BLK_VERSION_MAJOR EFUSE_BLK0 161 1
|
||||
164 MAC EFUSE_BLK1 0 8
|
||||
165 MAC EFUSE_BLK1 8 8
|
||||
166 MAC EFUSE_BLK1 16 8
|
||||
167 MAC EFUSE_BLK1 24 8
|
||||
168 MAC EFUSE_BLK1 32 8
|
||||
169 MAC EFUSE_BLK1 40 8
|
||||
170 SPI_PAD_CONFIG_CLK EFUSE_BLK1 48 6
|
||||
171 SPI_PAD_CONFIG_Q EFUSE_BLK1 54 6
|
||||
172 SPI_PAD_CONFIG_D EFUSE_BLK1 60 6
|
||||
173 SPI_PAD_CONFIG_CS EFUSE_BLK1 66 6
|
||||
174 SPI_PAD_CONFIG_HD EFUSE_BLK1 72 6
|
||||
175 SPI_PAD_CONFIG_WP EFUSE_BLK1 78 6
|
||||
176 SPI_PAD_CONFIG_DQS EFUSE_BLK1 84 6
|
||||
177 SPI_PAD_CONFIG_D4 EFUSE_BLK1 90 6
|
||||
178 SPI_PAD_CONFIG_D5 EFUSE_BLK1 96 6
|
||||
179 SPI_PAD_CONFIG_D6 EFUSE_BLK1 102 6
|
||||
180 SPI_PAD_CONFIG_D7 EFUSE_BLK1 108 6
|
||||
181 WAFER_VERSION_MINOR_LO EFUSE_BLK1 114 3
|
||||
182 PKG_VERSION EFUSE_BLK1 117 3
|
||||
183 BLK_VERSION_MINOR EFUSE_BLK1 120 3
|
||||
184 K_RTC_LDO EFUSE_BLK1 141 7
|
||||
185 K_DIG_LDO EFUSE_BLK1 148 7
|
||||
186 V_RTC_DBIAS20 EFUSE_BLK1 155 8
|
||||
187 V_DIG_DBIAS20 EFUSE_BLK1 163 8
|
||||
188 DIG_DBIAS_HVT EFUSE_BLK1 171 5
|
||||
189 WAFER_VERSION_MINOR_HI EFUSE_BLK1 183 1
|
||||
190 WAFER_VERSION_MAJOR EFUSE_BLK1 184 2
|
||||
191 ADC2_CAL_VOL_ATTEN3 EFUSE_BLK1 186 6
|
||||
192 SYS_DATA_PART2 EFUSE_BLK10 0 256
|
||||
193 OPTIONAL_UNIQUE_ID EFUSE_BLK2 0 128
|
||||
194 BLK_VERSION_MAJOR EFUSE_BLK2 128 2
|
||||
195 TEMP_CALIB EFUSE_BLK2 132 9
|
||||
196 OCODE EFUSE_BLK2 141 8
|
||||
197 ADC1_INIT_CODE_ATTEN0 EFUSE_BLK2 149 8
|
||||
198 ADC1_INIT_CODE_ATTEN1 EFUSE_BLK2 157 6
|
||||
199 ADC1_INIT_CODE_ATTEN2 EFUSE_BLK2 163 6
|
||||
200 ADC1_INIT_CODE_ATTEN3 EFUSE_BLK2 169 6
|
||||
201 ADC2_INIT_CODE_ATTEN0 EFUSE_BLK2 175 8
|
||||
202 ADC2_INIT_CODE_ATTEN1 EFUSE_BLK2 183 6
|
||||
203 ADC2_INIT_CODE_ATTEN2 EFUSE_BLK2 189 6
|
||||
204 ADC2_INIT_CODE_ATTEN3 EFUSE_BLK2 195 6
|
||||
205 ADC1_CAL_VOL_ATTEN0 EFUSE_BLK2 201 8
|
||||
206 ADC1_CAL_VOL_ATTEN1 EFUSE_BLK2 209 8
|
||||
207 ADC1_CAL_VOL_ATTEN2 EFUSE_BLK2 217 8
|
||||
208 ADC1_CAL_VOL_ATTEN3 EFUSE_BLK2 225 8
|
||||
209 ADC2_CAL_VOL_ATTEN0 EFUSE_BLK2 233 8
|
||||
210 ADC2_CAL_VOL_ATTEN1 EFUSE_BLK2 241 7
|
||||
211 ADC2_CAL_VOL_ATTEN2 EFUSE_BLK2 248 7
|
||||
212 USER_DATA EFUSE_BLK3 0 256
|
||||
213 USER_DATA.MAC_CUSTOM EFUSE_BLK3 200 48
|
||||
214 KEY0 EFUSE_BLK4 0 256
|
||||
215 KEY1 EFUSE_BLK5 0 256
|
||||
216 KEY2 EFUSE_BLK6 0 256
|
||||
217 KEY3 EFUSE_BLK7 0 256
|
||||
218 KEY4 EFUSE_BLK8 0 256
|
||||
219 KEY5 EFUSE_BLK9 0 256
|
||||
1 WR_DIS EFUSE_BLK0 0 32
|
||||
2 WR_DIS.RD_DIS EFUSE_BLK0 0 1
|
||||
3 WR_DIS.DIS_ICACHE EFUSE_BLK0 2 1
|
||||
4 WR_DIS.DIS_DCACHE EFUSE_BLK0 2 1
|
||||
5 WR_DIS.DIS_DOWNLOAD_ICACHE EFUSE_BLK0 2 1
|
||||
6 WR_DIS.DIS_DOWNLOAD_DCACHE EFUSE_BLK0 2 1
|
||||
7 WR_DIS.DIS_FORCE_DOWNLOAD EFUSE_BLK0 2 1
|
||||
8 WR_DIS.DIS_USB_OTG EFUSE_BLK0 2 1
|
||||
9 WR_DIS.DIS_TWAI EFUSE_BLK0 2 1
|
||||
10 WR_DIS.DIS_APP_CPU EFUSE_BLK0 2 1
|
||||
11 WR_DIS.DIS_PAD_JTAG EFUSE_BLK0 2 1
|
||||
12 WR_DIS.DIS_DOWNLOAD_MANUAL_ENCRYPT EFUSE_BLK0 2 1
|
||||
13 WR_DIS.DIS_USB_JTAG EFUSE_BLK0 2 1
|
||||
14 WR_DIS.DIS_USB_SERIAL_JTAG EFUSE_BLK0 2 1
|
||||
15 WR_DIS.STRAP_JTAG_SEL EFUSE_BLK0 2 1
|
||||
16 WR_DIS.USB_PHY_SEL EFUSE_BLK0 2 1
|
||||
17 WR_DIS.VDD_SPI_XPD EFUSE_BLK0 3 1
|
||||
18 WR_DIS.VDD_SPI_TIEH EFUSE_BLK0 3 1
|
||||
19 WR_DIS.VDD_SPI_FORCE EFUSE_BLK0 3 1
|
||||
20 WR_DIS.WDT_DELAY_SEL EFUSE_BLK0 3 1
|
||||
21 WR_DIS.SPI_BOOT_CRYPT_CNT EFUSE_BLK0 4 1
|
||||
22 WR_DIS.SECURE_BOOT_KEY_REVOKE0 EFUSE_BLK0 5 1
|
||||
23 WR_DIS.SECURE_BOOT_KEY_REVOKE1 EFUSE_BLK0 6 1
|
||||
24 WR_DIS.SECURE_BOOT_KEY_REVOKE2 EFUSE_BLK0 7 1
|
||||
25 WR_DIS.KEY_PURPOSE_0 EFUSE_BLK0 8 1
|
||||
26 WR_DIS.KEY_PURPOSE_1 EFUSE_BLK0 9 1
|
||||
27 WR_DIS.KEY_PURPOSE_2 EFUSE_BLK0 10 1
|
||||
28 WR_DIS.KEY_PURPOSE_3 EFUSE_BLK0 11 1
|
||||
29 WR_DIS.KEY_PURPOSE_4 EFUSE_BLK0 12 1
|
||||
30 WR_DIS.KEY_PURPOSE_5 EFUSE_BLK0 13 1
|
||||
31 WR_DIS.SECURE_BOOT_EN EFUSE_BLK0 15 1
|
||||
32 WR_DIS.SECURE_BOOT_AGGRESSIVE_REVOKE EFUSE_BLK0 16 1
|
||||
33 WR_DIS.FLASH_TPUW EFUSE_BLK0 18 1
|
||||
34 WR_DIS.DIS_DOWNLOAD_MODE EFUSE_BLK0 18 1
|
||||
35 WR_DIS.DIS_DIRECT_BOOT EFUSE_BLK0 18 1
|
||||
36 WR_DIS.DIS_USB_SERIAL_JTAG_ROM_PRINT EFUSE_BLK0 18 1
|
||||
37 WR_DIS.FLASH_ECC_MODE EFUSE_BLK0 18 1
|
||||
38 WR_DIS.DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE EFUSE_BLK0 18 1
|
||||
39 WR_DIS.ENABLE_SECURITY_DOWNLOAD EFUSE_BLK0 18 1
|
||||
40 WR_DIS.UART_PRINT_CONTROL EFUSE_BLK0 18 1
|
||||
41 WR_DIS.PIN_POWER_SELECTION EFUSE_BLK0 18 1
|
||||
42 WR_DIS.FLASH_TYPE EFUSE_BLK0 18 1
|
||||
43 WR_DIS.FLASH_PAGE_SIZE EFUSE_BLK0 18 1
|
||||
44 WR_DIS.FLASH_ECC_EN EFUSE_BLK0 18 1
|
||||
45 WR_DIS.FORCE_SEND_RESUME EFUSE_BLK0 18 1
|
||||
46 WR_DIS.SECURE_VERSION EFUSE_BLK0 18 1
|
||||
47 WR_DIS.DIS_USB_OTG_DOWNLOAD_MODE EFUSE_BLK0 19 1
|
||||
48 WR_DIS.DISABLE_WAFER_VERSION_MAJOR EFUSE_BLK0 19 1
|
||||
49 WR_DIS.DISABLE_BLK_VERSION_MAJOR EFUSE_BLK0 19 1
|
||||
50 WR_DIS.BLK1 EFUSE_BLK0 20 1
|
||||
51 WR_DIS.MAC EFUSE_BLK0 20 1
|
||||
52 WR_DIS.SPI_PAD_CONFIG_CLK EFUSE_BLK0 20 1
|
||||
53 WR_DIS.SPI_PAD_CONFIG_Q EFUSE_BLK0 20 1
|
||||
54 WR_DIS.SPI_PAD_CONFIG_D EFUSE_BLK0 20 1
|
||||
55 WR_DIS.SPI_PAD_CONFIG_CS EFUSE_BLK0 20 1
|
||||
56 WR_DIS.SPI_PAD_CONFIG_HD EFUSE_BLK0 20 1
|
||||
57 WR_DIS.SPI_PAD_CONFIG_WP EFUSE_BLK0 20 1
|
||||
58 WR_DIS.SPI_PAD_CONFIG_DQS EFUSE_BLK0 20 1
|
||||
59 WR_DIS.SPI_PAD_CONFIG_D4 EFUSE_BLK0 20 1
|
||||
60 WR_DIS.SPI_PAD_CONFIG_D5 EFUSE_BLK0 20 1
|
||||
61 WR_DIS.SPI_PAD_CONFIG_D6 EFUSE_BLK0 20 1
|
||||
62 WR_DIS.SPI_PAD_CONFIG_D7 EFUSE_BLK0 20 1
|
||||
63 WR_DIS.WAFER_VERSION_MINOR_LO EFUSE_BLK0 20 1
|
||||
64 WR_DIS.PKG_VERSION EFUSE_BLK0 20 1
|
||||
65 WR_DIS.BLK_VERSION_MINOR EFUSE_BLK0 20 1
|
||||
66 WR_DIS.K_RTC_LDO EFUSE_BLK0 20 1
|
||||
67 WR_DIS.K_DIG_LDO EFUSE_BLK0 20 1
|
||||
68 WR_DIS.V_RTC_DBIAS20 EFUSE_BLK0 20 1
|
||||
69 WR_DIS.V_DIG_DBIAS20 EFUSE_BLK0 20 1
|
||||
70 WR_DIS.DIG_DBIAS_HVT EFUSE_BLK0 20 1
|
||||
71 WR_DIS.WAFER_VERSION_MINOR_HI EFUSE_BLK0 20 1
|
||||
72 WR_DIS.WAFER_VERSION_MAJOR EFUSE_BLK0 20 1
|
||||
73 WR_DIS.ADC2_CAL_VOL_ATTEN3 EFUSE_BLK0 20 1
|
||||
74 WR_DIS.SYS_DATA_PART1 EFUSE_BLK0 21 1
|
||||
75 WR_DIS.OPTIONAL_UNIQUE_ID EFUSE_BLK0 21 1
|
||||
76 WR_DIS.BLK_VERSION_MAJOR EFUSE_BLK0 21 1
|
||||
77 WR_DIS.TEMP_CALIB EFUSE_BLK0 21 1
|
||||
78 WR_DIS.OCODE EFUSE_BLK0 21 1
|
||||
79 WR_DIS.ADC1_INIT_CODE_ATTEN0 EFUSE_BLK0 21 1
|
||||
80 WR_DIS.ADC1_INIT_CODE_ATTEN1 EFUSE_BLK0 21 1
|
||||
81 WR_DIS.ADC1_INIT_CODE_ATTEN2 EFUSE_BLK0 21 1
|
||||
82 WR_DIS.ADC1_INIT_CODE_ATTEN3 EFUSE_BLK0 21 1
|
||||
83 WR_DIS.ADC2_INIT_CODE_ATTEN0 EFUSE_BLK0 21 1
|
||||
84 WR_DIS.ADC2_INIT_CODE_ATTEN1 EFUSE_BLK0 21 1
|
||||
85 WR_DIS.ADC2_INIT_CODE_ATTEN2 EFUSE_BLK0 21 1
|
||||
86 WR_DIS.ADC2_INIT_CODE_ATTEN3 EFUSE_BLK0 21 1
|
||||
87 WR_DIS.ADC1_CAL_VOL_ATTEN0 EFUSE_BLK0 21 1
|
||||
88 WR_DIS.ADC1_CAL_VOL_ATTEN1 EFUSE_BLK0 21 1
|
||||
89 WR_DIS.ADC1_CAL_VOL_ATTEN2 EFUSE_BLK0 21 1
|
||||
90 WR_DIS.ADC1_CAL_VOL_ATTEN3 EFUSE_BLK0 21 1
|
||||
91 WR_DIS.ADC2_CAL_VOL_ATTEN0 EFUSE_BLK0 21 1
|
||||
92 WR_DIS.ADC2_CAL_VOL_ATTEN1 EFUSE_BLK0 21 1
|
||||
93 WR_DIS.ADC2_CAL_VOL_ATTEN2 EFUSE_BLK0 21 1
|
||||
94 WR_DIS.BLOCK_USR_DATA EFUSE_BLK0 22 1
|
||||
95 WR_DIS.CUSTOM_MAC EFUSE_BLK0 22 1
|
||||
96 WR_DIS.BLOCK_KEY0 EFUSE_BLK0 23 1
|
||||
97 WR_DIS.BLOCK_KEY1 EFUSE_BLK0 24 1
|
||||
98 WR_DIS.BLOCK_KEY2 EFUSE_BLK0 25 1
|
||||
99 WR_DIS.BLOCK_KEY3 EFUSE_BLK0 26 1
|
||||
100 WR_DIS.BLOCK_KEY4 EFUSE_BLK0 27 1
|
||||
101 WR_DIS.BLOCK_KEY5 EFUSE_BLK0 28 1
|
||||
102 WR_DIS.BLOCK_SYS_DATA2 EFUSE_BLK0 29 1
|
||||
103 WR_DIS.USB_EXCHG_PINS EFUSE_BLK0 30 1
|
||||
104 WR_DIS.USB_EXT_PHY_ENABLE EFUSE_BLK0 30 1
|
||||
105 WR_DIS.SOFT_DIS_JTAG EFUSE_BLK0 31 1
|
||||
106 RD_DIS EFUSE_BLK0 32 7
|
||||
107 RD_DIS.BLOCK_KEY0 EFUSE_BLK0 32 1
|
||||
108 RD_DIS.BLOCK_KEY1 EFUSE_BLK0 33 1
|
||||
109 RD_DIS.BLOCK_KEY2 EFUSE_BLK0 34 1
|
||||
110 RD_DIS.BLOCK_KEY3 EFUSE_BLK0 35 1
|
||||
111 RD_DIS.BLOCK_KEY4 EFUSE_BLK0 36 1
|
||||
112 RD_DIS.BLOCK_KEY5 EFUSE_BLK0 37 1
|
||||
113 RD_DIS.BLOCK_SYS_DATA2 EFUSE_BLK0 38 1
|
||||
114 DIS_ICACHE EFUSE_BLK0 40 1
|
||||
115 DIS_DCACHE EFUSE_BLK0 41 1
|
||||
116 DIS_DOWNLOAD_ICACHE EFUSE_BLK0 42 1
|
||||
117 DIS_DOWNLOAD_DCACHE EFUSE_BLK0 43 1
|
||||
118 DIS_FORCE_DOWNLOAD EFUSE_BLK0 44 1
|
||||
119 DIS_USB_OTG EFUSE_BLK0 45 1
|
||||
120 DIS_TWAI EFUSE_BLK0 46 1
|
||||
121 DIS_APP_CPU EFUSE_BLK0 47 1
|
||||
122 SOFT_DIS_JTAG EFUSE_BLK0 48 3
|
||||
123 DIS_PAD_JTAG EFUSE_BLK0 51 1
|
||||
124 DIS_DOWNLOAD_MANUAL_ENCRYPT EFUSE_BLK0 52 1
|
||||
125 USB_EXCHG_PINS EFUSE_BLK0 57 1
|
||||
126 USB_EXT_PHY_ENABLE EFUSE_BLK0 58 1
|
||||
127 VDD_SPI_XPD EFUSE_BLK0 68 1
|
||||
128 VDD_SPI_TIEH EFUSE_BLK0 69 1
|
||||
129 VDD_SPI_FORCE EFUSE_BLK0 70 1
|
||||
130 WDT_DELAY_SEL EFUSE_BLK0 80 2
|
||||
131 SPI_BOOT_CRYPT_CNT EFUSE_BLK0 82 3
|
||||
132 SECURE_BOOT_KEY_REVOKE0 EFUSE_BLK0 85 1
|
||||
133 SECURE_BOOT_KEY_REVOKE1 EFUSE_BLK0 86 1
|
||||
134 SECURE_BOOT_KEY_REVOKE2 EFUSE_BLK0 87 1
|
||||
135 KEY_PURPOSE_0 EFUSE_BLK0 88 4
|
||||
136 KEY_PURPOSE_1 EFUSE_BLK0 92 4
|
||||
137 KEY_PURPOSE_2 EFUSE_BLK0 96 4
|
||||
138 KEY_PURPOSE_3 EFUSE_BLK0 100 4
|
||||
139 KEY_PURPOSE_4 EFUSE_BLK0 104 4
|
||||
140 KEY_PURPOSE_5 EFUSE_BLK0 108 4
|
||||
141 SECURE_BOOT_EN EFUSE_BLK0 116 1
|
||||
142 SECURE_BOOT_AGGRESSIVE_REVOKE EFUSE_BLK0 117 1
|
||||
143 DIS_USB_JTAG EFUSE_BLK0 118 1
|
||||
144 DIS_USB_SERIAL_JTAG EFUSE_BLK0 119 1
|
||||
145 STRAP_JTAG_SEL EFUSE_BLK0 120 1
|
||||
146 USB_PHY_SEL EFUSE_BLK0 121 1
|
||||
147 FLASH_TPUW EFUSE_BLK0 124 4
|
||||
148 DIS_DOWNLOAD_MODE EFUSE_BLK0 128 1
|
||||
149 DIS_DIRECT_BOOT EFUSE_BLK0 129 1
|
||||
150 DIS_USB_SERIAL_JTAG_ROM_PRINT EFUSE_BLK0 130 1
|
||||
151 FLASH_ECC_MODE EFUSE_BLK0 131 1
|
||||
152 DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE EFUSE_BLK0 132 1
|
||||
153 ENABLE_SECURITY_DOWNLOAD EFUSE_BLK0 133 1
|
||||
154 UART_PRINT_CONTROL EFUSE_BLK0 134 2
|
||||
155 PIN_POWER_SELECTION EFUSE_BLK0 136 1
|
||||
156 FLASH_TYPE EFUSE_BLK0 137 1
|
||||
157 FLASH_PAGE_SIZE EFUSE_BLK0 138 2
|
||||
158 FLASH_ECC_EN EFUSE_BLK0 140 1
|
||||
159 FORCE_SEND_RESUME EFUSE_BLK0 141 1
|
||||
160 SECURE_VERSION EFUSE_BLK0 142 16
|
||||
161 DIS_USB_OTG_DOWNLOAD_MODE EFUSE_BLK0 159 1
|
||||
162 DISABLE_WAFER_VERSION_MAJOR EFUSE_BLK0 160 1
|
||||
163 DISABLE_BLK_VERSION_MAJOR EFUSE_BLK0 161 1
|
||||
164 MAC EFUSE_BLK1 0 8
|
||||
165 MAC EFUSE_BLK1 8 8
|
||||
166 MAC EFUSE_BLK1 16 8
|
||||
167 MAC EFUSE_BLK1 24 8
|
||||
168 MAC EFUSE_BLK1 32 8
|
||||
169 MAC EFUSE_BLK1 40 8
|
||||
170 SPI_PAD_CONFIG_CLK EFUSE_BLK1 48 6
|
||||
171 SPI_PAD_CONFIG_Q EFUSE_BLK1 54 6
|
||||
172 SPI_PAD_CONFIG_D EFUSE_BLK1 60 6
|
||||
173 SPI_PAD_CONFIG_CS EFUSE_BLK1 66 6
|
||||
174 SPI_PAD_CONFIG_HD EFUSE_BLK1 72 6
|
||||
175 SPI_PAD_CONFIG_WP EFUSE_BLK1 78 6
|
||||
176 SPI_PAD_CONFIG_DQS EFUSE_BLK1 84 6
|
||||
177 SPI_PAD_CONFIG_D4 EFUSE_BLK1 90 6
|
||||
178 SPI_PAD_CONFIG_D5 EFUSE_BLK1 96 6
|
||||
179 SPI_PAD_CONFIG_D6 EFUSE_BLK1 102 6
|
||||
180 SPI_PAD_CONFIG_D7 EFUSE_BLK1 108 6
|
||||
181 WAFER_VERSION_MINOR_LO EFUSE_BLK1 114 3
|
||||
182 PKG_VERSION EFUSE_BLK1 117 3
|
||||
183 BLK_VERSION_MINOR EFUSE_BLK1 120 3
|
||||
184 K_RTC_LDO EFUSE_BLK1 141 7
|
||||
185 K_DIG_LDO EFUSE_BLK1 148 7
|
||||
186 V_RTC_DBIAS20 EFUSE_BLK1 155 8
|
||||
187 V_DIG_DBIAS20 EFUSE_BLK1 163 8
|
||||
188 DIG_DBIAS_HVT EFUSE_BLK1 171 5
|
||||
189 WAFER_VERSION_MINOR_HI EFUSE_BLK1 183 1
|
||||
190 WAFER_VERSION_MAJOR EFUSE_BLK1 184 2
|
||||
191 ADC2_CAL_VOL_ATTEN3 EFUSE_BLK1 186 6
|
||||
192 SYS_DATA_PART2 EFUSE_BLK10 0 256
|
||||
193 OPTIONAL_UNIQUE_ID EFUSE_BLK2 0 128
|
||||
194 BLK_VERSION_MAJOR EFUSE_BLK2 128 2
|
||||
195 TEMP_CALIB EFUSE_BLK2 132 9
|
||||
196 OCODE EFUSE_BLK2 141 8
|
||||
197 ADC1_INIT_CODE_ATTEN0 EFUSE_BLK2 149 8
|
||||
198 ADC1_INIT_CODE_ATTEN1 EFUSE_BLK2 157 6
|
||||
199 ADC1_INIT_CODE_ATTEN2 EFUSE_BLK2 163 6
|
||||
200 ADC1_INIT_CODE_ATTEN3 EFUSE_BLK2 169 6
|
||||
201 ADC2_INIT_CODE_ATTEN0 EFUSE_BLK2 175 8
|
||||
202 ADC2_INIT_CODE_ATTEN1 EFUSE_BLK2 183 6
|
||||
203 ADC2_INIT_CODE_ATTEN2 EFUSE_BLK2 189 6
|
||||
204 ADC2_INIT_CODE_ATTEN3 EFUSE_BLK2 195 6
|
||||
205 ADC1_CAL_VOL_ATTEN0 EFUSE_BLK2 201 8
|
||||
206 ADC1_CAL_VOL_ATTEN1 EFUSE_BLK2 209 8
|
||||
207 ADC1_CAL_VOL_ATTEN2 EFUSE_BLK2 217 8
|
||||
208 ADC1_CAL_VOL_ATTEN3 EFUSE_BLK2 225 8
|
||||
209 ADC2_CAL_VOL_ATTEN0 EFUSE_BLK2 233 8
|
||||
210 ADC2_CAL_VOL_ATTEN1 EFUSE_BLK2 241 7
|
||||
211 ADC2_CAL_VOL_ATTEN2 EFUSE_BLK2 248 7
|
||||
212 USER_DATA EFUSE_BLK3 0 256
|
||||
213 USER_DATA.MAC_CUSTOM EFUSE_BLK3 200 48
|
||||
214 KEY0 EFUSE_BLK4 0 256
|
||||
215 KEY1 EFUSE_BLK5 0 256
|
||||
216 KEY2 EFUSE_BLK6 0 256
|
||||
217 KEY3 EFUSE_BLK7 0 256
|
||||
218 KEY4 EFUSE_BLK8 0 256
|
||||
219 KEY5 EFUSE_BLK9 0 256
|
||||
|
||||
Used bits in efuse table:
|
||||
EFUSE_BLK0
|
||||
[0 31] [0 0] [2 2] ... [22 30] [30 38] [32 38] [40 52] [57 58] [68 70] [80 111] [116 121] [124 157] [159 161]
|
||||
EFUSE_BLK1
|
||||
[0 122] [141 175] [183 191]
|
||||
EFUSE_BLK10
|
||||
[0 255]
|
||||
EFUSE_BLK2
|
||||
[0 129] [132 254]
|
||||
EFUSE_BLK3
|
||||
[0 255] [200 247]
|
||||
EFUSE_BLK4
|
||||
[0 255]
|
||||
EFUSE_BLK5
|
||||
[0 255]
|
||||
EFUSE_BLK6
|
||||
[0 255]
|
||||
EFUSE_BLK7
|
||||
[0 255]
|
||||
EFUSE_BLK8
|
||||
[0 255]
|
||||
EFUSE_BLK9
|
||||
[0 255]
|
||||
EFUSE_BLK0
|
||||
[0 31] [0 0] [2 2] ... [22 30] [30 38] [32 38] [40 52] [57 58] [68 70] [80 111] [116 121] [124 157] [159 161]
|
||||
EFUSE_BLK1
|
||||
[0 122] [141 175] [183 191]
|
||||
EFUSE_BLK10
|
||||
[0 255]
|
||||
EFUSE_BLK2
|
||||
[0 129] [132 254]
|
||||
EFUSE_BLK3
|
||||
[0 255] [200 247]
|
||||
EFUSE_BLK4
|
||||
[0 255]
|
||||
EFUSE_BLK5
|
||||
[0 255]
|
||||
EFUSE_BLK6
|
||||
[0 255]
|
||||
EFUSE_BLK7
|
||||
[0 255]
|
||||
EFUSE_BLK8
|
||||
[0 255]
|
||||
EFUSE_BLK9
|
||||
[0 255]
|
||||
Note: Not printed ranges are free for using. (bits in EFUSE_BLK0 are reserved for Espressif)
|
||||
|
||||
@@ -8,124 +8,124 @@
|
||||
Max number of bits in BLK 192
|
||||
Sorted efuse table:
|
||||
# field_name efuse_block bit_start bit_count
|
||||
1 WR_DIS EFUSE_BLK0 0 16
|
||||
2 WR_DIS.RD_DIS EFUSE_BLK0 0 1
|
||||
3 WR_DIS.WR_DIS EFUSE_BLK0 1 1
|
||||
4 WR_DIS.FLASH_CRYPT_CNT EFUSE_BLK0 2 1
|
||||
5 WR_DIS.UART_DOWNLOAD_DIS EFUSE_BLK0 2 1
|
||||
6 WR_DIS.MAC EFUSE_BLK0 3 1
|
||||
7 WR_DIS.MAC_CRC EFUSE_BLK0 3 1
|
||||
8 WR_DIS.DISABLE_APP_CPU EFUSE_BLK0 3 1
|
||||
9 WR_DIS.DISABLE_BT EFUSE_BLK0 3 1
|
||||
10 WR_DIS.DIS_CACHE EFUSE_BLK0 3 1
|
||||
11 WR_DIS.VOL_LEVEL_HP_INV EFUSE_BLK0 3 1
|
||||
12 WR_DIS.CLK8M_FREQ EFUSE_BLK0 4 1
|
||||
13 WR_DIS.ADC_VREF EFUSE_BLK0 4 1
|
||||
14 WR_DIS.XPD_SDIO_REG EFUSE_BLK0 5 1
|
||||
15 WR_DIS.XPD_SDIO_TIEH EFUSE_BLK0 5 1
|
||||
16 WR_DIS.XPD_SDIO_FORCE EFUSE_BLK0 5 1
|
||||
17 WR_DIS.SPI_PAD_CONFIG_CLK EFUSE_BLK0 6 1
|
||||
18 WR_DIS.SPI_PAD_CONFIG_Q EFUSE_BLK0 6 1
|
||||
19 WR_DIS.SPI_PAD_CONFIG_D EFUSE_BLK0 6 1
|
||||
20 WR_DIS.SPI_PAD_CONFIG_CS0 EFUSE_BLK0 6 1
|
||||
21 WR_DIS.BLOCK1 EFUSE_BLK0 7 1
|
||||
22 WR_DIS.BLOCK2 EFUSE_BLK0 8 1
|
||||
23 WR_DIS.BLOCK3 EFUSE_BLK0 9 1
|
||||
24 WR_DIS.CUSTOM_MAC_CRC EFUSE_BLK0 9 1
|
||||
25 WR_DIS.CUSTOM_MAC EFUSE_BLK0 9 1
|
||||
26 WR_DIS.ADC1_TP_LOW EFUSE_BLK0 9 1
|
||||
27 WR_DIS.ADC1_TP_HIGH EFUSE_BLK0 9 1
|
||||
28 WR_DIS.ADC2_TP_LOW EFUSE_BLK0 9 1
|
||||
29 WR_DIS.ADC2_TP_HIGH EFUSE_BLK0 9 1
|
||||
30 WR_DIS.SECURE_VERSION EFUSE_BLK0 9 1
|
||||
31 WR_DIS.MAC_VERSION EFUSE_BLK0 9 1
|
||||
32 WR_DIS.BLK3_PART_RESERVE EFUSE_BLK0 10 1
|
||||
33 WR_DIS.FLASH_CRYPT_CONFIG EFUSE_BLK0 10 1
|
||||
34 WR_DIS.CODING_SCHEME EFUSE_BLK0 10 1
|
||||
35 WR_DIS.KEY_STATUS EFUSE_BLK0 10 1
|
||||
36 WR_DIS.ABS_DONE_0 EFUSE_BLK0 12 1
|
||||
37 WR_DIS.ABS_DONE_1 EFUSE_BLK0 13 1
|
||||
38 WR_DIS.JTAG_DISABLE EFUSE_BLK0 14 1
|
||||
39 WR_DIS.CONSOLE_DEBUG_DISABLE EFUSE_BLK0 15 1
|
||||
40 WR_DIS.DISABLE_DL_ENCRYPT EFUSE_BLK0 15 1
|
||||
41 WR_DIS.DISABLE_DL_DECRYPT EFUSE_BLK0 15 1
|
||||
42 WR_DIS.DISABLE_DL_CACHE EFUSE_BLK0 15 1
|
||||
43 RD_DIS EFUSE_BLK0 16 4
|
||||
44 RD_DIS.BLOCK1 EFUSE_BLK0 16 1
|
||||
45 RD_DIS.BLOCK2 EFUSE_BLK0 17 1
|
||||
46 RD_DIS.BLOCK3 EFUSE_BLK0 18 1
|
||||
47 RD_DIS.CUSTOM_MAC_CRC EFUSE_BLK0 18 1
|
||||
48 RD_DIS.CUSTOM_MAC EFUSE_BLK0 18 1
|
||||
49 RD_DIS.ADC1_TP_LOW EFUSE_BLK0 18 1
|
||||
50 RD_DIS.ADC1_TP_HIGH EFUSE_BLK0 18 1
|
||||
51 RD_DIS.ADC2_TP_LOW EFUSE_BLK0 18 1
|
||||
52 RD_DIS.ADC2_TP_HIGH EFUSE_BLK0 18 1
|
||||
53 RD_DIS.SECURE_VERSION EFUSE_BLK0 18 1
|
||||
54 RD_DIS.MAC_VERSION EFUSE_BLK0 18 1
|
||||
55 RD_DIS.BLK3_PART_RESERVE EFUSE_BLK0 19 1
|
||||
56 RD_DIS.FLASH_CRYPT_CONFIG EFUSE_BLK0 19 1
|
||||
57 RD_DIS.CODING_SCHEME EFUSE_BLK0 19 1
|
||||
58 RD_DIS.KEY_STATUS EFUSE_BLK0 19 1
|
||||
59 FLASH_CRYPT_CNT EFUSE_BLK0 20 7
|
||||
60 UART_DOWNLOAD_DIS EFUSE_BLK0 27 1
|
||||
61 MAC EFUSE_BLK0 32 8
|
||||
62 MAC EFUSE_BLK0 40 8
|
||||
63 MAC EFUSE_BLK0 48 8
|
||||
64 MAC EFUSE_BLK0 56 8
|
||||
65 MAC EFUSE_BLK0 64 8
|
||||
66 MAC EFUSE_BLK0 72 8
|
||||
67 MAC_CRC EFUSE_BLK0 80 8
|
||||
68 DISABLE_APP_CPU EFUSE_BLK0 96 1
|
||||
69 DISABLE_BT EFUSE_BLK0 97 1
|
||||
70 CHIP_PACKAGE_4BIT EFUSE_BLK0 98 1
|
||||
71 DIS_CACHE EFUSE_BLK0 99 1
|
||||
72 SPI_PAD_CONFIG_HD EFUSE_BLK0 100 5
|
||||
73 CHIP_PACKAGE EFUSE_BLK0 105 3
|
||||
74 CHIP_CPU_FREQ_LOW EFUSE_BLK0 108 1
|
||||
75 CHIP_CPU_FREQ_RATED EFUSE_BLK0 109 1
|
||||
76 BLK3_PART_RESERVE EFUSE_BLK0 110 1
|
||||
77 CHIP_VER_REV1 EFUSE_BLK0 111 1
|
||||
78 CLK8M_FREQ EFUSE_BLK0 128 8
|
||||
79 ADC_VREF EFUSE_BLK0 136 5
|
||||
80 XPD_SDIO_REG EFUSE_BLK0 142 1
|
||||
81 XPD_SDIO_TIEH EFUSE_BLK0 143 1
|
||||
82 XPD_SDIO_FORCE EFUSE_BLK0 144 1
|
||||
83 SPI_PAD_CONFIG_CLK EFUSE_BLK0 160 5
|
||||
84 SPI_PAD_CONFIG_Q EFUSE_BLK0 165 5
|
||||
85 SPI_PAD_CONFIG_D EFUSE_BLK0 170 5
|
||||
86 SPI_PAD_CONFIG_CS0 EFUSE_BLK0 175 5
|
||||
87 CHIP_VER_REV2 EFUSE_BLK0 180 1
|
||||
88 VOL_LEVEL_HP_INV EFUSE_BLK0 182 2
|
||||
89 WAFER_VERSION_MINOR EFUSE_BLK0 184 2
|
||||
90 FLASH_CRYPT_CONFIG EFUSE_BLK0 188 4
|
||||
91 CODING_SCHEME EFUSE_BLK0 192 2
|
||||
92 CONSOLE_DEBUG_DISABLE EFUSE_BLK0 194 1
|
||||
93 DISABLE_SDIO_HOST EFUSE_BLK0 195 1
|
||||
94 ABS_DONE_0 EFUSE_BLK0 196 1
|
||||
95 ABS_DONE_1 EFUSE_BLK0 197 1
|
||||
96 JTAG_DISABLE EFUSE_BLK0 198 1
|
||||
97 DISABLE_DL_ENCRYPT EFUSE_BLK0 199 1
|
||||
98 DISABLE_DL_DECRYPT EFUSE_BLK0 200 1
|
||||
99 DISABLE_DL_CACHE EFUSE_BLK0 201 1
|
||||
100 KEY_STATUS EFUSE_BLK0 202 1
|
||||
101 BLOCK1 EFUSE_BLK1 0 192
|
||||
102 BLOCK2 EFUSE_BLK2 0 192
|
||||
103 CUSTOM_MAC_CRC EFUSE_BLK3 0 8
|
||||
104 MAC_CUSTOM EFUSE_BLK3 8 48
|
||||
105 ADC1_TP_LOW EFUSE_BLK3 96 7
|
||||
106 ADC1_TP_HIGH EFUSE_BLK3 103 9
|
||||
107 ADC2_TP_LOW EFUSE_BLK3 112 7
|
||||
108 ADC2_TP_HIGH EFUSE_BLK3 119 9
|
||||
109 SECURE_VERSION EFUSE_BLK3 128 32
|
||||
110 MAC_VERSION EFUSE_BLK3 184 8
|
||||
1 WR_DIS EFUSE_BLK0 0 16
|
||||
2 WR_DIS.RD_DIS EFUSE_BLK0 0 1
|
||||
3 WR_DIS.WR_DIS EFUSE_BLK0 1 1
|
||||
4 WR_DIS.FLASH_CRYPT_CNT EFUSE_BLK0 2 1
|
||||
5 WR_DIS.UART_DOWNLOAD_DIS EFUSE_BLK0 2 1
|
||||
6 WR_DIS.MAC EFUSE_BLK0 3 1
|
||||
7 WR_DIS.MAC_CRC EFUSE_BLK0 3 1
|
||||
8 WR_DIS.DISABLE_APP_CPU EFUSE_BLK0 3 1
|
||||
9 WR_DIS.DISABLE_BT EFUSE_BLK0 3 1
|
||||
10 WR_DIS.DIS_CACHE EFUSE_BLK0 3 1
|
||||
11 WR_DIS.VOL_LEVEL_HP_INV EFUSE_BLK0 3 1
|
||||
12 WR_DIS.CLK8M_FREQ EFUSE_BLK0 4 1
|
||||
13 WR_DIS.ADC_VREF EFUSE_BLK0 4 1
|
||||
14 WR_DIS.XPD_SDIO_REG EFUSE_BLK0 5 1
|
||||
15 WR_DIS.XPD_SDIO_TIEH EFUSE_BLK0 5 1
|
||||
16 WR_DIS.XPD_SDIO_FORCE EFUSE_BLK0 5 1
|
||||
17 WR_DIS.SPI_PAD_CONFIG_CLK EFUSE_BLK0 6 1
|
||||
18 WR_DIS.SPI_PAD_CONFIG_Q EFUSE_BLK0 6 1
|
||||
19 WR_DIS.SPI_PAD_CONFIG_D EFUSE_BLK0 6 1
|
||||
20 WR_DIS.SPI_PAD_CONFIG_CS0 EFUSE_BLK0 6 1
|
||||
21 WR_DIS.BLOCK1 EFUSE_BLK0 7 1
|
||||
22 WR_DIS.BLOCK2 EFUSE_BLK0 8 1
|
||||
23 WR_DIS.BLOCK3 EFUSE_BLK0 9 1
|
||||
24 WR_DIS.CUSTOM_MAC_CRC EFUSE_BLK0 9 1
|
||||
25 WR_DIS.CUSTOM_MAC EFUSE_BLK0 9 1
|
||||
26 WR_DIS.ADC1_TP_LOW EFUSE_BLK0 9 1
|
||||
27 WR_DIS.ADC1_TP_HIGH EFUSE_BLK0 9 1
|
||||
28 WR_DIS.ADC2_TP_LOW EFUSE_BLK0 9 1
|
||||
29 WR_DIS.ADC2_TP_HIGH EFUSE_BLK0 9 1
|
||||
30 WR_DIS.SECURE_VERSION EFUSE_BLK0 9 1
|
||||
31 WR_DIS.MAC_VERSION EFUSE_BLK0 9 1
|
||||
32 WR_DIS.BLK3_PART_RESERVE EFUSE_BLK0 10 1
|
||||
33 WR_DIS.FLASH_CRYPT_CONFIG EFUSE_BLK0 10 1
|
||||
34 WR_DIS.CODING_SCHEME EFUSE_BLK0 10 1
|
||||
35 WR_DIS.KEY_STATUS EFUSE_BLK0 10 1
|
||||
36 WR_DIS.ABS_DONE_0 EFUSE_BLK0 12 1
|
||||
37 WR_DIS.ABS_DONE_1 EFUSE_BLK0 13 1
|
||||
38 WR_DIS.JTAG_DISABLE EFUSE_BLK0 14 1
|
||||
39 WR_DIS.CONSOLE_DEBUG_DISABLE EFUSE_BLK0 15 1
|
||||
40 WR_DIS.DISABLE_DL_ENCRYPT EFUSE_BLK0 15 1
|
||||
41 WR_DIS.DISABLE_DL_DECRYPT EFUSE_BLK0 15 1
|
||||
42 WR_DIS.DISABLE_DL_CACHE EFUSE_BLK0 15 1
|
||||
43 RD_DIS EFUSE_BLK0 16 4
|
||||
44 RD_DIS.BLOCK1 EFUSE_BLK0 16 1
|
||||
45 RD_DIS.BLOCK2 EFUSE_BLK0 17 1
|
||||
46 RD_DIS.BLOCK3 EFUSE_BLK0 18 1
|
||||
47 RD_DIS.CUSTOM_MAC_CRC EFUSE_BLK0 18 1
|
||||
48 RD_DIS.CUSTOM_MAC EFUSE_BLK0 18 1
|
||||
49 RD_DIS.ADC1_TP_LOW EFUSE_BLK0 18 1
|
||||
50 RD_DIS.ADC1_TP_HIGH EFUSE_BLK0 18 1
|
||||
51 RD_DIS.ADC2_TP_LOW EFUSE_BLK0 18 1
|
||||
52 RD_DIS.ADC2_TP_HIGH EFUSE_BLK0 18 1
|
||||
53 RD_DIS.SECURE_VERSION EFUSE_BLK0 18 1
|
||||
54 RD_DIS.MAC_VERSION EFUSE_BLK0 18 1
|
||||
55 RD_DIS.BLK3_PART_RESERVE EFUSE_BLK0 19 1
|
||||
56 RD_DIS.FLASH_CRYPT_CONFIG EFUSE_BLK0 19 1
|
||||
57 RD_DIS.CODING_SCHEME EFUSE_BLK0 19 1
|
||||
58 RD_DIS.KEY_STATUS EFUSE_BLK0 19 1
|
||||
59 FLASH_CRYPT_CNT EFUSE_BLK0 20 7
|
||||
60 UART_DOWNLOAD_DIS EFUSE_BLK0 27 1
|
||||
61 MAC EFUSE_BLK0 32 8
|
||||
62 MAC EFUSE_BLK0 40 8
|
||||
63 MAC EFUSE_BLK0 48 8
|
||||
64 MAC EFUSE_BLK0 56 8
|
||||
65 MAC EFUSE_BLK0 64 8
|
||||
66 MAC EFUSE_BLK0 72 8
|
||||
67 MAC_CRC EFUSE_BLK0 80 8
|
||||
68 DISABLE_APP_CPU EFUSE_BLK0 96 1
|
||||
69 DISABLE_BT EFUSE_BLK0 97 1
|
||||
70 CHIP_PACKAGE_4BIT EFUSE_BLK0 98 1
|
||||
71 DIS_CACHE EFUSE_BLK0 99 1
|
||||
72 SPI_PAD_CONFIG_HD EFUSE_BLK0 100 5
|
||||
73 CHIP_PACKAGE EFUSE_BLK0 105 3
|
||||
74 CHIP_CPU_FREQ_LOW EFUSE_BLK0 108 1
|
||||
75 CHIP_CPU_FREQ_RATED EFUSE_BLK0 109 1
|
||||
76 BLK3_PART_RESERVE EFUSE_BLK0 110 1
|
||||
77 CHIP_VER_REV1 EFUSE_BLK0 111 1
|
||||
78 CLK8M_FREQ EFUSE_BLK0 128 8
|
||||
79 ADC_VREF EFUSE_BLK0 136 5
|
||||
80 XPD_SDIO_REG EFUSE_BLK0 142 1
|
||||
81 XPD_SDIO_TIEH EFUSE_BLK0 143 1
|
||||
82 XPD_SDIO_FORCE EFUSE_BLK0 144 1
|
||||
83 SPI_PAD_CONFIG_CLK EFUSE_BLK0 160 5
|
||||
84 SPI_PAD_CONFIG_Q EFUSE_BLK0 165 5
|
||||
85 SPI_PAD_CONFIG_D EFUSE_BLK0 170 5
|
||||
86 SPI_PAD_CONFIG_CS0 EFUSE_BLK0 175 5
|
||||
87 CHIP_VER_REV2 EFUSE_BLK0 180 1
|
||||
88 VOL_LEVEL_HP_INV EFUSE_BLK0 182 2
|
||||
89 WAFER_VERSION_MINOR EFUSE_BLK0 184 2
|
||||
90 FLASH_CRYPT_CONFIG EFUSE_BLK0 188 4
|
||||
91 CODING_SCHEME EFUSE_BLK0 192 2
|
||||
92 CONSOLE_DEBUG_DISABLE EFUSE_BLK0 194 1
|
||||
93 DISABLE_SDIO_HOST EFUSE_BLK0 195 1
|
||||
94 ABS_DONE_0 EFUSE_BLK0 196 1
|
||||
95 ABS_DONE_1 EFUSE_BLK0 197 1
|
||||
96 JTAG_DISABLE EFUSE_BLK0 198 1
|
||||
97 DISABLE_DL_ENCRYPT EFUSE_BLK0 199 1
|
||||
98 DISABLE_DL_DECRYPT EFUSE_BLK0 200 1
|
||||
99 DISABLE_DL_CACHE EFUSE_BLK0 201 1
|
||||
100 KEY_STATUS EFUSE_BLK0 202 1
|
||||
101 BLOCK1 EFUSE_BLK1 0 192
|
||||
102 BLOCK2 EFUSE_BLK2 0 192
|
||||
103 CUSTOM_MAC_CRC EFUSE_BLK3 0 8
|
||||
104 MAC_CUSTOM EFUSE_BLK3 8 48
|
||||
105 ADC1_TP_LOW EFUSE_BLK3 96 7
|
||||
106 ADC1_TP_HIGH EFUSE_BLK3 103 9
|
||||
107 ADC2_TP_LOW EFUSE_BLK3 112 7
|
||||
108 ADC2_TP_HIGH EFUSE_BLK3 119 9
|
||||
109 SECURE_VERSION EFUSE_BLK3 128 32
|
||||
110 MAC_VERSION EFUSE_BLK3 184 8
|
||||
|
||||
Used bits in efuse table:
|
||||
EFUSE_BLK0
|
||||
[0 15] [0 2] [2 3] ... [19 19] [19 27] [32 87] [96 111] [128 140] [142 144] [160 180] [182 185] [188 202]
|
||||
EFUSE_BLK1
|
||||
[0 191]
|
||||
EFUSE_BLK2
|
||||
[0 191]
|
||||
EFUSE_BLK3
|
||||
[0 55] [96 159] [184 191]
|
||||
EFUSE_BLK0
|
||||
[0 15] [0 2] [2 3] ... [19 19] [19 27] [32 87] [96 111] [128 140] [142 144] [160 180] [182 185] [188 202]
|
||||
EFUSE_BLK1
|
||||
[0 191]
|
||||
EFUSE_BLK2
|
||||
[0 191]
|
||||
EFUSE_BLK3
|
||||
[0 55] [96 159] [184 191]
|
||||
Note: Not printed ranges are free for using. (bits in EFUSE_BLK0 are reserved for Espressif)
|
||||
|
||||
Reference in New Issue
Block a user