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spi: fix speed test issues on esp32s2beta

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Also support performance value for different targets.
This commit is contained in:
michael
2019-10-20 13:21:23 +08:00
parent 3d1ec3f451
commit 2dd12ae5f8
3 changed files with 40 additions and 11 deletions
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components/idf_test/include/idf_performance.h
+9 -2
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@@ -6,10 +6,17 @@
#define IDF_PERFORMANCE_MAX_FREERTOS_SPINLOCK_CYCLES_PER_OP_PSRAM 300
#define IDF_PERFORMANCE_MAX_FREERTOS_SPINLOCK_CYCLES_PER_OP_UNICORE 130
#define IDF_PERFORMANCE_MAX_ESP_TIMER_GET_TIME_PER_CALL 1000
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING 30
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING_NO_DMA 27
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING_ESP32 30
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING_NO_DMA_ESP32 27
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING_ESP32S2 32
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING_NO_DMA_ESP32S2 30
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_POLLING 15
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_POLLING_NO_DMA 15
/* Due to code size & linker layout differences interacting with cache, VFS
microbenchmark currently runs slower with PSRAM enabled. */
#define IDF_PERFORMANCE_MAX_VFS_OPEN_WRITE_CLOSE_TIME 20000