refactor(interrupt):put the interrupts definitions in soc/interrupts.h
Now the soc interrupts definitions are scattered around in the esp-idf which are out of sync. Put interrupts definitions in soc/periph_defs.h (!ESP32) or soc/soc.h(ESP32) together in soc/interrupts.h.
This commit is contained in:
Chen Jichang
@@ -0,0 +1,161 @@
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/*
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* SPDX-FileCopyrightText: 2018-2023 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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#include <stdint.h>
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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//Interrupt hardware source table
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//This table is decided by hardware, don't touch this.
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typedef enum {
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ETS_LP_RTC_INTR_SOURCE = 0,
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ETS_LP_WDT_INTR_SOURCE,
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ETS_LP_TIMER_REG0_INTR_SOURCE,
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ETS_LP_TIMER_REG1_INTR_SOURCE,
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ETS_MB_HP_INTR_SOURCE,
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ETS_MB_LP_INTR_SOURCE,
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ETS_PMU_0_INTR_SOURCE,
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ETS_PMU_1_INTR_SOURCE,
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ETS_LP_ANAPERI_INTR_SOURCE,
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ETS_LP_ADC_INTR_SOURCE,
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ETS_LP_GPIO_INTR_SOURCE,
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ETS_LP_I2C_INTR_SOURCE,
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ETS_LP_I2S_INTR_SOURCE,
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ETS_LP_SPI_INTR_SOURCE,
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ETS_LP_TOUCH_INTR_SOURCE,
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ETS_LP_TSENS_INTR_SOURCE,
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ETS_LP_UART_INTR_SOURCE,
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ETS_LP_EFUSE_INTR_SOURCE,
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ETS_LP_SW_INTR_SOURCE,
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ETS_LP_SYSREG_INTR_SOURCE,
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ETS_LP_HUK_INTR_SOURCE,
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ETS_SYS_ICM_INTR_SOURCE,
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ETS_USB_DEVICE_INTR_SOURCE,
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ETS_SDIO_HOST_INTR_SOURCE,
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ETS_GDMA_INTR_SOURCE,
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ETS_SPI2_INTR_SOURCE,
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ETS_SPI3_INTR_SOURCE,
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ETS_I2S0_INTR_SOURCE,
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ETS_I2S1_INTR_SOURCE,
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ETS_I2S2_INTR_SOURCE,
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ETS_UHCI0_INTR_SOURCE,
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ETS_UART0_INTR_SOURCE,
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ETS_UART1_INTR_SOURCE,
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ETS_UART2_INTR_SOURCE,
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ETS_UART3_INTR_SOURCE,
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ETS_UART4_INTR_SOURCE,
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ETS_LCD_CAM_INTR_SOURCE,
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ETS_ADC_INTR_SOURCE,
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ETS_PWM0_INTR_SOURCE,
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ETS_PWM1_INTR_SOURCE,
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ETS_CAN0_INTR_SOURCE,
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ETS_CAN1_INTR_SOURCE,
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ETS_CAN2_INTR_SOURCE,
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ETS_RMT_INTR_SOURCE,
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ETS_I2C0_INTR_SOURCE,
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ETS_I2C1_INTR_SOURCE,
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ETS_TIMERGROUP0_T0_INTR_SOURCE,
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ETS_TIMERGROUP0_T1_INTR_SOURCE,
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ETS_TIMERGROUP0_WDT_INTR_SOURCE,
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ETS_TIMERGROUP1_T0_INTR_SOURCE,
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ETS_TIMERGROUP1_T1_INTR_SOURCE,
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ETS_TIMERGROUP1_WDT_INTR_SOURCE,
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ETS_LEDC_INTR_SOURCE,
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ETS_SYSTIMER_TARGET0_INTR_SOURCE,
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ETS_SYSTIMER_TARGET1_INTR_SOURCE,
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ETS_SYSTIMER_TARGET2_INTR_SOURCE,
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ETS_AHB_PDMA_IN_CH0_INTR_SOURCE,
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ETS_AHB_PDMA_IN_CH1_INTR_SOURCE,
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ETS_AHB_PDMA_IN_CH2_INTR_SOURCE,
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ETS_AHB_PDMA_OUT_CH0_INTR_SOURCE,
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ETS_AHB_PDMA_OUT_CH1_INTR_SOURCE,
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ETS_AHB_PDMA_OUT_CH2_INTR_SOURCE,
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ETS_AXI_PDMA_IN_CH0_INTR_SOURCE,
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ETS_AXI_PDMA_IN_CH1_INTR_SOURCE,
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ETS_AXI_PDMA_IN_CH2_INTR_SOURCE,
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ETS_AXI_PDMA_OUT_CH0_INTR_SOURCE,
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ETS_AXI_PDMA_OUT_CH1_INTR_SOURCE,
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ETS_AXI_PDMA_OUT_CH2_INTR_SOURCE,
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ETS_RSA_INTA_SOURCE,
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ETS_AES_INTR_SOURCE,
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ETS_SHA_INTR_SOURCE,
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ETS_ECC_INTR_SOURCE,
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ETS_ECDSA_INTR_SOURCE,
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ETS_KM_INTR_SOURCE,
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ETS_GPIO_INTR0_SOURCE,
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ETS_GPIO_INTR1_SOURCE,
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ETS_GPIO_INTR2_SOURCE,
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ETS_GPIO_INTR3_SOURCE,
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ETS_GPIO_PAD_COMP_INTR_SOURCE,
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ETS_CPU_INT_FROM_CPU0_INTR_SOURCE,
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ETS_CPU_INT_FROM_CPU1_INTR_SOURCE,
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ETS_CPU_INT_FROM_CPU2_INTR_SOURCE,
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ETS_CPU_INT_FROM_CPU3_INTR_SOURCE,
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ETS_CACHE_INTR_SOURCE,
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ETS_MSPI_INTR_SOURCE,
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ETS_CSI_BRIDGE_INTR_SOURCE,
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ETS_DSI_BRIDGE_INTR_SOURCE,
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ETS_CSI_INTR_SOURCE,
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ETS_DSI_INTR_SOURCE,
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ETS_GMII_PHY_INTR_SOURCE,
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ETS_LPI_INTR_SOURCE,
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ETS_PMT_INTR_SOURCE,
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ETS_SBD_INTR_SOURCE,
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ETS_USB_OTG_INTR_SOURCE,
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ETS_USB_OTG_ENDP_MULTI_PROC_INTR_SOURCE,
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ETS_JPEG_INTR_SOURCE,
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ETS_PPA_INTR_SOURCE,
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ETS_CORE0_TRACE_INTR_SOURCE,
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ETS_CORE1_TRACE_INTR_SOURCE,
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ETS_HP_CORE_CTRL_INTR_SOURCE,
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ETS_ISP_INTR_SOURCE,
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ETS_I3C_MST_INTR_SOURCE,
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ETS_I3C_SLV_INTR_SOURCE,
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ETS_USB_OTG11_CH0_INTR_SOURCE,
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ETS_DMA2D_IN_CH0_INTR_SOURCE,
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ETS_DMA2D_IN_CH1_INTR_SOURCE,
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ETS_DMA2D_OUT_CH0_INTR_SOURCE,
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ETS_DMA2D_OUT_CH1_INTR_SOURCE,
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ETS_DMA2D_OUT_CH2_INTR_SOURCE,
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ETS_PSRAM_MSPI_INTR_SOURCE,
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ETS_HP_SYSREG_INTR_SOURCE,
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ETS_PCNT_INTR_SOURCE,
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ETS_HP_PAU_INTR_SOURCE,
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ETS_HP_PARLIO_RX_INTR_SOURCE,
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ETS_HP_PARLIO_TX_INTR_SOURCE,
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ETS_H264_DMA2D_OUT_CH0_INTR_SOURCE,
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ETS_H264_DMA2D_OUT_CH1_INTR_SOURCE,
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ETS_H264_DMA2D_OUT_CH2_INTR_SOURCE,
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ETS_H264_DMA2D_OUT_CH3_INTR_SOURCE,
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ETS_H264_DMA2D_OUT_CH4_INTR_SOURCE,
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ETS_H264_DMA2D_IN_CH0_INTR_SOURCE,
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ETS_H264_DMA2D_IN_CH1_INTR_SOURCE,
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ETS_H264_DMA2D_IN_CH2_INTR_SOURCE,
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ETS_H264_DMA2D_IN_CH3_INTR_SOURCE,
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ETS_H264_DMA2D_IN_CH4_INTR_SOURCE,
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ETS_H264_DMA2D_IN_CH5_INTR_SOURCE,
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ETS_H264_REG_INTR_SOURCE,
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ETS_ASSIST_DEBUG_INTR_SOURCE,
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ETS_MAX_INTR_SOURCE, /**< number of interrupt sources */
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} periph_interrput_t;
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extern const char *const esp_isr_names[ETS_MAX_INTR_SOURCE];
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#ifdef __cplusplus
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}
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#endif
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@@ -6,6 +6,8 @@
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#pragma once
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#include "soc/interrupts.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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@@ -78,146 +80,6 @@ typedef enum {
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LP_PERIPH_MODULE_MAX,
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} lp_periph_module_t;
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typedef enum {
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ETS_LP_RTC_INTR_SOURCE = 0,
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ETS_LP_WDT_INTR_SOURCE,
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ETS_LP_TIMER_REG0_INTR_SOURCE,
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ETS_LP_TIMER_REG1_INTR_SOURCE,
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ETS_MB_HP_INTR_SOURCE,
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ETS_MB_LP_INTR_SOURCE,
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ETS_PMU_0_INTR_SOURCE,
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ETS_PMU_1_INTR_SOURCE,
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ETS_LP_ANAPERI_INTR_SOURCE,
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ETS_LP_ADC_INTR_SOURCE,
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ETS_LP_GPIO_INTR_SOURCE,
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ETS_LP_I2C_INTR_SOURCE,
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ETS_LP_I2S_INTR_SOURCE,
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ETS_LP_SPI_INTR_SOURCE,
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ETS_LP_TOUCH_INTR_SOURCE,
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ETS_LP_TSENS_INTR_SOURCE,
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ETS_LP_UART_INTR_SOURCE,
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ETS_LP_EFUSE_INTR_SOURCE,
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ETS_LP_SW_INTR_SOURCE,
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ETS_LP_SYSREG_INTR_SOURCE,
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ETS_LP_HUK_INTR_SOURCE,
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ETS_SYS_ICM_INTR_SOURCE,
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ETS_USB_DEVICE_INTR_SOURCE,
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ETS_SDIO_HOST_INTR_SOURCE,
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ETS_GDMA_INTR_SOURCE,
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ETS_SPI2_INTR_SOURCE,
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ETS_SPI3_INTR_SOURCE,
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ETS_I2S0_INTR_SOURCE,
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ETS_I2S1_INTR_SOURCE,
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ETS_I2S2_INTR_SOURCE,
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ETS_UHCI0_INTR_SOURCE,
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ETS_UART0_INTR_SOURCE,
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ETS_UART1_INTR_SOURCE,
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ETS_UART2_INTR_SOURCE,
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ETS_UART3_INTR_SOURCE,
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ETS_UART4_INTR_SOURCE,
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ETS_LCD_CAM_INTR_SOURCE,
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ETS_ADC_INTR_SOURCE,
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ETS_PWM0_INTR_SOURCE,
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ETS_PWM1_INTR_SOURCE,
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ETS_CAN0_INTR_SOURCE,
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ETS_CAN1_INTR_SOURCE,
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ETS_CAN2_INTR_SOURCE,
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ETS_RMT_INTR_SOURCE,
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ETS_I2C0_INTR_SOURCE,
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ETS_I2C1_INTR_SOURCE,
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ETS_TIMERGROUP0_T0_INTR_SOURCE,
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ETS_TIMERGROUP0_T1_INTR_SOURCE,
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ETS_TIMERGROUP0_WDT_INTR_SOURCE,
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ETS_TIMERGROUP1_T0_INTR_SOURCE,
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ETS_TIMERGROUP1_T1_INTR_SOURCE,
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ETS_TIMERGROUP1_WDT_INTR_SOURCE,
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ETS_LEDC_INTR_SOURCE,
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ETS_SYSTIMER_TARGET0_INTR_SOURCE,
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ETS_SYSTIMER_TARGET1_INTR_SOURCE,
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ETS_SYSTIMER_TARGET2_INTR_SOURCE,
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ETS_AHB_PDMA_IN_CH0_INTR_SOURCE,
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ETS_AHB_PDMA_IN_CH1_INTR_SOURCE,
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ETS_AHB_PDMA_IN_CH2_INTR_SOURCE,
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ETS_AHB_PDMA_OUT_CH0_INTR_SOURCE,
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ETS_AHB_PDMA_OUT_CH1_INTR_SOURCE,
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ETS_AHB_PDMA_OUT_CH2_INTR_SOURCE,
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ETS_AXI_PDMA_IN_CH0_INTR_SOURCE,
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ETS_AXI_PDMA_IN_CH1_INTR_SOURCE,
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ETS_AXI_PDMA_IN_CH2_INTR_SOURCE,
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ETS_AXI_PDMA_OUT_CH0_INTR_SOURCE,
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ETS_AXI_PDMA_OUT_CH1_INTR_SOURCE,
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ETS_AXI_PDMA_OUT_CH2_INTR_SOURCE,
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ETS_RSA_INTA_SOURCE,
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ETS_AES_INTR_SOURCE,
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ETS_SHA_INTR_SOURCE,
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ETS_ECC_INTR_SOURCE,
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ETS_ECDSA_INTR_SOURCE,
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ETS_KM_INTR_SOURCE,
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ETS_GPIO_INTR0_SOURCE,
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ETS_GPIO_INTR1_SOURCE,
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ETS_GPIO_INTR2_SOURCE,
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ETS_GPIO_INTR3_SOURCE,
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ETS_GPIO_PAD_COMP_INTR_SOURCE,
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ETS_CPU_INT_FROM_CPU0_INTR_SOURCE,
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ETS_CPU_INT_FROM_CPU1_INTR_SOURCE,
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ETS_CPU_INT_FROM_CPU2_INTR_SOURCE,
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ETS_CPU_INT_FROM_CPU3_INTR_SOURCE,
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ETS_CACHE_INTR_SOURCE,
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ETS_MSPI_INTR_SOURCE,
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ETS_CSI_BRIDGE_INTR_SOURCE,
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ETS_DSI_BRIDGE_INTR_SOURCE,
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ETS_CSI_INTR_SOURCE,
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ETS_DSI_INTR_SOURCE,
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ETS_GMII_PHY_INTR_SOURCE,
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ETS_LPI_INTR_SOURCE,
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ETS_PMT_INTR_SOURCE,
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ETS_SBD_INTR_SOURCE,
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ETS_USB_OTG_INTR_SOURCE,
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ETS_USB_OTG_ENDP_MULTI_PROC_INTR_SOURCE,
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ETS_JPEG_INTR_SOURCE,
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ETS_PPA_INTR_SOURCE,
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ETS_CORE0_TRACE_INTR_SOURCE,
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ETS_CORE1_TRACE_INTR_SOURCE,
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ETS_HP_CORE_CTRL_INTR_SOURCE,
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ETS_ISP_INTR_SOURCE,
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ETS_I3C_MST_INTR_SOURCE,
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ETS_I3C_SLV_INTR_SOURCE,
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ETS_USB_OTG11_CH0_INTR_SOURCE,
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ETS_DMA2D_IN_CH0_INTR_SOURCE,
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ETS_DMA2D_IN_CH1_INTR_SOURCE,
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ETS_DMA2D_OUT_CH0_INTR_SOURCE,
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ETS_DMA2D_OUT_CH1_INTR_SOURCE,
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ETS_DMA2D_OUT_CH2_INTR_SOURCE,
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ETS_PSRAM_MSPI_INTR_SOURCE,
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ETS_HP_SYSREG_INTR_SOURCE,
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ETS_PCNT_INTR_SOURCE,
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ETS_HP_PAU_INTR_SOURCE,
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ETS_HP_PARLIO_RX_INTR_SOURCE,
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ETS_HP_PARLIO_TX_INTR_SOURCE,
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ETS_H264_DMA2D_OUT_CH0_INTR_SOURCE,
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ETS_H264_DMA2D_OUT_CH1_INTR_SOURCE,
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ETS_H264_DMA2D_OUT_CH2_INTR_SOURCE,
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ETS_H264_DMA2D_OUT_CH3_INTR_SOURCE,
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ETS_H264_DMA2D_OUT_CH4_INTR_SOURCE,
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ETS_H264_DMA2D_IN_CH0_INTR_SOURCE,
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ETS_H264_DMA2D_IN_CH1_INTR_SOURCE,
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ETS_H264_DMA2D_IN_CH2_INTR_SOURCE,
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ETS_H264_DMA2D_IN_CH3_INTR_SOURCE,
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ETS_H264_DMA2D_IN_CH4_INTR_SOURCE,
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ETS_H264_DMA2D_IN_CH5_INTR_SOURCE,
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ETS_H264_REG_INTR_SOURCE,
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ETS_ASSIST_DEBUG_INTR_SOURCE,
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ETS_MAX_INTR_SOURCE, /**< number of interrupt sources */
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} periph_interrput_t;
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#ifdef __cplusplus
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}
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#endif
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