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refactor(regi2c): add LL function to control analog i2c master clock

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This commit is contained in:
Song Ruo Jing
2024-07-08 22:06:12 +08:00
parent a90c9101ff
commit 3aa27ae960
27 changed files with 242 additions and 189 deletions
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components/bootloader_support/src/esp32c5/bootloader_esp32c5.c
+4 -6
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@@ -41,8 +41,7 @@
#include "soc/lp_wdt_reg.h"
#include "hal/efuse_hal.h"
#include "hal/lpwdt_ll.h"
#include "modem/modem_lpcon_reg.h"
#include "modem/modem_syscon_reg.h"
#include "hal/regi2c_ctrl_ll.h"
static const char *TAG = "boot.esp32c5";
@@ -85,10 +84,9 @@ static void bootloader_super_wdt_auto_feed(void)
static inline void bootloader_hardware_init(void)
{
/* Enable analog i2c master clock */
SET_PERI_REG_MASK(MODEM_LPCON_CLK_CONF_REG, MODEM_LPCON_CLK_I2C_MST_EN);
SET_PERI_REG_MASK(MODEM_LPCON_CLK_CONF_FORCE_ON_REG, MODEM_LPCON_CLK_I2C_MST_FO); // TODO: IDF-8667 Remove this?
SET_PERI_REG_MASK(MODEM_SYSCON_CLK_CONF_REG, MODEM_SYSCON_CLK_I2C_MST_SEL_160M);
regi2c_ctrl_ll_master_enable_clock(true);
regi2c_ctrl_ll_master_force_enable_clock(true); // TODO: IDF-8667 Remove this?
regi2c_ctrl_ll_master_configure_clock();
}
static inline void bootloader_ana_reset_config(void)
components/bootloader_support/src/esp32c6/bootloader_esp32c6.c
+5 -6
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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -43,7 +43,7 @@
#include "soc/lp_wdt_reg.h"
#include "hal/efuse_hal.h"
#include "hal/lpwdt_ll.h"
#include "modem/modem_lpcon_reg.h"
#include "hal/regi2c_ctrl_ll.h"
static const char *TAG = "boot.esp32c6";
@@ -95,9 +95,8 @@ static inline void bootloader_hardware_init(void)
esp_rom_spiflash_fix_dummylen(1, 1);
#endif
/* Enable analog i2c master clock */
SET_PERI_REG_MASK(MODEM_LPCON_CLK_CONF_REG, MODEM_LPCON_CLK_I2C_MST_EN);
SET_PERI_REG_MASK(MODEM_LPCON_I2C_MST_CLK_CONF_REG, MODEM_LPCON_CLK_I2C_MST_SEL_160M);
regi2c_ctrl_ll_master_enable_clock(true);
regi2c_ctrl_ll_master_configure_clock();
}
static inline void bootloader_ana_reset_config(void)
@@ -167,7 +166,7 @@ esp_err_t bootloader_init(void)
}
#endif // !CONFIG_APP_BUILD_TYPE_RAM
// check whether a WDT reset happend
// check whether a WDT reset happened
bootloader_check_wdt_reset();
// config WDT
bootloader_config_wdt();
components/bootloader_support/src/esp32c61/bootloader_esp32c61.c
+4 -6
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@@ -43,8 +43,7 @@
#include "soc/lp_wdt_reg.h"
#include "hal/efuse_hal.h"
#include "hal/lpwdt_ll.h"
#include "modem/modem_lpcon_reg.h"
#include "modem/modem_syscon_reg.h"
#include "hal/regi2c_ctrl_ll.h"
static const char *TAG = "boot.esp32c61";
@@ -96,10 +95,9 @@ static inline void bootloader_hardware_init(void)
esp_rom_spiflash_fix_dummylen(1, 1);
#endif
/* Enable analog i2c master clock */
SET_PERI_REG_MASK(MODEM_LPCON_CLK_CONF_REG, MODEM_LPCON_CLK_I2C_MST_EN);
SET_PERI_REG_MASK(MODEM_LPCON_CLK_CONF_FORCE_ON_REG, MODEM_LPCON_CLK_I2C_MST_FO); // TODO: IDF-9274 Remove this?
SET_PERI_REG_MASK(MODEM_SYSCON_CLK_CONF_REG, MODEM_SYSCON_CLK_I2C_MST_SEL_160M);
regi2c_ctrl_ll_master_enable_clock(true);
regi2c_ctrl_ll_master_force_enable_clock(true); // TODO: IDF-9274 Remove this?
regi2c_ctrl_ll_master_configure_clock();
}
static inline void bootloader_ana_reset_config(void)
components/bootloader_support/src/esp32h2/bootloader_esp32h2.c
+6 -6
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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -31,7 +31,6 @@
#include "esp_private/regi2c_ctrl.h"
#include "soc/regi2c_lp_bias.h"
#include "soc/regi2c_bias.h"
#include "modem/modem_lpcon_reg.h"
#include "bootloader_console.h"
#include "bootloader_flash_priv.h"
#include "bootloader_soc.h"
@@ -43,7 +42,7 @@
#include "soc/lp_wdt_reg.h"
#include "soc/pmu_reg.h"
#include "hal/efuse_hal.h"
#include "modem/modem_lpcon_reg.h"
#include "hal/regi2c_ctrl_ll.h"
static const char *TAG = "boot.esp32h2";
@@ -89,8 +88,9 @@ static inline void bootloader_hardware_init(void)
/* Disable RF pll by default */
CLEAR_PERI_REG_MASK(PMU_RF_PWC_REG, PMU_XPD_RFPLL);
SET_PERI_REG_MASK(PMU_RF_PWC_REG, PMU_XPD_FORCE_RFPLL);
/* Enable analog i2c master clock */
SET_PERI_REG_MASK(MODEM_LPCON_CLK_CONF_REG, MODEM_LPCON_CLK_I2C_MST_EN);
regi2c_ctrl_ll_master_enable_clock(true);
regi2c_ctrl_ll_master_configure_clock();
}
static inline void bootloader_ana_reset_config(void)
@@ -160,7 +160,7 @@ esp_err_t bootloader_init(void)
}
#endif // !CONFIG_APP_BUILD_TYPE_RAM
// check whether a WDT reset happend
// check whether a WDT reset happened
bootloader_check_wdt_reset();
// config WDT
bootloader_config_wdt();
components/bootloader_support/src/esp32p4/bootloader_esp32p4.c
+6 -2
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@@ -48,6 +48,7 @@
#include "soc/regi2c_cpll.h"
#include "soc/regi2c_bias.h"
#include "esp_private/periph_ctrl.h"
#include "hal/regi2c_ctrl_ll.h"
static const char *TAG = "boot.esp32p4";
@@ -92,8 +93,10 @@ static void bootloader_super_wdt_auto_feed(void)
static inline void bootloader_hardware_init(void)
{
int __DECLARE_RCC_ATOMIC_ENV __attribute__ ((unused));
// regi2c is enabled by default on ESP32P4, do nothing
int __DECLARE_RCC_RC_ATOMIC_ENV __attribute__ ((unused)); // To avoid build errors/warnings about __DECLARE_RCC_RC_ATOMIC_ENV
regi2c_ctrl_ll_master_enable_clock(true);
regi2c_ctrl_ll_master_configure_clock();
unsigned chip_version = efuse_hal_chip_revision();
if (!ESP_CHIP_REV_ABOVE(chip_version, 1)) {
// On ESP32P4 ECO0, the default (power on reset) CPLL and SPLL frequencies are very high, lower them to avoid bias may not be enough in bootloader
@@ -106,6 +109,7 @@ static inline void bootloader_hardware_init(void)
REGI2C_WRITE_MASK(I2C_BIAS, I2C_BIAS_DREG_1P1_PVT, 10);
// IDF-10019 TODO: This is temporarily for ESP32P4-ECO0, please remove it when eco0 is not widly used.
int __DECLARE_RCC_ATOMIC_ENV __attribute__ ((unused));
if (likely(ESP_CHIP_REV_ABOVE(chip_version, 1))) {
spimem_flash_ll_select_clk_source(0, FLASH_CLK_SRC_SPLL);
spimem_ctrlr_ll_set_core_clock(0, 6);