feat(clk): Add basic clock support for esp32c5 mp

- Support SOC ROOT clock source switch - Support CPU frequency change - Support RTC SLOW clock source switch - Support RTC SLOW clock + RC FAST calibration - Remove FPGA build
2024-06-14 16:46:48 +08:00
parent ede24b0440
commit 40f3bc2e57
43 changed files with 449 additions and 595 deletions
@@ -166,7 +166,7 @@ The source clock can also limit the PWM frequency. The higher the source clock f
         - ~ 17.5 MHz
         - Dynamic Frequency Scaling compatible, Light sleep compatible
       * - XTAL_CLK
-         - 48/40 MHz
+         - 48 MHz
         - Dynamic Frequency Scaling compatible

 .. only:: esp32c6