Updates for riscv support

* Target components pull in xtensa component directly
* Use CPU HAL where applicable
* Remove unnecessary xtensa headers
* Compilation changes necessary to support non-xtensa gcc types (ie int32_t/uint32_t is no
  longer signed/unsigned int).

Changes come from internal branch commit a6723fc

components/bootloader_support/src/bootloader_mem.c

@@ -14,35 +14,17 @@
 
 #include <stdbool.h>
 
-#include "xtensa/config/core.h"
 #include "hal/cpu_hal.h"
 #include "hal/mpu_hal.h"
 #include "hal/mpu_types.h"
 #include "soc/soc_caps.h"
 #include "bootloader_mem.h"
-#include "xt_instr_macros.h"
-#include "xtensa/config/specreg.h"
-
-static inline void cpu_configure_region_protection(void)
-{
-    /* Currently, the only supported chips esp32 and esp32s2
-     * have the same configuration. Move this to the port layer once
-     * more chips with different configurations are supported.
-     *
-     * Both chips have the address space divided into 8 regions, 512MB each.
-     */
-    const int illegal_regions[] = {0, 4, 5, 6, 7}; // 0x00000000, 0x80000000, 0xa0000000, 0xc0000000, 0xe0000000
-    for (int i = 0; i < sizeof(illegal_regions) / sizeof(illegal_regions[0]); ++i) {
-        mpu_hal_set_region_access(illegal_regions[i], MPU_REGION_ILLEGAL);
-    }
-
-    mpu_hal_set_region_access(1, MPU_REGION_RW); // 0x20000000
-}
+#include "soc/cpu.h"
 
 void bootloader_init_mem(void)
 {
     cpu_hal_init_hwloop();
 
     // protect memory region
-    cpu_configure_region_protection();
+    esp_cpu_configure_region_protection();
 }

components/bootloader_support/src/bootloader_panic.c

@@ -14,7 +14,7 @@
 
 #include "esp_log.h"
 #include "bootloader_common.h"
-#include "soc/cpu.h"
+#include "hal/cpu_hal.h"
 #include "esp_rom_sys.h"
 
 
@@ -30,8 +30,8 @@ void abort(void)
 #if !CONFIG_ESP_SYSTEM_PANIC_SILENT_REBOOT
     esp_rom_printf("abort() was called at PC 0x%08x\r\n", (intptr_t)__builtin_return_address(0) - 3);
 #endif
-    if (esp_cpu_in_ocd_debug_mode()) {
-        __asm__("break 0,0");
+    if (cpu_hal_is_debugger_attached()) {
+        cpu_hal_break();
     }
     while (1) {
     }

components/bootloader_support/src/bootloader_random.c

@@ -13,7 +13,7 @@
 // limitations under the License.
 #include "sdkconfig.h"
 #include "bootloader_random.h"
-#include "soc/cpu.h"
+#include "hal/cpu_hal.h"
 #include "soc/wdev_reg.h"
 
 #ifndef BOOTLOADER_BUILD
@@ -44,13 +44,14 @@
                values.
             */
             random = REG_READ(WDEV_RND_REG);
-            RSR(CCOUNT, start);
+            start = cpu_hal_get_cycle_count();
             do {
                 random ^= REG_READ(WDEV_RND_REG);
-                RSR(CCOUNT, now);
+                now = cpu_hal_get_cycle_count();
             } while (now - start < 80 * 32 * 2); /* extra factor of 2 is precautionary */
         }
         buffer_bytes[i] = random >> ((i % 4) * 8);
     }
 }
+
 #endif // BOOTLOADER_BUILD