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Merge branch 'feature/move_target_kconfig_2' into 'master'

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system: move kconfig options out of target component

See merge request espressif/esp-idf!17321
This commit is contained in:
Marius Vikhammer
2022-04-24 13:29:43 +08:00
parent 5bb2379bac d2872095f9
commit 45c1d1cba2
174 changed files with 1455 additions and 1723 deletions
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components/esp_hw_support/Kconfig
+8 -2
View File
@@ -36,10 +36,10 @@ menu "Hardware Settings"
config ESP_SLEEP_GPIO_RESET_WORKAROUND
bool "light sleep GPIO reset workaround"
default y if IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32S3
default y if IDF_TARGET_ESP32C2 || IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32S3
select PM_SLP_DISABLE_GPIO if FREERTOS_USE_TICKLESS_IDLE
help
esp32c3 and esp32s3 will reset at wake-up if GPIO is received a small electrostatic
esp32c2, esp32c3 and esp32s3 will reset at wake-up if GPIO is received a small electrostatic
pulse during light sleep, with specific condition
- GPIO needs to be configured as input-mode only
@@ -72,6 +72,8 @@ menu "Hardware Settings"
endmenu
menu "RTC Clock Config"
orsource "./port/$IDF_TARGET/Kconfig.rtc"
# This is used for configure the RTC clock.
config RTC_CLOCK_BBPLL_POWER_ON_WITH_USB
bool "Keep BBPLL clock always work"
@@ -94,4 +96,8 @@ menu "Hardware Settings"
Place peripheral control functions (e.g. periph_module_reset) into IRAM,
so that these functions can be IRAM-safe and able to be called in the other IRAM interrupt context.
endmenu
# Insert chip-specific HW config
orsource "./port/$IDF_TARGET/Kconfig.hw_support"
endmenu
components/esp_hw_support/include/esp_sleep.h
+2 -2
View File
@@ -107,7 +107,7 @@ esp_err_t esp_sleep_disable_wakeup_source(esp_sleep_source_t source);
* ext0 wakeup source is used.
* @return
* - ESP_OK on success
* - ESP_ERR_NOT_SUPPORTED if additional current by touch (CONFIG_ESP32_RTC_EXT_CRYST_ADDIT_CURRENT) is enabled.
* - ESP_ERR_NOT_SUPPORTED if additional current by touch (CONFIG_RTC_EXT_CRYST_ADDIT_CURRENT) is enabled.
* - ESP_ERR_INVALID_STATE if ULP co-processor is not enabled or if wakeup triggers conflict
*/
esp_err_t esp_sleep_enable_ulp_wakeup(void);
@@ -138,7 +138,7 @@ esp_err_t esp_sleep_enable_timer_wakeup(uint64_t time_in_us);
*
* @return
* - ESP_OK on success
* - ESP_ERR_NOT_SUPPORTED if additional current by touch (CONFIG_ESP32_RTC_EXT_CRYST_ADDIT_CURRENT) is enabled.
* - ESP_ERR_NOT_SUPPORTED if additional current by touch (CONFIG_RTC_EXT_CRYST_ADDIT_CURRENT) is enabled.
* - ESP_ERR_INVALID_STATE if wakeup triggers conflict
*/
esp_err_t esp_sleep_enable_touchpad_wakeup(void);
components/esp_hw_support/port/esp32/Kconfig.hw_support
+24
View File
@@ -0,0 +1,24 @@
choice ESP32_REV_MIN
prompt "Minimum Supported ESP32 Revision"
default ESP32_REV_MIN_0
help
Minimum revision that ESP-IDF would support.
ESP-IDF performs different strategy on different esp32 revision.
config ESP32_REV_MIN_0
bool "Rev 0"
config ESP32_REV_MIN_1
bool "Rev 1"
config ESP32_REV_MIN_2
bool "Rev 2"
config ESP32_REV_MIN_3
bool "Rev 3"
select ESP_INT_WDT if ESP32_ECO3_CACHE_LOCK_FIX
endchoice
config ESP32_REV_MIN
int
default 0 if ESP32_REV_MIN_0
default 1 if ESP32_REV_MIN_1
default 2 if ESP32_REV_MIN_2
default 3 if ESP32_REV_MIN_3
components/esp_hw_support/port/esp32/Kconfig.rtc
+96
View File
@@ -0,0 +1,96 @@
choice RTC_CLK_SRC
prompt "RTC clock source"
default RTC_CLK_SRC_INT_RC
help
Choose which clock is used as RTC clock source.
- "Internal 150kHz oscillator" option provides lowest deep sleep current
consumption, and does not require extra external components. However
frequency stability with respect to temperature is poor, so time may
drift in deep/light sleep modes.
- "External 32kHz crystal" provides better frequency stability, at the
expense of slightly higher (1uA) deep sleep current consumption.
- "External 32kHz oscillator" allows using 32kHz clock generated by an
external circuit. In this case, external clock signal must be connected
to 32K_XN pin. Amplitude should be <1.2V in case of sine wave signal,
and <1V in case of square wave signal. Common mode voltage should be
0.1 < Vcm < 0.5Vamp, where Vamp is the signal amplitude.
Additionally, 1nF capacitor must be connected between 32K_XP pin and
ground. 32K_XP pin can not be used as a GPIO in this case.
- "Internal 8.5MHz oscillator divided by 256" option results in higher
deep sleep current (by 5uA) but has better frequency stability than
the internal 150kHz oscillator. It does not require external components.
config RTC_CLK_SRC_INT_RC
bool "Internal 150kHz RC oscillator"
config RTC_CLK_SRC_EXT_CRYS
bool "External 32kHz crystal"
select ESP_SYSTEM_RTC_EXT_XTAL
config RTC_CLK_SRC_EXT_OSC
bool "External 32kHz oscillator at 32K_XN pin"
select ESP_SYSTEM_RTC_EXT_OSC
config RTC_CLK_SRC_INT_8MD256
bool "Internal 8.5MHz oscillator, divided by 256 (~33kHz)"
endchoice
choice RTC_EXT_CRYST_ADDIT_CURRENT_METHOD
prompt "Additional current for external 32kHz crystal"
depends on RTC_CLK_SRC_EXT_CRYS
depends on ESP32_REV_MIN <= 1
default RTC_EXT_CRYST_ADDIT_CURRENT_NONE
help
With some 32kHz crystal configurations, the X32N and X32P pins may not have enough
drive strength to keep the crystal oscillating. Choose the method to provide
additional current from touchpad 9 to the external 32kHz crystal. Note that
the deep sleep current is slightly high (4-5uA) and the touchpad and the
wakeup sources of both touchpad and ULP are not available in method 1 and method 2.
This problem is fixed in ESP32 ECO 3, so this workaround is not needed. Setting the
project configuration to minimum revision ECO3 will disable this option, , allow
all wakeup sources, and save some code size.
- "None" option will not provide additional current to external crystal
- "Method 1" option can't ensure 100% to solve the external 32k crystal start failed
issue, but the touchpad can work in this method.
- "Method 2" option can solve the external 32k issue, but the touchpad can't work
in this method.
config RTC_EXT_CRYST_ADDIT_CURRENT_NONE
bool "None"
config RTC_EXT_CRYST_ADDIT_CURRENT
bool "Method 1"
config RTC_EXT_CRYST_ADDIT_CURRENT_V2
bool "Method 2"
endchoice
config RTC_CLK_CAL_CYCLES
int "Number of cycles for RTC_SLOW_CLK calibration"
default 3000 if RTC_CLK_SRC_EXT_CRYS || RTC_CLK_SRC_EXT_OSC || RTC_CLK_SRC_INT_8MD256
default 1024 if RTC_CLK_SRC_INT_RC
range 0 27000 if RTC_CLK_SRC_EXT_CRYS || RTC_CLK_SRC_EXT_OSC || RTC_CLK_SRC_INT_8MD256
range 0 32766 if RTC_CLK_SRC_INT_RC
help
When the startup code initializes RTC_SLOW_CLK, it can perform
calibration by comparing the RTC_SLOW_CLK frequency with main XTAL
frequency. This option sets the number of RTC_SLOW_CLK cycles measured
by the calibration routine. Higher numbers increase calibration
precision, which may be important for applications which spend a lot of
time in deep sleep. Lower numbers reduce startup time.
When this option is set to 0, clock calibration will not be performed at
startup, and approximate clock frequencies will be assumed:
- 150000 Hz if internal RC oscillator is used as clock source. For this use value 1024.
- 32768 Hz if the 32k crystal oscillator is used. For this use value 3000 or more.
In case more value will help improve the definition of the launch of the crystal.
If the crystal could not start, it will be switched to internal RC.
config RTC_XTAL_CAL_RETRY
int "Number of attempts to repeat 32k XTAL calibration"
default 1
depends on RTC_CLK_SRC_EXT_CRYS
help
Number of attempts to repeat 32k XTAL calibration
before giving up and switching to the internal RC.
Increase this option if the 32k crystal oscillator
does not start and switches to internal RC.
components/esp_hw_support/port/esp32/rtc_clk.c
+5 -5
View File
@@ -126,7 +126,7 @@ static void rtc_clk_32k_enable_common(int dac, int dres, int dbias)
REG_SET_FIELD(RTC_IO_XTAL_32K_PAD_REG, RTC_IO_DRES_XTAL_32K, dres);
REG_SET_FIELD(RTC_IO_XTAL_32K_PAD_REG, RTC_IO_DBIAS_XTAL_32K, dbias);
#ifdef CONFIG_ESP32_RTC_EXT_CRYST_ADDIT_CURRENT
#ifdef CONFIG_RTC_EXT_CRYST_ADDIT_CURRENT
uint8_t chip_ver = efuse_hal_get_chip_revision();
// version0 and version1 need provide additional current to external XTAL.
if(chip_ver == 0 || chip_ver == 1) {
@@ -142,7 +142,7 @@ static void rtc_clk_32k_enable_common(int dac, int dres, int dbias)
So the Touch DAC start to drive some current from VDD to TOUCH8(which is also XTAL-N)*/
SET_PERI_REG_MASK(RTC_IO_TOUCH_PAD9_REG, RTC_IO_TOUCH_PAD9_XPD_M);
}
#elif defined CONFIG_ESP32_RTC_EXT_CRYST_ADDIT_CURRENT_V2
#elif defined CONFIG_RTC_EXT_CRYST_ADDIT_CURRENT_V2
uint8_t chip_ver = efuse_hal_get_chip_revision();
if(chip_ver == 0 || chip_ver == 1) {
/* TOUCH sensor can provide additional current to external XTAL.
@@ -176,13 +176,13 @@ void rtc_clk_32k_enable(bool enable)
CLEAR_PERI_REG_MASK(RTC_IO_XTAL_32K_PAD_REG, RTC_IO_XPD_XTAL_32K_M);
CLEAR_PERI_REG_MASK(RTC_IO_XTAL_32K_PAD_REG, RTC_IO_X32N_MUX_SEL | RTC_IO_X32P_MUX_SEL);
#ifdef CONFIG_ESP32_RTC_EXT_CRYST_ADDIT_CURRENT
#ifdef CONFIG_RTC_EXT_CRYST_ADDIT_CURRENT
uint8_t chip_ver = efuse_hal_get_chip_revision();
if(chip_ver == 0 || chip_ver == 1) {
/* Power down TOUCH */
CLEAR_PERI_REG_MASK(RTC_IO_TOUCH_PAD9_REG, RTC_IO_TOUCH_PAD9_XPD_M);
}
#elif defined CONFIG_ESP32_RTC_EXT_CRYST_ADDIT_CURRENT_V2
#elif defined CONFIG_RTC_EXT_CRYST_ADDIT_CURRENT_V2
uint8_t chip_ver = efuse_hal_get_chip_revision();
if(chip_ver == 0 || chip_ver == 1) {
/* Power down TOUCH */
@@ -826,7 +826,7 @@ void rtc_clk_apb_freq_update(uint32_t apb_freq)
uint32_t rtc_clk_apb_freq_get(void)
{
#if CONFIG_IDF_ENV_FPGA
return CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ * MHZ;
return CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ * MHZ;
#endif // CONFIG_IDF_ENV_FPGA
uint32_t freq_hz = reg_val_to_clk_val(READ_PERI_REG(RTC_APB_FREQ_REG)) << 12;
// round to the nearest MHz
components/esp_hw_support/port/esp32c2/Kconfig.rtc
+35
View File
@@ -0,0 +1,35 @@
choice RTC_CLK_SRC
prompt "RTC clock source"
default RTC_CLK_SRC_INT_RC
help
Choose which clock is used as RTC clock source.
config RTC_CLK_SRC_INT_RC
bool "Internal 150kHz RC oscillator"
config RTC_CLK_SRC_EXT_OSC
bool "External 32kHz oscillator at 32K_XP pin"
config RTC_CLK_SRC_INT_8MD256
bool "Internal 8MHz oscillator, divided by 256 (~32kHz)"
endchoice
config RTC_CLK_CAL_CYCLES
int "Number of cycles for RTC_SLOW_CLK calibration"
default 3000 if RTC_CLK_SRC_EXT_OSC || RTC_CLK_SRC_INT_8MD256
default 1024 if RTC_CLK_SRC_INT_RC
range 0 27000 if RTC_CLK_SRC_EXT_OSC || RTC_CLK_SRC_INT_8MD256
range 0 32766 if RTC_CLK_SRC_INT_RC
help
When the startup code initializes RTC_SLOW_CLK, it can perform
calibration by comparing the RTC_SLOW_CLK frequency with main XTAL
frequency. This option sets the number of RTC_SLOW_CLK cycles measured
by the calibration routine. Higher numbers increase calibration
precision, which may be important for applications which spend a lot of
time in deep sleep. Lower numbers reduce startup time.
When this option is set to 0, clock calibration will not be performed at
startup, and approximate clock frequencies will be assumed:
- 150000 Hz if internal RC oscillator is used as clock source. For this use value 1024.
- 32768 Hz if the 32k crystal oscillator is used. For this use value 3000 or more.
In case more value will help improve the definition of the launch of the crystal.
If the crystal could not start, it will be switched to internal RC.
components/esp_hw_support/port/esp32c3/Kconfig.hw_support
+27
View File
@@ -0,0 +1,27 @@
choice ESP32C3_REV_MIN
prompt "Minimum Supported ESP32-C3 Revision"
default ESP32C3_REV_MIN_3
help
Minimum revision that ESP-IDF would support.
Only supporting higher chip revisions can reduce binary size.
config ESP32C3_REV_MIN_0
bool "Rev 0"
config ESP32C3_REV_MIN_1
bool "Rev 1"
config ESP32C3_REV_MIN_2
bool "Rev 2"
config ESP32C3_REV_MIN_3
bool "Rev 3"
config ESP32C3_REV_MIN_4
bool "Rev 4"
endchoice
config ESP32C3_REV_MIN
int
default 0 if ESP32C3_REV_MIN_0
default 1 if ESP32C3_REV_MIN_1
default 2 if ESP32C3_REV_MIN_2
default 3 if ESP32C3_REV_MIN_3
default 4 if ESP32C3_REV_MIN_4
components/esp_hw_support/port/esp32c3/Kconfig.rtc
+39
View File
@@ -0,0 +1,39 @@
choice RTC_CLK_SRC
prompt "RTC clock source"
default RTC_CLK_SRC_INT_RC
help
Choose which clock is used as RTC clock source.
config RTC_CLK_SRC_INT_RC
bool "Internal 150kHz RC oscillator"
config RTC_CLK_SRC_EXT_CRYS
bool "External 32kHz crystal"
select ESP_SYSTEM_RTC_EXT_XTAL
config RTC_CLK_SRC_EXT_OSC
bool "External 32kHz oscillator at 32K_XP pin"
select ESP_SYSTEM_RTC_EXT_OSC
config RTC_CLK_SRC_INT_8MD256
bool "Internal 8MHz oscillator, divided by 256 (~32kHz)"
endchoice
config RTC_CLK_CAL_CYCLES
int "Number of cycles for RTC_SLOW_CLK calibration"
default 3000 if RTC_CLK_SRC_EXT_CRYS || RTC_CLK_SRC_EXT_OSC || RTC_CLK_SRC_INT_8MD256
default 1024 if RTC_CLK_SRC_INT_RC
range 0 27000 if RTC_CLK_SRC_EXT_CRYS || RTC_CLK_SRC_EXT_OSC || RTC_CLK_SRC_INT_8MD256
range 0 32766 if RTC_CLK_SRC_INT_RC
help
When the startup code initializes RTC_SLOW_CLK, it can perform
calibration by comparing the RTC_SLOW_CLK frequency with main XTAL
frequency. This option sets the number of RTC_SLOW_CLK cycles measured
by the calibration routine. Higher numbers increase calibration
precision, which may be important for applications which spend a lot of
time in deep sleep. Lower numbers reduce startup time.
When this option is set to 0, clock calibration will not be performed at
startup, and approximate clock frequencies will be assumed:
- 150000 Hz if internal RC oscillator is used as clock source. For this use value 1024.
- 32768 Hz if the 32k crystal oscillator is used. For this use value 3000 or more.
In case more value will help improve the definition of the launch of the crystal.
If the crystal could not start, it will be switched to internal RC.
components/esp_hw_support/port/esp32h2/Kconfig.rtc
+38
View File
@@ -0,0 +1,38 @@
choice RTC_CLK_SRC
prompt "RTC clock source"
default RTC_CLK_SRC_INT_RC
help
Choose which clock is used as RTC clock source.
config RTC_CLK_SRC_INT_RC
bool "Internal 150kHz RC oscillator"
config RTC_CLK_SRC_EXT_CRYS
bool "External 32.768kHz crystal"
select ESP_SYSTEM_RTC_EXT_XTAL
config RTC_CLK_SRC_EXT_OSC
bool "External 32kHz oscillator at 32K_XP pin"
select ESP_SYSTEM_RTC_EXT_OSC
config RTC_CLK_SRC_INT_8MD256
bool "Internal 8MHz oscillator, divided by 256 (~32kHz)"
endchoice
config RTC_CLK_CAL_CYCLES
int "Number of cycles for RTC_SLOW_CLK calibration"
default 3000 if RTC_CLK_SRC_EXT_CRYS || RTC_CLK_SRC_EXT_OSC || RTC_CLK_SRC_INT_8MD256
default 576 if RTC_CLK_SRC_INT_RC
range 0 125000
help
When the startup code initializes RTC_SLOW_CLK, it can perform
calibration by comparing the RTC_SLOW_CLK frequency with main XTAL
frequency. This option sets the number of RTC_SLOW_CLK cycles measured
by the calibration routine. Higher numbers increase calibration
precision, which may be important for applications which spend a lot of
time in deep sleep. Lower numbers reduce startup time.
When this option is set to 0, clock calibration will not be performed at
startup, and approximate clock frequencies will be assumed:
- 150000 Hz if internal RC oscillator is used as clock source. For this use value 1024.
- 32768 Hz if the 32k crystal oscillator is used. For this use value 3000 or more.
In case more value will help improve the definition of the launch of the crystal.
If the crystal could not start, it will be switched to internal RC.
components/esp_hw_support/port/esp32s2/Kconfig.rtc
+65
View File
@@ -0,0 +1,65 @@
choice RTC_CLK_SRC
prompt "RTC clock source"
default RTC_CLK_SRC_INT_RC
help
Choose which clock is used as RTC clock source.
- "Internal 90kHz oscillator" option provides lowest deep sleep current
consumption, and does not require extra external components. However
frequency stability with respect to temperature is poor, so time may
drift in deep/light sleep modes.
- "External 32kHz crystal" provides better frequency stability, at the
expense of slightly higher (1uA) deep sleep current consumption.
- "External 32kHz oscillator" allows using 32kHz clock generated by an
external circuit. In this case, external clock signal must be connected
to 32K_XN pin. Amplitude should be <1.2V in case of sine wave signal,
and <1V in case of square wave signal. Common mode voltage should be
0.1 < Vcm < 0.5Vamp, where Vamp is the signal amplitude.
Additionally, 1nF capacitor must be connected between 32K_XP pin and
ground. 32K_XP pin can not be used as a GPIO in this case.
- "Internal 8MHz oscillator divided by 256" option results in higher
deep sleep current (by 5uA) but has better frequency stability than
the internal 90kHz oscillator. It does not require external components.
config RTC_CLK_SRC_INT_RC
bool "Internal 90kHz RC oscillator"
config RTC_CLK_SRC_EXT_CRYS
bool "External 32kHz crystal"
select ESP_SYSTEM_RTC_EXT_XTAL
config RTC_CLK_SRC_EXT_OSC
bool "External 32kHz oscillator at 32K_XN pin"
select ESP_SYSTEM_RTC_EXT_OSC
config RTC_CLK_SRC_INT_8MD256
bool "Internal 8MHz oscillator, divided by 256 (~32kHz)"
endchoice
config RTC_CLK_CAL_CYCLES
int "Number of cycles for RTC_SLOW_CLK calibration"
default 3000 if RTC_CLK_SRC_EXT_CRYS || RTC_CLK_SRC_EXT_OSC || RTC_CLK_SRC_INT_8MD256
default 576 if RTC_CLK_SRC_INT_RC
range 0 125000
help
When the startup code initializes RTC_SLOW_CLK, it can perform
calibration by comparing the RTC_SLOW_CLK frequency with main XTAL
frequency. This option sets the number of RTC_SLOW_CLK cycles measured
by the calibration routine. Higher numbers increase calibration
precision, which may be important for applications which spend a lot of
time in deep sleep. Lower numbers reduce startup time.
When this option is set to 0, clock calibration will not be performed at
startup, and approximate clock frequencies will be assumed:
- 90000 Hz if internal RC oscillator is used as clock source. For this use value 1024.
- 32768 Hz if the 32k crystal oscillator is used. For this use value 3000 or more.
In case more value will help improve the definition of the launch of the crystal.
If the crystal could not start, it will be switched to internal RC.
config RTC_XTAL_CAL_RETRY
int "Number of attempts to repeat 32k XTAL calibration"
default 3
depends on RTC_CLK_SRC_EXT_CRYS
help
Number of attempts to repeat 32k XTAL calibration
before giving up and switching to the internal RC.
Increase this option if the 32k crystal oscillator
does not start and switches to internal RC.
components/esp_hw_support/port/esp32s3/Kconfig.rtc
+39
View File
@@ -0,0 +1,39 @@
choice RTC_CLK_SRC
prompt "RTC clock source"
default RTC_CLK_SRC_INT_RC
help
Choose which clock is used as RTC clock source.
config RTC_CLK_SRC_INT_RC
bool "Internal 150kHz RC oscillator"
config RTC_CLK_SRC_EXT_CRYS
bool "External 32kHz crystal"
select ESP_SYSTEM_RTC_EXT_XTAL
config RTC_CLK_SRC_EXT_OSC
bool "External 32kHz oscillator at 32K_XP pin"
select ESP_SYSTEM_RTC_EXT_OSC
config RTC_CLK_SRC_INT_8MD256
bool "Internal 8MHz oscillator, divided by 256 (~32kHz)"
endchoice
config RTC_CLK_CAL_CYCLES
int "Number of cycles for RTC_SLOW_CLK calibration"
default 3000 if RTC_CLK_SRC_EXT_CRYS || RTC_CLK_SRC_EXT_OSC || RTC_CLK_SRC_INT_8MD256
default 1024 if RTC_CLK_SRC_INT_RC
range 0 27000 if RTC_CLK_SRC_EXT_CRYS || RTC_CLK_SRC_EXT_OSC || RTC_CLK_SRC_INT_8MD256
range 0 32766 if RTC_CLK_SRC_INT_RC
help
When the startup code initializes RTC_SLOW_CLK, it can perform
calibration by comparing the RTC_SLOW_CLK frequency with main XTAL
frequency. This option sets the number of RTC_SLOW_CLK cycles measured
by the calibration routine. Higher numbers increase calibration
precision, which may be important for applications which spend a lot of
time in deep sleep. Lower numbers reduce startup time.
When this option is set to 0, clock calibration will not be performed at
startup, and approximate clock frequencies will be assumed:
- 150000 Hz if internal RC oscillator is used as clock source. For this use value 1024.
- 32768 Hz if the 32k crystal oscillator is used. For this use value 3000 or more.
In case more value will help improve the definition of the launch of the crystal.
If the crystal could not start, it will be switched to internal RC.
components/esp_hw_support/sdkconfig.rename.esp32
+18
View File
@@ -0,0 +1,18 @@
# sdkconfig replacement configurations for deprecated options formatted as
# CONFIG_DEPRECATED_OPTION CONFIG_NEW_OPTION
CONFIG_ESP32_RTC_CLK_SRC_INT_RC CONFIG_RTC_CLK_SRC_INT_RC
CONFIG_ESP32_RTC_CLK_SRC_EXT_CRYS CONFIG_RTC_CLK_SRC_EXT_CRYS
CONFIG_ESP32_RTC_CLK_SRC_EXT_OSC CONFIG_RTC_CLK_SRC_EXT_OSC
CONFIG_ESP32_RTC_CLK_SRC_INT_8MD256 CONFIG_RTC_CLK_SRC_INT_8MD256
CONFIG_ESP32_RTC_EXT_CRYST_ADDIT_CURRENT_NONE CONFIG_RTC_EXT_CRYST_ADDIT_CURRENT_NONE
CONFIG_ESP32_RTC_EXT_CRYST_ADDIT_CURRENT CONFIG_RTC_EXT_CRYST_ADDIT_CURRENT
CONFIG_ESP32_RTC_EXT_CRYST_ADDIT_CURRENT_V2 CONFIG_RTC_EXT_CRYST_ADDIT_CURRENT_V2
CONFIG_ESP32_RTC_CLK_CAL_CYCLES CONFIG_RTC_CLK_CAL_CYCLES
CONFIG_ESP32_RTC_XTAL_CAL_RETRY CONFIG_RTC_XTAL_CAL_RETRY
CONFIG_ESP32_RTC_EXTERNAL_CRYSTAL_ADDITIONAL_CURRENT CONFIG_RTC_EXT_CRYST_ADDIT_CURRENT
CONFIG_ESP32_RTC_CLOCK_SOURCE_INTERNAL_RC CONFIG_RTC_CLK_SRC_INT_RC
CONFIG_ESP32_RTC_CLOCK_SOURCE_EXTERNAL_CRYSTAL CONFIG_RTC_CLK_SRC_EXT_CRYS
CONFIG_ESP32_RTC_CLOCK_SOURCE_EXTERNAL_OSC CONFIG_RTC_CLK_SRC_EXT_OSC
CONFIG_ESP32_RTC_CLOCK_SOURCE_INTERNAL_8MD256 CONFIG_RTC_CLK_SRC_INT_8MD256
components/esp_hw_support/sdkconfig.rename.esp32c3
+8
View File
@@ -1 +1,9 @@
# sdkconfig replacement configurations for deprecated options formatted as
# CONFIG_DEPRECATED_OPTION CONFIG_NEW_OPTION
CONFIG_ESP32C3_LIGHTSLEEP_GPIO_RESET_WORKAROUND CONFIG_ESP_SLEEP_GPIO_RESET_WORKAROUND
CONFIG_ESP32C3_RTC_CLK_SRC_INT_RC CONFIG_RTC_CLK_SRC_INT_RC
CONFIG_ESP32C3_RTC_CLK_SRC_EXT_CRYS CONFIG_RTC_CLK_SRC_EXT_CRYS
CONFIG_ESP32C3_RTC_CLK_SRC_EXT_OSC CONFIG_RTC_CLK_SRC_EXT_OSC
CONFIG_ESP32C3_RTC_CLK_SRC_INT_8MD256 CONFIG_RTC_CLK_SRC_INT_8MD256
CONFIG_ESP32C3_RTC_CLK_CAL_CYCLES CONFIG_RTC_CLK_CAL_CYCLES
components/esp_hw_support/sdkconfig.rename.esp32h2
+8
View File
@@ -0,0 +1,8 @@
# sdkconfig replacement configurations for deprecated options formatted as
# CONFIG_DEPRECATED_OPTION CONFIG_NEW_OPTION
CONFIG_ESP32H2_RTC_CLK_SRC_INT_RC CONFIG_RTC_CLK_SRC_INT_RC
CONFIG_ESP32H2_RTC_CLK_SRC_EXT_CRYS CONFIG_RTC_CLK_SRC_EXT_CRYS
CONFIG_ESP32H2_RTC_CLK_SRC_EXT_OSC CONFIG_RTC_CLK_SRC_EXT_OSC
CONFIG_ESP32H2_RTC_CLK_SRC_INT_8MD256 CONFIG_RTC_CLK_SRC_INT_8MD256
CONFIG_ESP32H2_RTC_CLK_CAL_CYCLES CONFIG_RTC_CLK_CAL_CYCLES
components/esp_hw_support/sdkconfig.rename.esp32s2
+9
View File
@@ -0,0 +1,9 @@
# sdkconfig replacement configurations for deprecated options formatted as
# CONFIG_DEPRECATED_OPTION CONFIG_NEW_OPTION
CONFIG_ESP32S2_RTC_CLK_SRC_INT_RC CONFIG_RTC_CLK_SRC_INT_RC
CONFIG_ESP32S2_RTC_CLK_SRC_EXT_CRYS CONFIG_RTC_CLK_SRC_EXT_CRYS
CONFIG_ESP32S2_RTC_CLK_SRC_EXT_OSC CONFIG_RTC_CLK_SRC_EXT_OSC
CONFIG_ESP32S2_RTC_CLK_SRC_INT_8MD256 CONFIG_RTC_CLK_SRC_INT_8MD256
CONFIG_ESP32S2_RTC_CLK_CAL_CYCLES CONFIG_RTC_CLK_CAL_CYCLES
CONFIG_ESP32S2_RTC_XTAL_CAL_RETRY CONFIG_RTC_XTAL_CAL_RETRY
components/esp_hw_support/sdkconfig.rename.esp32s3
+9
View File
@@ -0,0 +1,9 @@
# sdkconfig replacement configurations for deprecated options formatted as
# CONFIG_DEPRECATED_OPTION CONFIG_NEW_OPTION
CONFIG_ESP32S3_RTC_CLK_SRC_INT_RC CONFIG_RTC_CLK_SRC_INT_RC
CONFIG_ESP32S3_RTC_CLK_SRC_EXT_CRYS CONFIG_RTC_CLK_SRC_EXT_CRYS
CONFIG_ESP32S3_RTC_CLK_SRC_EXT_OSC CONFIG_RTC_CLK_SRC_EXT_OSC
CONFIG_ESP32S3_RTC_CLK_SRC_INT_8MD256 CONFIG_RTC_CLK_SRC_INT_8MD256
CONFIG_ESP32S3_RTC_CLK_CAL_CYCLES CONFIG_RTC_CLK_CAL_CYCLES
CONFIG_ESP32S3_RTC_XTAL_CAL_RETRY CONFIG_RTC_XTAL_CAL_RETRY
components/esp_hw_support/sleep_modes.c
+6 -12
View File
@@ -86,36 +86,30 @@
#define RTC_CLK_SRC_CAL_CYCLES (10)
#ifdef CONFIG_IDF_TARGET_ESP32
#define DEFAULT_CPU_FREQ_MHZ CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ
#define DEFAULT_SLEEP_OUT_OVERHEAD_US (212)
#define DEFAULT_HARDWARE_OUT_OVERHEAD_US (60)
#elif CONFIG_IDF_TARGET_ESP32S2
#define DEFAULT_CPU_FREQ_MHZ CONFIG_ESP32S2_DEFAULT_CPU_FREQ_MHZ
#define DEFAULT_SLEEP_OUT_OVERHEAD_US (147)
#define DEFAULT_HARDWARE_OUT_OVERHEAD_US (28)
#elif CONFIG_IDF_TARGET_ESP32S3
#define DEFAULT_CPU_FREQ_MHZ CONFIG_ESP32S3_DEFAULT_CPU_FREQ_MHZ
#define DEFAULT_SLEEP_OUT_OVERHEAD_US (382)
#define DEFAULT_HARDWARE_OUT_OVERHEAD_US (133)
#elif CONFIG_IDF_TARGET_ESP32C3
#define DEFAULT_CPU_FREQ_MHZ CONFIG_ESP32C3_DEFAULT_CPU_FREQ_MHZ
#define DEFAULT_SLEEP_OUT_OVERHEAD_US (105)
#define DEFAULT_HARDWARE_OUT_OVERHEAD_US (37)
#elif CONFIG_IDF_TARGET_ESP32H2
#define DEFAULT_CPU_FREQ_MHZ CONFIG_ESP32H2_DEFAULT_CPU_FREQ_MHZ
#define DEFAULT_SLEEP_OUT_OVERHEAD_US (105)
#define DEFAULT_HARDWARE_OUT_OVERHEAD_US (37)
#elif CONFIG_IDF_TARGET_ESP32C2
#define DEFAULT_CPU_FREQ_MHZ CONFIG_ESP32C2_DEFAULT_CPU_FREQ_MHZ
#define DEFAULT_SLEEP_OUT_OVERHEAD_US (105)
#define DEFAULT_HARDWARE_OUT_OVERHEAD_US (37)
#endif
#define LIGHT_SLEEP_TIME_OVERHEAD_US DEFAULT_HARDWARE_OUT_OVERHEAD_US
#ifdef CONFIG_ESP_SYSTEM_RTC_EXT_XTAL
#define DEEP_SLEEP_TIME_OVERHEAD_US (650 + 100 * 240 / DEFAULT_CPU_FREQ_MHZ)
#define DEEP_SLEEP_TIME_OVERHEAD_US (650 + 100 * 240 / CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ)
#else
#define DEEP_SLEEP_TIME_OVERHEAD_US (250 + 100 * 240 / DEFAULT_CPU_FREQ_MHZ)
#define DEEP_SLEEP_TIME_OVERHEAD_US (250 + 100 * 240 / CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ)
#endif
#if defined(CONFIG_IDF_TARGET_ESP32) && defined(CONFIG_ESP32_DEEP_SLEEP_WAKEUP_DELAY)
@@ -636,7 +630,7 @@ esp_err_t esp_light_sleep_start(void)
#ifdef CONFIG_ESP_SYSTEM_RTC_EXT_XTAL
uint64_t time_per_us = 1000000ULL;
s_config.rtc_clk_cal_period = (time_per_us << RTC_CLK_CAL_FRACT) / rtc_clk_slow_freq_get_hz();
#elif defined(CONFIG_ESP32S2_RTC_CLK_SRC_INT_RC)
#elif CONFIG_RTC_CLK_SRC_INT_RC && CONFIG_IDF_TARGET_ESP32S2
s_config.rtc_clk_cal_period = rtc_clk_cal_cycling(RTC_CAL_RTC_MUX, RTC_CLK_SRC_CAL_CYCLES);
esp_clk_slowclk_cal_set(s_config.rtc_clk_cal_period);
#else
@@ -806,7 +800,7 @@ esp_err_t esp_sleep_enable_ulp_wakeup(void)
#endif // CONFIG_ULP_COPROC_ENABLED
#if CONFIG_IDF_TARGET_ESP32
#if ((defined CONFIG_ESP32_RTC_EXT_CRYST_ADDIT_CURRENT) || (defined CONFIG_ESP32_RTC_EXT_CRYST_ADDIT_CURRENT_V2))
#if ((defined CONFIG_RTC_EXT_CRYST_ADDIT_CURRENT) || (defined CONFIG_RTC_EXT_CRYST_ADDIT_CURRENT_V2))
ESP_LOGE(TAG, "Failed to enable wakeup when provide current to external 32kHz crystal");
return ESP_ERR_NOT_SUPPORTED;
#endif
@@ -867,7 +861,7 @@ static void touch_wakeup_prepare(void)
esp_err_t esp_sleep_enable_touchpad_wakeup(void)
{
#if ((defined CONFIG_ESP32_RTC_EXT_CRYST_ADDIT_CURRENT) || (defined CONFIG_ESP32_RTC_EXT_CRYST_ADDIT_CURRENT_V2))
#if ((defined CONFIG_RTC_EXT_CRYST_ADDIT_CURRENT) || (defined CONFIG_RTC_EXT_CRYST_ADDIT_CURRENT_V2))
ESP_LOGE(TAG, "Failed to enable wakeup when provide current to external 32kHz crystal");
return ESP_ERR_NOT_SUPPORTED;
#endif
@@ -1299,7 +1293,7 @@ static uint32_t get_power_down_flags(void)
pd_flags |= RTC_SLEEP_PD_VDDSDIO;
}
#if ((defined CONFIG_ESP32_RTC_CLK_SRC_EXT_CRYS) && (defined CONFIG_ESP32_RTC_EXT_CRYST_ADDIT_CURRENT))
#if ((defined CONFIG_RTC_CLK_SRC_EXT_CRYS) && (defined CONFIG_RTC_EXT_CRYST_ADDIT_CURRENT))
if ((s_config.wakeup_triggers & (RTC_TOUCH_TRIG_EN | RTC_ULP_TRIG_EN)) == 0) {
// If enabled EXT1 only and enable the additional current by touch, should be keep RTC_PERIPH power on.
pd_flags &= ~RTC_SLEEP_PD_RTC_PERIPH;
components/esp_hw_support/test/test_rtc_clk.c
+11 -11
View File
@@ -176,7 +176,7 @@ TEST_CASE("Test fast switching between PLL and XTAL", "[rtc_clk]")
#if !IDF_CI_BUILD || !CONFIG_SPIRAM_BANKSWITCH_ENABLE
#define COUNT_TEST 3
#define TIMEOUT_TEST_MS (5 + CONFIG_ESP32_RTC_CLK_CAL_CYCLES / 16)
#define TIMEOUT_TEST_MS (5 + CONFIG_RTC_CLK_CAL_CYCLES / 16)
void stop_rtc_external_quartz(void){
const uint8_t pin_32 = 32;
@@ -202,18 +202,18 @@ static void start_freq(rtc_slow_freq_t required_src_freq, uint32_t start_delay_m
uint32_t end_time;
rtc_slow_freq_t selected_src_freq;
stop_rtc_external_quartz();
#ifdef CONFIG_ESP32_RTC_CLK_SRC_EXT_CRYS
#ifdef CONFIG_RTC_CLK_SRC_EXT_CRYS
uint32_t bootstrap_cycles = CONFIG_ESP_SYSTEM_RTC_EXT_XTAL_BOOTSTRAP_CYCLES;
printf("Test is started. Kconfig settings:\n External 32K crystal is selected,\n Oscillation cycles = %d,\n Calibration cycles = %d.\n",
bootstrap_cycles,
CONFIG_ESP32_RTC_CLK_CAL_CYCLES);
CONFIG_RTC_CLK_CAL_CYCLES);
#else
uint32_t bootstrap_cycles = 5;
printf("Test is started. Kconfig settings:\n Internal RC is selected,\n Oscillation cycles = %d,\n Calibration cycles = %d.\n",
bootstrap_cycles,
CONFIG_ESP32_RTC_CLK_CAL_CYCLES);
#endif // CONFIG_ESP32_RTC_CLK_SRC_EXT_CRYS
if (start_delay_ms == 0 && CONFIG_ESP32_RTC_CLK_CAL_CYCLES < 1500){
CONFIG_RTC_CLK_CAL_CYCLES);
#endif // CONFIG_RTC_CLK_SRC_EXT_CRYS
if (start_delay_ms == 0 && CONFIG_RTC_CLK_CAL_CYCLES < 1500){
start_delay_ms = 50;
printf("Recommended increase Number of cycles for RTC_SLOW_CLK calibration to 3000!\n");
}
@@ -263,18 +263,18 @@ TEST_CASE("Test starting external RTC quartz", "[rtc_clk][test_env=UT_T1_32kXTAL
uint32_t start_time;
uint32_t end_time;
stop_rtc_external_quartz();
#ifdef CONFIG_ESP32_RTC_CLK_SRC_EXT_CRYS
#ifdef CONFIG_RTC_CLK_SRC_EXT_CRYS
uint32_t bootstrap_cycles = CONFIG_ESP_SYSTEM_RTC_EXT_XTAL_BOOTSTRAP_CYCLES;
printf("Test is started. Kconfig settings:\n External 32K crystal is selected,\n Oscillation cycles = %d,\n Calibration cycles = %d.\n",
bootstrap_cycles,
CONFIG_ESP32_RTC_CLK_CAL_CYCLES);
CONFIG_RTC_CLK_CAL_CYCLES);
#else
uint32_t bootstrap_cycles = 5;
printf("Test is started. Kconfig settings:\n Internal RC is selected,\n Oscillation cycles = %d,\n Calibration cycles = %d.\n",
bootstrap_cycles,
CONFIG_ESP32_RTC_CLK_CAL_CYCLES);
#endif // CONFIG_ESP32_RTC_CLK_SRC_EXT_CRYS
if (CONFIG_ESP32_RTC_CLK_CAL_CYCLES < 1500){
CONFIG_RTC_CLK_CAL_CYCLES);
#endif // CONFIG_RTC_CLK_SRC_EXT_CRYS
if (CONFIG_RTC_CLK_CAL_CYCLES < 1500){
printf("Recommended increase Number of cycles for RTC_SLOW_CLK calibration to 3000!\n");
}
while(i < COUNT_TEST){