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docs(c61): check misc system c61 docs

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Marius Vikhammer
2024-06-12 09:38:42 +08:00
parent 618eb845d6
commit 54fde52895
3 changed files with 2 additions and 120 deletions
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docs/en/api-reference/system/intr_alloc.rst
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@@ -26,7 +26,7 @@ Overview
The {IDF_TARGET_NAME} has two cores, with 32 external asynchronous interrupts each. Each interrupt's priority is independently programmable. In addition, there are also 3 core local interrupt sources (CLINT) on each core. See **{IDF_TARGET_NAME} Technical Reference Manual** [`PDF <{IDF_TARGET_TRM_EN_URL}#riscvcpu>`__] for more details.
.. only:: esp32c5
.. only:: esp32c5 or esp32c61
The {IDF_TARGET_NAME} has one core, with 32 external asynchronous interrupts. Each interrupt's priority is independently programmable. In addition, there are also 3 core local interrupt sources (CLINT). For details, see **{IDF_TARGET_NAME} Technical Reference Manual** > **High-Performance CPU** [`PDF <{IDF_TARGET_TRM_EN_URL}#riscvcpu>`__].