esp_adc: new esp_adc component and adc drivers
This commit is contained in:
@@ -41,9 +41,6 @@ extern "C" {
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#define ADC_HAL_DMA_INTR_MASK BIT(9)
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#endif
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//For ADC module, each conversion contains 4 bytes
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#define ADC_HAL_DATA_LEN_PER_CONV 4
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/**
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* @brief Enum for DMA descriptor status
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*/
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@@ -82,8 +79,6 @@ typedef struct adc_hal_dma_ctx_t {
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} adc_hal_dma_ctx_t;
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typedef struct adc_hal_digi_ctrlr_cfg_t {
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bool conv_limit_en; //1: adc conversion will stop when `conv_limit_num` reaches. 0: won't stop. NOTE: esp32 should always be set to 1.
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uint32_t conv_limit_num; //see `conv_limit_en`
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uint32_t adc_pattern_len; //total pattern item number, including ADC1 and ADC2
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adc_digi_pattern_config_t *adc_pattern; //pattern item
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uint32_t sample_freq_hz; //ADC sample frequency
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@@ -231,25 +226,6 @@ void adc_hal_digi_dis_intr(adc_hal_dma_ctx_t *hal, uint32_t mask);
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*/
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void adc_hal_digi_stop(adc_hal_dma_ctx_t *hal);
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/*---------------------------------------------------------------
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ADC Single Read
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---------------------------------------------------------------*/
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/**
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* Start an ADC conversion and get the converted value.
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*
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* @note It may be block to wait conversion finish.
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*
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* @param adc_n ADC unit.
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* @param channel ADC channel number.
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* @param[out] out_raw ADC converted result
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*
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* @return
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* - ESP_OK: The value is valid.
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* - ESP_ERR_INVALID_STATE: The value is invalid.
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*/
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esp_err_t adc_hal_convert(adc_unit_t adc_n, int channel, int *out_raw);
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#ifdef __cplusplus
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}
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#endif
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@@ -23,10 +23,10 @@ extern "C" {
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* ADC work mode
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*/
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typedef enum adc_hal_work_mode_t {
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ADC_HAL_ULP_MODE,
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ADC_HAL_SINGLE_READ_MODE,
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ADC_HAL_CONTINUOUS_READ_MODE,
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ADC_HAL_PWDET_MODE
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ADC_HAL_PWDET_MODE,
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ADC_HAL_ULP_FSM_MODE,
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} adc_hal_work_mode_t;
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/**
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@@ -0,0 +1,86 @@
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/*
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* SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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#include "hal/adc_types.h"
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#include "hal/adc_hal_common.h"
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#include "soc/soc_caps.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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typedef struct sens_dev_t *adc_oneshot_soc_handle_t;
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typedef struct adc_oneshot_hal_cfg_t {
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adc_unit_t unit; ///< ADC unit
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adc_hal_work_mode_t work_mode; ///< ADC work mode
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} adc_oneshot_hal_cfg_t;
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/**
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* ADC channel configuration
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*/
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typedef struct adc_oneshot_hal_chan_cfg_t {
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adc_atten_t atten; ///< ADC attenuation
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adc_bitwidth_t bitwidth; ///< ADC conversion result bits
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} adc_oneshot_hal_chan_cfg_t;
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/**
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* Context of the ADC unit, should be maintained by both the driver and the HAL.
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*/
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typedef struct adc_oneshot_hal_ctx_t {
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/* This should be configured by driver in initialisation, dou't touch again */
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adc_oneshot_soc_handle_t dev; ///< ADC SoC layer handle
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/* These should be malloced by the driver first */
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adc_unit_t unit; ///< ADC unit
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adc_hal_work_mode_t work_mode; ///< ADC work mode
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adc_oneshot_hal_chan_cfg_t chan_configs[SOC_ADC_MAX_CHANNEL_NUM]; ///< ADC configurations per channel
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} adc_oneshot_hal_ctx_t;
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/**
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* Initialise the context
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*
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* @param hal ADC Oneshot Hal context
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* @param config ADC Oneshot Hal init config
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*/
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void adc_oneshot_hal_init(adc_oneshot_hal_ctx_t *hal, const adc_oneshot_hal_cfg_t *config);
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/**
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* Prepare ADC Oneshot hal context
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*
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* @param hal ADC Oneshot Hal context
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* @param config ADC Oneshot Hal configuration
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* @param chan ADC Channel
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*/
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void adc_oneshot_hal_channel_config(adc_oneshot_hal_ctx_t *hal, const adc_oneshot_hal_chan_cfg_t *config, adc_channel_t chan);
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/**
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* Set ADC Oneshot mode required registers
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*
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* @param hal ADC Oneshot Hal context
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* @param channel ADC Channel
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*/
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void adc_oneshot_hal_setup(adc_oneshot_hal_ctx_t *hal, adc_channel_t channel);
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/**
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* Start ADC conversion in Oneshot mode and get the raw result
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*
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* @param hal ADC Oneshot Hal context
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* @param[out] out_raw ADC oneshot conversion raw result
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*
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* @return
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* - true: ADC raw result is valid
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* - false: ADC raw result is invalid
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*/
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bool adc_oneshot_hal_convert(adc_oneshot_hal_ctx_t *hal, int *out_raw);
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#ifdef __cplusplus
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}
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#endif
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@@ -36,42 +36,29 @@ typedef enum {
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} adc_channel_t;
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/**
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* @brief ADC attenuation parameter. Different parameters determine the range of the ADC. See ``adc1_config_channel_atten``.
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* @brief ADC attenuation parameter. Different parameters determine the range of the ADC.
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*/
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typedef enum {
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ADC_ATTEN_DB_0 = 0, ///<No input attenumation, ADC can measure up to approx. 800 mV
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ADC_ATTEN_DB_0 = 0, ///<No input attenuation, ADC can measure up to approx.
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ADC_ATTEN_DB_2_5 = 1, ///<The input voltage of ADC will be attenuated extending the range of measurement by about 2.5 dB (1.33 x)
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ADC_ATTEN_DB_6 = 2, ///<The input voltage of ADC will be attenuated extending the range of measurement by about 6 dB (2 x)
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ADC_ATTEN_DB_11 = 3, ///<The input voltage of ADC will be attenuated extending the range of measurement by about 11 dB (3.55 x)
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} adc_atten_t;
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/**
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* @brief ADC resolution setting option.
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* @note Only used in single read mode
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*/
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typedef enum {
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#if CONFIG_IDF_TARGET_ESP32
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ADC_WIDTH_BIT_9 = 0, /*!< ADC capture width is 9Bit. */
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ADC_WIDTH_BIT_10 = 1, /*!< ADC capture width is 10Bit. */
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ADC_WIDTH_BIT_11 = 2, /*!< ADC capture width is 11Bit. */
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ADC_WIDTH_BIT_12 = 3, /*!< ADC capture width is 12Bit. */
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#elif SOC_ADC_RTC_MAX_BITWIDTH == 12
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ADC_WIDTH_BIT_12 = 3, /*!< ADC capture width is 12Bit. */
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#elif SOC_ADC_RTC_MAX_BITWIDTH == 13
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ADC_WIDTH_BIT_13 = 4, /*!< ADC capture width is 13Bit. */
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#endif
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ADC_WIDTH_MAX,
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} adc_bits_width_t;
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typedef enum {
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ADC_BITWIDTH_DEFAULT = 0, ///< Default ADC output bits, max supported width will be selected
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ADC_BITWIDTH_9 = 9, ///< ADC output width is 9Bit
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ADC_BITWIDTH_10 = 10, ///< ADC output width is 10Bit
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ADC_BITWIDTH_11 = 11, ///< ADC output width is 11Bit
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ADC_BITWIDTH_12 = 12, ///< ADC output width is 12Bit
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ADC_BITWIDTH_13 = 13, ///< ADC output width is 13Bit
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ADC_BITWIDTH_DEFAULT = ADC_BITWIDTH_13, ///< Default ADC output bits, max supported width will be selected
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} adc_bitwidth_t;
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typedef enum {
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ADC_ULP_MODE_FSM = 1, ///< ADC is controlled by ULP FSM
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ADC_ULP_MODE_RISCV = 2, ///< ADC is controlled by ULP RISCV
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} adc_ulp_mode_t;
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/**
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* @brief ADC digital controller (DMA mode) work mode.
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*/
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@@ -80,17 +67,12 @@ typedef enum {
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ADC_CONV_SINGLE_UNIT_2 = 2, ///< Only use ADC2 for conversion
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ADC_CONV_BOTH_UNIT = 3, ///< Use Both ADC1 and ADC2 for conversion simultaneously
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ADC_CONV_ALTER_UNIT = 7, ///< Use both ADC1 and ADC2 for conversion by turn. e.g. ADC1 -> ADC2 -> ADC1 -> ADC2 .....
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ADC_CONV_UNIT_MAX,
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} adc_digi_convert_mode_t;
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/**
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* @brief ADC digital controller (DMA mode) output data format option.
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*/
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typedef enum {
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ADC_DIGI_FORMAT_12BIT __attribute__((deprecated)), /*!<ADC to DMA data format, [15:12]-channel, [11: 0]-12 bits ADC data (`adc_digi_output_data_t`). Note: For single convert mode. */
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ADC_DIGI_FORMAT_11BIT __attribute__((deprecated)), /*!<ADC to DMA data format, [15]-adc unit, [14:11]-channel, [10: 0]-11 bits ADC data (`adc_digi_output_data_t`). Note: For multi or alter convert mode. */
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ADC_DIGI_FORMAT_MAX __attribute__((deprecated)),
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ADC_DIGI_OUTPUT_FORMAT_TYPE1, ///< See `adc_digi_output_data_t.type1`
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ADC_DIGI_OUTPUT_FORMAT_TYPE2, ///< See `adc_digi_output_data_t.type2`
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} adc_digi_output_format_t;
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@@ -128,7 +110,7 @@ typedef struct {
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If (channel < ADC_CHANNEL_MAX), The data is valid.
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If (channel > ADC_CHANNEL_MAX), The data is invalid. */
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uint16_t unit: 1; /*!<ADC unit index info. 0: ADC1; 1: ADC2. */
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} type2; /*!<When the configured output format is 11bit. `ADC_DIGI_FORMAT_11BIT` */
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} type2; /*!<When the configured output format is 11bit.*/
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uint16_t val; /*!<Raw data value */
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};
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} adc_digi_output_data_t;
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@@ -148,7 +130,7 @@ typedef struct {
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If (channel > ADC_CHANNEL_MAX), The data is invalid. */
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uint32_t unit: 1; /*!<ADC unit index info. 0: ADC1; 1: ADC2. */
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uint32_t reserved17_31: 15; /*!<Reserved17. */
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} type2; /*!<When the configured output format is 12bit. `ADC_DIGI_FORMAT_11BIT` */
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} type2; /*!<When the configured output format is 12bit. */
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uint32_t val; /*!<Raw data value */
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};
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} adc_digi_output_data_t;
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@@ -161,142 +143,19 @@ typedef struct {
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typedef struct {
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union {
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struct {
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uint32_t data: 13; /*!<ADC real output data info. Resolution: 13 bit. */
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uint32_t data: 12; /*!<ADC real output data info. Resolution: 12 bit. */
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uint32_t reserved12: 1; /*!<Reserved12. */
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uint32_t channel: 4; /*!<ADC channel index info.
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If (channel < ADC_CHANNEL_MAX), The data is valid.
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If (channel > ADC_CHANNEL_MAX), The data is invalid. */
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uint32_t unit: 1; /*!<ADC unit index info. 0: ADC1; 1: ADC2. */
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uint32_t reserved17_31: 14; /*!<Reserved17. */
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} type2; /*!<When the configured output format is 12bit. `ADC_DIGI_FORMAT_11BIT` */
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} type2; /*!<When the configured output format is 12bit. */
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uint32_t val; /*!<Raw data value */
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};
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} adc_digi_output_data_t;
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#endif
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#if SOC_ADC_FILTER_SUPPORTED
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/*---------------------------------------------------------------
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Filter
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---------------------------------------------------------------*/
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/**
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* @brief ADC digital controller (DMA mode) filter index options.
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*
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* @note For ESP32-S2, The filter object of the ADC is fixed.
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*/
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typedef enum {
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ADC_DIGI_FILTER_IDX0 = 0, /*!<The filter index 0.
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For ESP32-S2, It can only be used to filter all enabled channels of ADC1 unit at the same time. */
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ADC_DIGI_FILTER_IDX1, /*!<The filter index 1.
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For ESP32-S2, It can only be used to filter all enabled channels of ADC2 unit at the same time. */
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ADC_DIGI_FILTER_IDX_MAX
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} adc_digi_filter_idx_t;
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/**
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* @brief ADC digital controller (DMA mode) filter type options.
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* Expression: filter_data = (k-1)/k * last_data + new_data / k.
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*/
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typedef enum {
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#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32C2
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ADC_DIGI_FILTER_DIS = -1, /*!< Disable filter */
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#endif
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ADC_DIGI_FILTER_IIR_2 = 0, /*!<The filter mode is first-order IIR filter. The coefficient is 2. */
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ADC_DIGI_FILTER_IIR_4, /*!<The filter mode is first-order IIR filter. The coefficient is 4. */
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ADC_DIGI_FILTER_IIR_8, /*!<The filter mode is first-order IIR filter. The coefficient is 8. */
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ADC_DIGI_FILTER_IIR_16, /*!<The filter mode is first-order IIR filter. The coefficient is 16. */
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ADC_DIGI_FILTER_IIR_64, /*!<The filter mode is first-order IIR filter. The coefficient is 64. */
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ADC_DIGI_FILTER_IIR_MAX
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} adc_digi_filter_mode_t;
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/**
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* @brief ADC digital controller (DMA mode) filter configuration.
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*
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* @note For ESP32-S2, The filter object of the ADC is fixed.
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* @note For ESP32-S2, The filter object is always all enabled channels.
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*/
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typedef struct {
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adc_unit_t adc_unit; /*!<Set adc unit number for filter.
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For ESP32-S2, Filter IDX0/IDX1 can only be used to filter all enabled channels of ADC1/ADC2 unit at the same time. */
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adc_channel_t channel; /*!<Set adc channel number for filter.
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For ESP32-S2, it's always `ADC_CHANNEL_MAX` */
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adc_digi_filter_mode_t mode;/*!<Set adc filter mode for filter. See ``adc_digi_filter_mode_t``. */
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} adc_digi_filter_t;
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#endif // #if SOC_ADC_FILTER_SUPPORTED
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#if SOC_ADC_MONITOR_SUPPORTED
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/*---------------------------------------------------------------
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Monitor
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---------------------------------------------------------------*/
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/**
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* @brief ADC digital controller (DMA mode) monitor index options.
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*
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* @note For ESP32-S2, The monitor object of the ADC is fixed.
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*/
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typedef enum {
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ADC_DIGI_MONITOR_IDX0 = 0, /*!<The monitor index 0.
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For ESP32-S2, It can only be used to monitor all enabled channels of ADC1 unit at the same time. */
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ADC_DIGI_MONITOR_IDX1, /*!<The monitor index 1.
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For ESP32-S2, It can only be used to monitor all enabled channels of ADC2 unit at the same time. */
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ADC_DIGI_MONITOR_IDX_MAX
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} adc_digi_monitor_idx_t;
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/**
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* @brief Set monitor mode of adc digital controller.
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* MONITOR_HIGH:If ADC_OUT > threshold, Generates monitor interrupt.
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* MONITOR_LOW: If ADC_OUT < threshold, Generates monitor interrupt.
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*/
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typedef enum {
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#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32C2
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ADC_DIGI_MONITOR_DIS = 0, /*!<Disable monitor. */
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ADC_DIGI_MONITOR_EN, /*!<If ADC_OUT < threshold, Generates monitor interrupt. */
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/*!<If ADC_OUT > threshold, Generates monitor interrupt. */
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#else
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ADC_DIGI_MONITOR_HIGH = 0, /*!<If ADC_OUT > threshold, Generates monitor interrupt. */
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ADC_DIGI_MONITOR_LOW, /*!<If ADC_OUT < threshold, Generates monitor interrupt. */
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#endif
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ADC_DIGI_MONITOR_MAX
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} adc_digi_monitor_mode_t;
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/**
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* @brief ADC digital controller (DMA mode) monitor configuration.
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*
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* @note For ESP32-S2, The monitor object of the ADC is fixed.
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* @note For ESP32-S2, The monitor object is always all enabled channels.
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*/
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typedef struct {
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adc_unit_t adc_unit; /*!<Set adc unit number for monitor.
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For ESP32-S2, monitor IDX0/IDX1 can only be used to monitor all enabled channels of ADC1/ADC2 unit at the same time. */
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adc_channel_t channel; /*!<Set adc channel number for monitor.
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For ESP32-S2, it's always `ADC_CHANNEL_MAX` */
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adc_digi_monitor_mode_t mode; /*!<Set adc monitor mode. See ``adc_digi_monitor_mode_t``. */
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#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32C2
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uint32_t h_threshold; /*!<Set monitor threshold of adc digital controller. */
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uint32_t l_threshold; /*!<Set monitor threshold of adc digital controller. */
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#else
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uint32_t threshold; /*!<Set monitor threshold of adc digital controller. */
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#endif
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} adc_digi_monitor_t;
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#endif //#if SOC_ADC_MONITOR_SUPPORTED
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/*---------------------------------------------------------------
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To Be Deprecated TODO: IDF-3610
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---------------------------------------------------------------*/
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#ifdef CONFIG_IDF_TARGET_ESP32
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/**
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* @brief ESP32 ADC DMA source selection.
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*/
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#else
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/**
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* @brief ESP32 ADC DMA source selection.
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*
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* @deprecated Not applicable on ESP32-S2 because ESP32-S2 doesn't use I2S DMA.
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*/
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#endif
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typedef enum {
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ADC_I2S_DATA_SRC_IO_SIG = 0, /*!< I2S data from GPIO matrix signal */
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ADC_I2S_DATA_SRC_ADC = 1, /*!< I2S data from ADC */
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ADC_I2S_DATA_SRC_MAX,
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} adc_i2s_source_t;
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#if CONFIG_IDF_TARGET_ESP32S2
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/**
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* @brief ADC digital controller (DMA mode) clock system setting.
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@@ -48,6 +48,109 @@ typedef struct {
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#endif //#if SOC_ADC_ARBITER_SUPPORTED
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#if SOC_ADC_FILTER_SUPPORTED
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/*---------------------------------------------------------------
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Filter
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---------------------------------------------------------------*/
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/**
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* @brief ADC digital controller (DMA mode) filter index options.
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*
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* @note For ESP32-S2, The filter object of the ADC is fixed.
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*/
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typedef enum {
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ADC_DIGI_FILTER_IDX0 = 0, /*!<The filter index 0.
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For ESP32-S2, It can only be used to filter all enabled channels of ADC1 unit at the same time. */
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ADC_DIGI_FILTER_IDX1, /*!<The filter index 1.
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For ESP32-S2, It can only be used to filter all enabled channels of ADC2 unit at the same time. */
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ADC_DIGI_FILTER_IDX_MAX
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} adc_digi_filter_idx_t;
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/**
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* @brief ADC digital controller (DMA mode) filter type options.
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* Expression: filter_data = (k-1)/k * last_data + new_data / k.
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*/
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typedef enum {
|
||||
#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32C2
|
||||
ADC_DIGI_FILTER_DIS = -1, /*!< Disable filter */
|
||||
#endif
|
||||
ADC_DIGI_FILTER_IIR_2 = 0, /*!<The filter mode is first-order IIR filter. The coefficient is 2. */
|
||||
ADC_DIGI_FILTER_IIR_4, /*!<The filter mode is first-order IIR filter. The coefficient is 4. */
|
||||
ADC_DIGI_FILTER_IIR_8, /*!<The filter mode is first-order IIR filter. The coefficient is 8. */
|
||||
ADC_DIGI_FILTER_IIR_16, /*!<The filter mode is first-order IIR filter. The coefficient is 16. */
|
||||
ADC_DIGI_FILTER_IIR_64, /*!<The filter mode is first-order IIR filter. The coefficient is 64. */
|
||||
ADC_DIGI_FILTER_IIR_MAX
|
||||
} adc_digi_filter_mode_t;
|
||||
|
||||
/**
|
||||
* @brief ADC digital controller (DMA mode) filter configuration.
|
||||
*
|
||||
* @note For ESP32-S2, The filter object of the ADC is fixed.
|
||||
* @note For ESP32-S2, The filter object is always all enabled channels.
|
||||
*/
|
||||
typedef struct {
|
||||
adc_unit_t adc_unit; /*!<Set adc unit number for filter.
|
||||
For ESP32-S2, Filter IDX0/IDX1 can only be used to filter all enabled channels of ADC1/ADC2 unit at the same time. */
|
||||
adc_channel_t channel; /*!<Set adc channel number for filter.
|
||||
For ESP32-S2, it's always `ADC_CHANNEL_MAX` */
|
||||
adc_digi_filter_mode_t mode;/*!<Set adc filter mode for filter. See ``adc_digi_filter_mode_t``. */
|
||||
} adc_digi_filter_t;
|
||||
#endif // #if SOC_ADC_FILTER_SUPPORTED
|
||||
|
||||
#if SOC_ADC_MONITOR_SUPPORTED
|
||||
/*---------------------------------------------------------------
|
||||
Monitor
|
||||
---------------------------------------------------------------*/
|
||||
/**
|
||||
* @brief ADC digital controller (DMA mode) monitor index options.
|
||||
*
|
||||
* @note For ESP32-S2, The monitor object of the ADC is fixed.
|
||||
*/
|
||||
typedef enum {
|
||||
ADC_DIGI_MONITOR_IDX0 = 0, /*!<The monitor index 0.
|
||||
For ESP32-S2, It can only be used to monitor all enabled channels of ADC1 unit at the same time. */
|
||||
ADC_DIGI_MONITOR_IDX1, /*!<The monitor index 1.
|
||||
For ESP32-S2, It can only be used to monitor all enabled channels of ADC2 unit at the same time. */
|
||||
ADC_DIGI_MONITOR_IDX_MAX
|
||||
} adc_digi_monitor_idx_t;
|
||||
|
||||
/**
|
||||
* @brief Set monitor mode of adc digital controller.
|
||||
* MONITOR_HIGH:If ADC_OUT > threshold, Generates monitor interrupt.
|
||||
* MONITOR_LOW: If ADC_OUT < threshold, Generates monitor interrupt.
|
||||
*/
|
||||
typedef enum {
|
||||
#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32C2
|
||||
ADC_DIGI_MONITOR_DIS = 0, /*!<Disable monitor. */
|
||||
ADC_DIGI_MONITOR_EN, /*!<If ADC_OUT < threshold, Generates monitor interrupt. */
|
||||
/*!<If ADC_OUT > threshold, Generates monitor interrupt. */
|
||||
#else
|
||||
ADC_DIGI_MONITOR_HIGH = 0, /*!<If ADC_OUT > threshold, Generates monitor interrupt. */
|
||||
ADC_DIGI_MONITOR_LOW, /*!<If ADC_OUT < threshold, Generates monitor interrupt. */
|
||||
#endif
|
||||
ADC_DIGI_MONITOR_MAX
|
||||
} adc_digi_monitor_mode_t;
|
||||
|
||||
/**
|
||||
* @brief ADC digital controller (DMA mode) monitor configuration.
|
||||
*
|
||||
* @note For ESP32-S2, The monitor object of the ADC is fixed.
|
||||
* @note For ESP32-S2, The monitor object is always all enabled channels.
|
||||
*/
|
||||
typedef struct {
|
||||
adc_unit_t adc_unit; /*!<Set adc unit number for monitor.
|
||||
For ESP32-S2, monitor IDX0/IDX1 can only be used to monitor all enabled channels of ADC1/ADC2 unit at the same time. */
|
||||
adc_channel_t channel; /*!<Set adc channel number for monitor.
|
||||
For ESP32-S2, it's always `ADC_CHANNEL_MAX` */
|
||||
adc_digi_monitor_mode_t mode; /*!<Set adc monitor mode. See ``adc_digi_monitor_mode_t``. */
|
||||
#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32C2
|
||||
uint32_t h_threshold; /*!<Set monitor threshold of adc digital controller. */
|
||||
uint32_t l_threshold; /*!<Set monitor threshold of adc digital controller. */
|
||||
#else
|
||||
uint32_t threshold; /*!<Set monitor threshold of adc digital controller. */
|
||||
#endif
|
||||
} adc_digi_monitor_t;
|
||||
#endif //#if SOC_ADC_MONITOR_SUPPORTED
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
Reference in New Issue
Block a user