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Merge branch 'refactor/rename_h2_to_h4' into 'master'

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esp32h2: renaming esp32h2 to esp32h4

Closes IDF-6098

See merge request espressif/esp-idf!20676
This commit is contained in:
Kevin (Lao Kaiyao)
2022-11-09 19:19:43 +08:00
parent 7c1ed22ba2 8677216576
commit 5bed8fab49
539 changed files with 1679 additions and 2126 deletions
Download Patch File Download Diff File Expand all files Collapse all files
components/bootloader_support/src/bootloader_clock_init.c
+1 -1
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@@ -46,7 +46,7 @@ __attribute__((weak)) void bootloader_clock_configure(void)
clk_ll_cpu_get_freq_mhz_from_pll() == CLK_LL_PLL_240M_FREQ_MHZ) {
cpu_freq_mhz = 240;
}
#elif CONFIG_IDF_TARGET_ESP32H2
#elif CONFIG_IDF_TARGET_ESP32H4
cpu_freq_mhz = 64;
#endif
components/bootloader_support/src/bootloader_console.c
+3 -3
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@@ -22,9 +22,9 @@
#include "esp32c3/rom/uart.h"
#elif CONFIG_IDF_TARGET_ESP32S3
#include "esp32s3/rom/uart.h"
#elif CONFIG_IDF_TARGET_ESP32H2
#include "esp32h2/rom/ets_sys.h"
#include "esp32h2/rom/uart.h"
#elif CONFIG_IDF_TARGET_ESP32H4
#include "esp32h4/rom/ets_sys.h"
#include "esp32h4/rom/uart.h"
#elif CONFIG_IDF_TARGET_ESP32C2
#include "esp32c2/rom/ets_sys.h"
#include "esp32c2/rom/uart.h"
components/bootloader_support/src/bootloader_efuse.c
+1 -1
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@@ -27,7 +27,7 @@ int bootloader_clock_get_rated_freq_mhz(void)
#elif CONFIG_IDF_TARGET_ESP32C3
return 160;
#elif CONFIG_IDF_TARGET_ESP32H2
#elif CONFIG_IDF_TARGET_ESP32H4
return 96;
#elif CONFIG_IDF_TARGET_ESP32C6
components/bootloader_support/src/bootloader_random_esp32h2.c → components/bootloader_support/src/bootloader_random_esp32h4.c
+1 -1
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@@ -12,7 +12,7 @@
#include "soc/system_reg.h"
#include "esp_private/regi2c_ctrl.h"
// ESP32H2-TODO: IDF-3381
// ESP32H4-TODO: IDF-3381
void bootloader_random_enable(void)
{
components/bootloader_support/src/bootloader_utility.c
+6 -6
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@@ -28,12 +28,12 @@
#include "esp32c3/rom/uart.h"
#include "esp32c3/rom/gpio.h"
#include "esp32c3/rom/secure_boot.h"
#elif CONFIG_IDF_TARGET_ESP32H2
#include "esp32h2/rom/efuse.h"
#include "esp32h2/rom/crc.h"
#include "esp32h2/rom/uart.h"
#include "esp32h2/rom/gpio.h"
#include "esp32h2/rom/secure_boot.h"
#elif CONFIG_IDF_TARGET_ESP32H4
#include "esp32h4/rom/efuse.h"
#include "esp32h4/rom/crc.h"
#include "esp32h4/rom/uart.h"
#include "esp32h4/rom/gpio.h"
#include "esp32h4/rom/secure_boot.h"
#elif CONFIG_IDF_TARGET_ESP32C2
#include "esp32c2/rom/efuse.h"
#include "esp32c2/rom/crc.h"
components/bootloader_support/src/esp32h2/bootloader_esp32h2.c → components/bootloader_support/src/esp32h4/bootloader_esp32h4.c
+3 -3
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@@ -25,8 +25,8 @@
#include "soc/extmem_reg.h"
#include "soc/io_mux_reg.h"
#include "soc/system_reg.h"
#include "esp32h2/rom/efuse.h"
#include "esp32h2/rom/ets_sys.h"
#include "esp32h4/rom/efuse.h"
#include "esp32h4/rom/ets_sys.h"
#include "bootloader_common.h"
#include "bootloader_init.h"
#include "bootloader_clock.h"
@@ -38,7 +38,7 @@
#include "hal/mmu_hal.h"
#include "hal/cache_hal.h"
static const char *TAG = "boot.esp32h2";
static const char *TAG = "boot.esp32h4";
void IRAM_ATTR bootloader_configure_spi_pins(int drv)
{
components/bootloader_support/src/esp32h2/bootloader_sha.c → components/bootloader_support/src/esp32h4/bootloader_sha.c
+1 -1
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@@ -9,7 +9,7 @@
#include <assert.h>
#include <sys/param.h>
#include "esp32h2/rom/sha.h"
#include "esp32h4/rom/sha.h"
static SHA_CTX ctx;
components/bootloader_support/src/esp32h2/bootloader_soc.c → components/bootloader_support/src/esp32h4/bootloader_soc.c
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components/bootloader_support/src/esp32h2/flash_encryption_secure_features.c → components/bootloader_support/src/esp32h4/flash_encryption_secure_features.c
View File
components/bootloader_support/src/esp32h2/secure_boot_secure_features.c → components/bootloader_support/src/esp32h4/secure_boot_secure_features.c
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components/bootloader_support/src/esp_image_format.c
+2 -2
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@@ -29,8 +29,8 @@
#include "esp32s3/rom/secure_boot.h"
#elif CONFIG_IDF_TARGET_ESP32C3
#include "esp32c3/rom/secure_boot.h"
#elif CONFIG_IDF_TARGET_ESP32H2
#include "esp32h2/rom/secure_boot.h"
#elif CONFIG_IDF_TARGET_ESP32H4
#include "esp32h4/rom/secure_boot.h"
#elif CONFIG_IDF_TARGET_ESP32C2
#include "esp32c2/rom/rtc.h"
#include "esp32c2/rom/secure_boot.h"
components/bootloader_support/src/flash_encrypt.c
+2 -2
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@@ -142,7 +142,7 @@ esp_flash_enc_mode_t esp_get_flash_encryption_mode(void)
if (dis_dl_enc && dis_dl_icache && dis_dl_dcache) {
mode = ESP_FLASH_ENC_MODE_RELEASE;
}
#elif CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32C6
#elif CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H4 || CONFIG_IDF_TARGET_ESP32C6
bool dis_dl_enc = esp_efuse_read_field_bit(ESP_EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT);
bool dis_dl_icache = esp_efuse_read_field_bit(ESP_EFUSE_DIS_DOWNLOAD_ICACHE);
if (dis_dl_enc && dis_dl_icache) {
@@ -191,7 +191,7 @@ void esp_flash_encryption_set_release_mode(void)
esp_efuse_write_field_bit(ESP_EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT);
esp_efuse_write_field_bit(ESP_EFUSE_DIS_DOWNLOAD_ICACHE);
esp_efuse_write_field_bit(ESP_EFUSE_DIS_DOWNLOAD_DCACHE);
#elif CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32C6
#elif CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H4 || CONFIG_IDF_TARGET_ESP32C6
esp_efuse_write_field_bit(ESP_EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT);
esp_efuse_write_field_bit(ESP_EFUSE_DIS_DOWNLOAD_ICACHE);
#ifdef CONFIG_SOC_FLASH_ENCRYPTION_XTS_AES_128_DERIVED
components/bootloader_support/src/secure_boot_v2/secure_boot.c
+2 -2
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@@ -23,8 +23,8 @@
#include "esp32c3/rom/secure_boot.h"
#elif CONFIG_IDF_TARGET_ESP32S3
#include "esp32s3/rom/secure_boot.h"
#elif CONFIG_IDF_TARGET_ESP32H2
#include "esp32h2/rom/secure_boot.h"
#elif CONFIG_IDF_TARGET_ESP32H4
#include "esp32h4/rom/secure_boot.h"
#elif CONFIG_IDF_TARGET_ESP32C2
#include "esp32c2/rom/secure_boot.h"
#endif
components/bootloader_support/src/secure_boot_v2/secure_boot_signature_priv.h
+2 -2
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@@ -13,8 +13,8 @@
#include "esp32c3/rom/secure_boot.h"
#elif CONFIG_IDF_TARGET_ESP32S3
#include "esp32s3/rom/secure_boot.h"
#elif CONFIG_IDF_TARGET_ESP32H2
#include "esp32h2/rom/secure_boot.h"
#elif CONFIG_IDF_TARGET_ESP32H4
#include "esp32h4/rom/secure_boot.h"
#elif CONFIG_IDF_TARGET_ESP32C2
#include "esp32c2/rom/secure_boot.h"
#endif