adc: fix adc continuous driver conv_frame_size not bigger than 4092 issue
Closes https://github.com/espressif/esp-idf/issues/11385
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@@ -55,7 +55,8 @@ typedef enum adc_hal_dma_desc_status_t {
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*/
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typedef struct adc_hal_dma_config_t {
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void *dev; ///< DMA peripheral address
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uint32_t desc_max_num; ///< Number of the descriptors linked once
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uint32_t eof_desc_num; ///< Number of dma descriptors that is eof
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uint32_t eof_step; ///< Number of linked descriptors that is one eof
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uint32_t dma_chan; ///< DMA channel to be used
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uint32_t eof_num; ///< Bytes between 2 in_suc_eof interrupts
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} adc_hal_dma_config_t;
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@@ -73,7 +74,8 @@ typedef struct adc_hal_dma_ctx_t {
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/**< these need to be configured by `adc_hal_dma_config_t` via driver layer*/
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void *dev; ///< DMA address
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uint32_t desc_max_num; ///< Number of the descriptors linked once
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uint32_t eof_desc_num; ///< Number of dma descriptors that is eof
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uint32_t eof_step; ///< Number of linked descriptors that is one eof
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uint32_t dma_chan; ///< DMA channel to be used
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uint32_t eof_num; ///< Words between 2 in_suc_eof interrupts
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} adc_hal_dma_ctx_t;
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@@ -175,11 +177,12 @@ bool adc_hal_check_event(adc_hal_dma_ctx_t *hal, uint32_t mask);
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*
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* @param hal Context of the HAL
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* @param eof_desc_addr The last descriptor that is finished by HW. Should be got from DMA
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* @param[out] cur_desc The descriptor with ADC reading result (from the 1st one to the last one (``eof_desc_addr``))
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* @param[out] buffer ADC reading result buffer
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* @param[out] len ADC reading result len
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*
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* @return See ``adc_hal_dma_desc_status_t``
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*/
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adc_hal_dma_desc_status_t adc_hal_get_reading_result(adc_hal_dma_ctx_t *hal, const intptr_t eof_desc_addr, dma_descriptor_t **cur_desc);
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adc_hal_dma_desc_status_t adc_hal_get_reading_result(adc_hal_dma_ctx_t *hal, const intptr_t eof_desc_addr, uint8_t **buffer, uint32_t *len);
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/**
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* @brief Clear interrupt
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@@ -36,6 +36,8 @@ ESP_STATIC_ASSERT(sizeof(dma_descriptor_t) == 12, "dma_descriptor_t should occup
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#define DMA_DESCRIPTOR_BUFFER_OWNER_CPU (0) /*!< DMA buffer is allowed to be accessed by CPU */
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#define DMA_DESCRIPTOR_BUFFER_OWNER_DMA (1) /*!< DMA buffer is allowed to be accessed by DMA engine */
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#define DMA_DESCRIPTOR_BUFFER_MAX_SIZE (4095) /*!< Maximum size of the buffer that can be attached to descriptor */
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#define DMA_DESCRIPTOR_BUFFER_MAX_SIZE_4B_ALIGNED (4095-3) /*!< Maximum size of the buffer that can be attached to descriptor, and aligned to 4B */
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#ifdef __cplusplus
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}
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