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pcnt: add pcnt peripheral signal connections

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pcnt: fix bug in clear interrupt status
This commit is contained in:
morris
2020-09-18 17:22:59 +08:00
parent 669331d0c4
commit 74d78148bc
15 changed files with 484 additions and 88 deletions
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components/soc/soc/esp32/CMakeLists.txt
+1
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@@ -2,6 +2,7 @@ add_library(soc_esp32 STATIC
"adc_periph.c"
"dac_periph.c"
"gpio_periph.c"
"pcnt_periph.c"
"rtc_io_periph.c"
"rtc_periph.c"
"sdio_slave_periph.c"
components/soc/soc/esp32/include/soc/soc_caps.h
+2
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@@ -63,6 +63,7 @@
#define SOC_MCPWM_SUPPORTED 1
#define SOC_SDMMC_HOST_SUPPORTED 1
#define SOC_BT_SUPPORTED 1
#define SOC_PCNT_SUPPORTED 1
#define SOC_SDIO_SLAVE_SUPPORTED 1
#define SOC_TWAI_SUPPORTED 1
#define SOC_EMAC_SUPPORTED 1
@@ -155,6 +156,7 @@
// ESP32 have 1 PCNT peripheral
#define SOC_PCNT_PORT_NUM (1)
#define SOC_PCNT_UNIT_NUM (8)
#define SOC_PCNT_UNIT_CHANNEL_NUM (2)
/*-------------------------- RMT CAPS ----------------------------------------*/
#define SOC_RMT_CHANNEL_MEM_WORDS (64) /*!< Each channel owns 64 words memory */
components/soc/soc/esp32/pcnt_periph.c
+119
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@@ -0,0 +1,119 @@
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#include "soc/pcnt_periph.h"
#include "soc/gpio_sig_map.h"
const pcnt_signal_conn_t pcnt_periph_signals = {
.module = PERIPH_PCNT_MODULE,
.irq = ETS_PCNT_INTR_SOURCE,
.units = {
[0] = {
.channels = {
[0] = {
.control_sig = PCNT_CTRL_CH0_IN0_IDX,
.pulse_sig = PCNT_SIG_CH0_IN0_IDX
},
[1] = {
.control_sig = PCNT_CTRL_CH1_IN0_IDX,
.pulse_sig = PCNT_SIG_CH1_IN0_IDX
}
}
},
[1] = {
.channels = {
[0] = {
.control_sig = PCNT_CTRL_CH0_IN1_IDX,
.pulse_sig = PCNT_SIG_CH0_IN1_IDX
},
[1] = {
.control_sig = PCNT_CTRL_CH1_IN1_IDX,
.pulse_sig = PCNT_SIG_CH1_IN1_IDX
}
}
},
[2] = {
.channels = {
[0] = {
.control_sig = PCNT_CTRL_CH0_IN2_IDX,
.pulse_sig = PCNT_SIG_CH0_IN2_IDX
},
[1] = {
.control_sig = PCNT_CTRL_CH1_IN2_IDX,
.pulse_sig = PCNT_SIG_CH1_IN2_IDX
}
}
},
[3] = {
.channels = {
[0] = {
.control_sig = PCNT_CTRL_CH0_IN3_IDX,
.pulse_sig = PCNT_SIG_CH0_IN3_IDX
},
[1] = {
.control_sig = PCNT_CTRL_CH1_IN3_IDX,
.pulse_sig = PCNT_SIG_CH1_IN3_IDX
}
}
},
[4] = {
.channels = {
[0] = {
.control_sig = PCNT_CTRL_CH0_IN4_IDX,
.pulse_sig = PCNT_SIG_CH0_IN4_IDX
},
[1] = {
.control_sig = PCNT_CTRL_CH1_IN4_IDX,
.pulse_sig = PCNT_SIG_CH1_IN4_IDX
}
}
},
[5] = {
.channels = {
[0] = {
.control_sig = PCNT_CTRL_CH0_IN5_IDX,
.pulse_sig = PCNT_SIG_CH0_IN5_IDX
},
[1] = {
.control_sig = PCNT_CTRL_CH1_IN5_IDX,
.pulse_sig = PCNT_SIG_CH1_IN5_IDX
}
}
},
[6] = {
.channels = {
[0] = {
.control_sig = PCNT_CTRL_CH0_IN6_IDX,
.pulse_sig = PCNT_SIG_CH0_IN6_IDX
},
[1] = {
.control_sig = PCNT_CTRL_CH1_IN6_IDX,
.pulse_sig = PCNT_SIG_CH1_IN6_IDX
}
}
},
[7] = {
.channels = {
[0] = {
.control_sig = PCNT_CTRL_CH0_IN7_IDX,
.pulse_sig = PCNT_SIG_CH0_IN7_IDX
},
[1] = {
.control_sig = PCNT_CTRL_CH1_IN7_IDX,
.pulse_sig = PCNT_SIG_CH1_IN7_IDX
}
}
}
}
};
components/soc/soc/esp32s2/CMakeLists.txt
+1
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@@ -2,6 +2,7 @@ add_library(soc_esp32s2 STATIC
"adc_periph.c"
"dac_periph.c"
"gpio_periph.c"
"pcnt_periph.c"
"rtc_io_periph.c"
"rtc_periph.c"
"interrupts.c"
components/soc/soc/esp32s2/include/soc/soc_caps.h
+2
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@@ -43,6 +43,7 @@
#define SOC_SUPPORTS_SECURE_DL_MODE 1
#define SOC_RISCV_COPROC_SUPPORTED 1
#define SOC_USB_SUPPORTED 1
#define SOC_PCNT_SUPPORTED 1
#define SOC_CACHE_SUPPORT_WRAP 1
@@ -132,6 +133,7 @@
// ESP32-S2 have 1 PCNT peripheral
#define SOC_PCNT_PORT_NUM (1)
#define SOC_PCNT_UNIT_NUM (4) // ESP32-S2 only have 4 unit
#define SOC_PCNT_UNIT_CHANNEL_NUM (2)
/*-------------------------- RMT CAPS ----------------------------------------*/
#define SOC_RMT_CHANNEL_MEM_WORDS (64) /*!< Each channel owns 64 words memory (1 word = 4 Bytes) */
components/soc/soc/esp32s2/pcnt_periph.c
+71
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@@ -0,0 +1,71 @@
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#include "soc/pcnt_periph.h"
#include "soc/gpio_sig_map.h"
const pcnt_signal_conn_t pcnt_periph_signals = {
.module = PERIPH_PCNT_MODULE,
.irq = ETS_PCNT_INTR_SOURCE,
.units = {
[0] = {
.channels = {
[0] = {
.control_sig = PCNT_CTRL_CH0_IN0_IDX,
.pulse_sig = PCNT_SIG_CH0_IN0_IDX
},
[1] = {
.control_sig = PCNT_CTRL_CH1_IN0_IDX,
.pulse_sig = PCNT_SIG_CH1_IN0_IDX
}
}
},
[1] = {
.channels = {
[0] = {
.control_sig = PCNT_CTRL_CH0_IN1_IDX,
.pulse_sig = PCNT_SIG_CH0_IN1_IDX
},
[1] = {
.control_sig = PCNT_CTRL_CH1_IN1_IDX,
.pulse_sig = PCNT_SIG_CH1_IN1_IDX
}
}
},
[2] = {
.channels = {
[0] = {
.control_sig = PCNT_CTRL_CH0_IN2_IDX,
.pulse_sig = PCNT_SIG_CH0_IN2_IDX
},
[1] = {
.control_sig = PCNT_CTRL_CH1_IN2_IDX,
.pulse_sig = PCNT_SIG_CH1_IN2_IDX
}
}
},
[3] = {
.channels = {
[0] = {
.control_sig = PCNT_CTRL_CH0_IN3_IDX,
.pulse_sig = PCNT_SIG_CH0_IN3_IDX
},
[1] = {
.control_sig = PCNT_CTRL_CH1_IN3_IDX,
.pulse_sig = PCNT_SIG_CH1_IN3_IDX
}
}
}
}
};
components/soc/soc/esp32s3/CMakeLists.txt
+1
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@@ -6,6 +6,7 @@ add_library(soc_esp32s3 STATIC
"i2s_periph.c"
"interrupts.c"
"ledc_periph.c"
"pcnt_periph.c"
"rtc_io_periph.c"
"rtc_periph.c"
"sdio_slave_periph.c"
components/soc/soc/esp32s3/include/soc/pcnt_caps.h
-26
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@@ -1,26 +0,0 @@
// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#pragma once
#ifdef __cplusplus
extern "C" {
#endif
#define SOC_PCNT_PORT_NUM (1)
#define SOC_PCNT_UNIT_NUM (4)
#ifdef __cplusplus
}
#endif
components/soc/soc/esp32s3/include/soc/soc_caps.h
+4 -1
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@@ -6,6 +6,7 @@
#pragma once
/*-------------------------- COMMON CAPS ---------------------------------------*/
#define SOC_PCNT_SUPPORTED 1
#define SOC_TWAI_SUPPORTED 1
#define SOC_GDMA_SUPPORTED 1
#define SOC_CPU_CORES_NUM 2
@@ -42,7 +43,9 @@
#include "mpu_caps.h"
/*-------------------------- PCNT CAPS ---------------------------------------*/
#include "pcnt_caps.h"
#define SOC_PCNT_PORT_NUM (1)
#define SOC_PCNT_UNIT_NUM (4)
#define SOC_PCNT_UNIT_CHANNEL_NUM (2)
/*-------------------------- RMT CAPS ----------------------------------------*/
#include "rmt_caps.h"
components/soc/soc/esp32s3/pcnt_periph.c
+71
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@@ -0,0 +1,71 @@
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#include "soc/pcnt_periph.h"
#include "soc/gpio_sig_map.h"
const pcnt_signal_conn_t pcnt_periph_signals = {
.module = PERIPH_PCNT_MODULE,
.irq = ETS_PCNT_INTR_SOURCE,
.units = {
[0] = {
.channels = {
[0] = {
.control_sig = PCNT_CTRL_CH0_IN0_IDX,
.pulse_sig = PCNT_SIG_CH0_IN0_IDX
},
[1] = {
.control_sig = PCNT_CTRL_CH1_IN0_IDX,
.pulse_sig = PCNT_SIG_CH1_IN0_IDX
}
}
},
[1] = {
.channels = {
[0] = {
.control_sig = PCNT_CTRL_CH0_IN1_IDX,
.pulse_sig = PCNT_SIG_CH0_IN1_IDX
},
[1] = {
.control_sig = PCNT_CTRL_CH1_IN1_IDX,
.pulse_sig = PCNT_SIG_CH1_IN1_IDX
}
}
},
[2] = {
.channels = {
[0] = {
.control_sig = PCNT_CTRL_CH0_IN2_IDX,
.pulse_sig = PCNT_SIG_CH0_IN2_IDX
},
[1] = {
.control_sig = PCNT_CTRL_CH1_IN2_IDX,
.pulse_sig = PCNT_SIG_CH1_IN2_IDX
}
}
},
[3] = {
.channels = {
[0] = {
.control_sig = PCNT_CTRL_CH0_IN3_IDX,
.pulse_sig = PCNT_SIG_CH0_IN3_IDX
},
[1] = {
.control_sig = PCNT_CTRL_CH1_IN3_IDX,
.pulse_sig = PCNT_SIG_CH1_IN3_IDX
}
}
}
}
};
components/soc/soc/include/soc/pcnt_periph.h
+25
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@@ -13,5 +13,30 @@
// limitations under the License.
#pragma once
#include <stdint.h>
#include "soc/soc_caps.h"
#include "soc/periph_defs.h"
#include "soc/pcnt_reg.h"
#include "soc/pcnt_struct.h"
#ifdef __cplusplus
extern "C" {
#endif
typedef struct {
struct {
struct {
const uint32_t pulse_sig;
const uint32_t control_sig;
} channels[SOC_PCNT_UNIT_CHANNEL_NUM];
} units[SOC_PCNT_UNIT_NUM];
const uint32_t irq;
const periph_module_t module;
} pcnt_signal_conn_t;
extern const pcnt_signal_conn_t pcnt_periph_signals;
#ifdef __cplusplus
}
#endif