diff --git a/components/bootloader_support/src/bootloader_random_esp32c5.c b/components/bootloader_support/src/bootloader_random_esp32c5.c
index 15c2314413..826aa785ee 100644
--- a/components/bootloader_support/src/bootloader_random_esp32c5.c
+++ b/components/bootloader_support/src/bootloader_random_esp32c5.c
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2024-2026 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -8,6 +8,7 @@
 #include "hal/regi2c_ctrl_ll.h"
 #include "hal/adc_ll.h"
 #include "hal/adc_types.h"
+#include "hal/rng_ll.h"
 #include "esp_private/regi2c_ctrl.h"
 #include "soc/lpperi_reg.h"
 
@@ -51,9 +52,9 @@ void bootloader_random_enable(void)
     adc_ll_digi_set_trigger_interval(200);
     adc_ll_digi_trigger_enable();
 
-    SET_PERI_REG_MASK(LPPERI_RNG_CFG_REG, LPPERI_RNG_SAMPLE_ENABLE);
-    REG_SET_FIELD(LPPERI_RNG_CFG_REG, LPPERI_RTC_TIMER_EN, 0x3);
-    SET_PERI_REG_MASK(LPPERI_RNG_CFG_REG, LPPERI_RNG_TIMER_EN);
+    rng_ll_enable_sample(true);
+    rng_ll_enable_rtc_timer(true);
+    rng_ll_enable_rng_timer(true);
 }
 
 void bootloader_random_disable(void)
diff --git a/components/esp_hw_support/hw_random.c b/components/esp_hw_support/hw_random.c
index f451189ff0..49992019c9 100644
--- a/components/esp_hw_support/hw_random.c
+++ b/components/esp_hw_support/hw_random.c
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2016-2025 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2016-2026 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -25,6 +25,9 @@
 
 #if SOC_RNG_CLOCK_IS_INDEPENDENT
 #include "hal/lp_clkrst_ll.h"
+#if SOC_RNG_BUF_CHAIN_ENTROPY_SOURCE || SOC_RNG_RTC_TIMER_ENTROPY_SOURCE
+#include "hal/rng_ll.h"
+#endif
 #endif
 
 #if defined CONFIG_IDF_TARGET_ESP32S3
@@ -106,15 +109,10 @@ void esp_fill_random(void *buf, size_t len)
 #if SOC_RNG_CLOCK_IS_INDEPENDENT && !ESP_TEE_BUILD
 ESP_SYSTEM_INIT_FN(init_rng, SECONDARY, BIT(0), 102)
 {
+#if SOC_RNG_BUF_CHAIN_ENTROPY_SOURCE || SOC_RNG_RTC_TIMER_ENTROPY_SOURCE
+    rng_ll_enable();
+#else
     _lp_clkrst_ll_enable_rng_clock(true);
-#if SOC_RNG_BUF_CHAIN_ENTROPY_SOURCE
-    SET_PERI_REG_MASK(LPPERI_RNG_CFG_REG, LPPERI_RNG_SAMPLE_ENABLE);
-#endif
-
-#if SOC_RNG_RTC_TIMER_ENTROPY_SOURCE
-    // This would only be effective if the RTC clock is enabled
-    REG_SET_FIELD(LPPERI_RNG_CFG_REG, LPPERI_RTC_TIMER_EN, 0x3);
-    SET_PERI_REG_MASK(LPPERI_RNG_CFG_REG, LPPERI_RNG_TIMER_EN);
 #endif
     return ESP_OK;
 }
diff --git a/components/esp_hw_support/sleep_modes.c b/components/esp_hw_support/sleep_modes.c
index 1b60c5f05d..163d7cabd5 100644
--- a/components/esp_hw_support/sleep_modes.c
+++ b/components/esp_hw_support/sleep_modes.c
@@ -40,6 +40,10 @@
 #include "hal/rtc_io_hal.h"
 #include "hal/clk_tree_hal.h"
 
+#if __has_include("hal/rng_ll.h")
+#include "hal/rng_ll.h"
+#endif
+
 #if SOC_SLEEP_SYSTIMER_STALL_WORKAROUND
 #include "hal/systimer_ll.h"
 #endif
@@ -810,6 +814,13 @@ static SLEEP_FN_ATTR void misc_modules_wake_prepare(uint32_t sleep_flags)
 #if SOC_TEMPERATURE_SENSOR_SUPPORT_SLEEP_RETENTION
     regi2c_tsens_reg_write();
 #endif
+#if RNG_LL_DEPENDS_ON_LP_PERIPH
+    if (sleep_flags & PMU_SLEEP_PD_LP_PERIPH) {
+        // Re-enable the RNG module.
+        rng_ll_reset();
+        rng_ll_enable();
+    }
+#endif
 }
 
 static SLEEP_FN_ATTR void sleep_low_power_clock_calibration(bool is_dslp)
@@ -2738,9 +2749,6 @@ static SLEEP_FN_ATTR uint32_t get_power_down_flags(void)
         // TOP power domain depends on the RTC_PERIPH power domain on ESP32C6, RTC_PERIPH should only be disabled when the TOP domain is down.
         pd_flags &= ~RTC_SLEEP_PD_RTC_PERIPH;
     }
-#elif CONFIG_IDF_TARGET_ESP32C5
-    // TODO: [ESP32C5] PM-642 RNG module depends on LP PERIPH domain, force it on temporary.
-    pd_flags &= ~RTC_SLEEP_PD_RTC_PERIPH;
 #endif
     return pd_flags;
 }
diff --git a/components/esp_hw_support/test_apps/esp_hw_support_unity_tests/main/test_random.c b/components/esp_hw_support/test_apps/esp_hw_support_unity_tests/main/test_random.c
index bd9ed24fd5..264dc4859a 100644
--- a/components/esp_hw_support/test_apps/esp_hw_support_unity_tests/main/test_random.c
+++ b/components/esp_hw_support/test_apps/esp_hw_support_unity_tests/main/test_random.c
@@ -5,9 +5,20 @@
  */
 #include <stdio.h>
 #include <string.h>
+#include <math.h>
+#include <inttypes.h>
+#include "sdkconfig.h"
+#include "soc/soc_caps.h"
 #include "unity.h"
 #include "esp_random.h"
 
+#if SOC_LIGHT_SLEEP_SUPPORTED
+#include "esp_sleep.h"
+#include "esp_private/esp_sleep_internal.h"
+#include "esp_private/sleep_cpu.h"
+#include "esp_private/esp_pmu.h"
+#endif
+
 /* Note: these are just sanity tests, not the same as
    entropy tests
 */
@@ -69,3 +80,57 @@ TEST_CASE("call esp_fill_random()", "[random]")
         TEST_ASSERT_EQUAL_HEX8(0xFF, one_buf[x]);
     }
 }
+
+TEST_CASE("verify esp_random() bit balance 0/1 ratio", "[random]")
+{
+#if SOC_LIGHT_SLEEP_SUPPORTED
+    esp_sleep_context_t sleep_ctx;
+    esp_sleep_set_sleep_context(&sleep_ctx);
+    printf("go to light sleep for 1 seconds\r\n");
+#if ESP_SLEEP_POWER_DOWN_CPU
+    TEST_ESP_OK(sleep_cpu_configure(true));
+#endif
+    TEST_ESP_OK(esp_sleep_enable_timer_wakeup(1 * 1000 * 1000));
+    TEST_ESP_OK(esp_light_sleep_start());
+#if CONFIG_PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP && !SOC_PM_TOP_PD_NOT_ALLOWED
+    // check if the power domain also is powered down
+    TEST_ASSERT_EQUAL(PMU_SLEEP_PD_TOP, (sleep_ctx.sleep_flags) & PMU_SLEEP_PD_TOP);
+#endif
+    esp_sleep_set_sleep_context(NULL);
+    printf("Waked up! Let's see if esp_random can still work correctly...\r\n");
+#if ESP_SLEEP_POWER_DOWN_CPU
+    TEST_ESP_OK(sleep_cpu_configure(false));
+#endif
+#endif
+
+    const size_t NUM_RANDOM = 50000; /* Need enough samples for statistical significance */
+    const float EXPECTED_RATIO = 0.5f; /* Expected ratio of 1s */
+    const float TOLERANCE = 0.01f; /* Allow 1% deviation (49%-51%) */
+    uint32_t bit_counts[32] = {0}; /* Count of 1s for each bit position */
+    /* Collect random numbers and count 1s in each bit position */
+    for (int i = 0; i < NUM_RANDOM; i++) {
+        uint32_t r = esp_random();
+        for (int bit = 0; bit < 32; bit++) {
+            if (r & (1U << bit)) {
+                bit_counts[bit]++;
+            }
+        }
+    }
+    /* Verify each bit position has approximately 50% ones */
+    printf("\nBit balance statistics (total samples: %zu):\n", NUM_RANDOM);
+    printf("Bit | 1s count | 0s count | 1s ratio | 0s ratio | Deviation\n");
+    printf("----|----------|----------|----------|----------|----------\n");
+    for (int bit = 0; bit < 32; bit++) {
+        uint32_t ones_count = bit_counts[bit];
+        uint32_t zeros_count = NUM_RANDOM - ones_count;
+        float ratio_ones = (float)ones_count / NUM_RANDOM;
+        float ratio_zeros = (float)zeros_count / NUM_RANDOM;
+        float deviation = fabs(ratio_ones - EXPECTED_RATIO);
+
+        printf("%3d | %8" PRIu32 " | %8" PRIu32 " | %8.4f | %8.4f | %9.4f\n",
+               bit, ones_count, zeros_count, ratio_ones, ratio_zeros, deviation);
+
+        /* Check if ratio is within tolerance */
+        TEST_ASSERT_LESS_THAN_FLOAT(TOLERANCE, deviation);
+    }
+}
diff --git a/components/esp_hw_support/test_apps/esp_hw_support_unity_tests/sdkconfig.ci.release b/components/esp_hw_support/test_apps/esp_hw_support_unity_tests/sdkconfig.ci.release
index 8b0a31a9bc..c7a5959d40 100644
--- a/components/esp_hw_support/test_apps/esp_hw_support_unity_tests/sdkconfig.ci.release
+++ b/components/esp_hw_support/test_apps/esp_hw_support_unity_tests/sdkconfig.ci.release
@@ -4,3 +4,5 @@ CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_SIZE=y
 
 # we can silent the assertion to save the binary footprint
 CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_SILENT=y
+
+CONFIG_PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP=y
diff --git a/components/esp_hw_support/test_apps/esp_hw_support_unity_tests/sdkconfig.defaults b/components/esp_hw_support/test_apps/esp_hw_support_unity_tests/sdkconfig.defaults
index cc85282c55..c8801945ed 100644
--- a/components/esp_hw_support/test_apps/esp_hw_support_unity_tests/sdkconfig.defaults
+++ b/components/esp_hw_support/test_apps/esp_hw_support_unity_tests/sdkconfig.defaults
@@ -6,3 +6,6 @@ CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_SIZE=y
 
 # we can silent the assertion to save the binary footprint
 CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_SILENT=y
+
+# primitives for checking sleep internal state
+CONFIG_ESP_SLEEP_DEBUG=y
diff --git a/components/hal/esp32c5/include/hal/rng_ll.h b/components/hal/esp32c5/include/hal/rng_ll.h
new file mode 100644
index 0000000000..f930c7c8d0
--- /dev/null
+++ b/components/hal/esp32c5/include/hal/rng_ll.h
@@ -0,0 +1,88 @@
+/*
+ * SPDX-FileCopyrightText: 2026 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include <stdbool.h>
+#include <stdint.h>
+#include "soc/lpperi_struct.h"
+#include "hal/lp_clkrst_ll.h"
+
+#define RNG_LL_DEPENDS_ON_LP_PERIPH 1
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Enable or disable RNG sampling.
+ *
+ * @param enable True to enable, False to disable
+ */
+static inline void rng_ll_enable_sample(bool enable)
+{
+    LPPERI.rng_cfg.rng_sample_enable = enable;
+}
+
+/**
+ * @brief Enable or disable rng xor rtc timer.
+ *
+ * @param enable True to enable, False to disable
+ */
+static inline void rng_ll_enable_rtc_timer(bool enable)
+{
+    LPPERI.rng_cfg.rtc_timer_en = enable ? 0x3 : 0x0;
+}
+
+/**
+ * @brief Enable or disable rng xor async rng timer.
+ *
+ * @param enable True to enable, False to disable
+ */
+static inline void rng_ll_enable_rng_timer(bool enable)
+{
+    LPPERI.rng_cfg.rng_timer_en = enable;
+}
+
+/**
+ * @brief Reset RNG.
+ */
+static inline void rng_ll_reset(void)
+{
+    LPPERI.reset_en.lp_rng_reset_en = 1;
+    LPPERI.reset_en.lp_rng_reset_en = 0;
+}
+
+/**
+ * @brief Enable RNG module
+ *
+ * TODO: unify in rng_hal.c
+ */
+static inline void rng_ll_enable(void)
+{
+    _lp_clkrst_ll_enable_rng_clock(true);
+    rng_ll_enable_sample(true);
+    rng_ll_enable_rtc_timer(true);
+    rng_ll_enable_rng_timer(true);
+}
+
+/**
+ * @brief Disable RNG module
+ *
+ * TODO: unify in rng_hal.c
+ */
+static inline void rng_ll_disable(void)
+{
+    rng_ll_enable_sample(false);
+    rng_ll_enable_rtc_timer(false);
+    rng_ll_enable_rng_timer(false);
+    _lp_clkrst_ll_enable_rng_clock(false);
+}
+
+
+#ifdef __cplusplus
+}
+#endif