Merge branch 'bringup/esp32h2_light_sleep_for_rebase' into 'master'

esp32h2: support light_sleep

Closes IDF-6266 and IDF-7359

See merge request espressif/esp-idf!23567

components/bootloader_support/src/bootloader_random.c

@@ -8,7 +8,7 @@
 #include "esp_cpu.h"
 #include "soc/wdev_reg.h"
 
-#if defined CONFIG_IDF_TARGET_ESP32C6
+#if SOC_LP_TIMER_SUPPORTED
 #include "hal/lp_timer_hal.h"
 #endif
 
@@ -34,20 +34,6 @@
   #define RNG_CPU_WAIT_CYCLE_NUM (80 * 23) /* 45 KHz reading frequency is the maximum we have tested so far on S3 */
 #endif
 
-#if defined CONFIG_IDF_TARGET_ESP32H2
-
-// TODO: temporary definition until IDF-6270 is implemented
-#include "soc/lp_timer_reg.h"
-
-static inline uint32_t lp_timer_hal_get_cycle_count(void)
-{
-    REG_SET_BIT(LP_TIMER_UPDATE_REG, LP_TIMER_MAIN_TIMER_UPDATE);
-
-    uint32_t lo = REG_GET_FIELD(LP_TIMER_MAIN_BUF0_LOW_REG, LP_TIMER_MAIN_TIMER_BUF0_LOW);
-    return lo;
-}
-#endif
-
  __attribute__((weak)) void bootloader_fill_random(void *buffer, size_t length)
 {
     uint8_t *buffer_bytes = (uint8_t *)buffer;
@@ -57,7 +43,7 @@ static inline uint32_t lp_timer_hal_get_cycle_count(void)
     assert(buffer != NULL);
 
     for (size_t i = 0; i < length; i++) {
-#if (defined CONFIG_IDF_TARGET_ESP32C6 || defined CONFIG_IDF_TARGET_ESP32H2)
+#if SOC_LP_TIMER_SUPPORTED
         random = REG_READ(WDEV_RND_REG);
         start = esp_cpu_get_cycle_count();
         do {

components/bootloader_support/src/esp32h2/bootloader_esp32h2.c

@@ -86,7 +86,6 @@ static void bootloader_super_wdt_auto_feed(void)
 
 static inline void bootloader_hardware_init(void)
 {
-    // TODO: IDF-6267
     /* Enable analog i2c master clock */
     SET_PERI_REG_MASK(MODEM_LPCON_CLK_CONF_REG, MODEM_LPCON_CLK_I2C_MST_EN);
 }