spi_flash: Building a framework to enable HPM when flash works under high speed mode

components/bootloader_support/bootloader_flash/include/bootloader_flash.h

@@ -1,10 +1,11 @@
 /*
- * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
 #pragma once
 
+#include <stdint.h>
 #include <esp_err.h>
 #include <esp_spi_flash.h> /* including in bootloader for error values */
 #include "sdkconfig.h"

components/bootloader_support/bootloader_flash/include/bootloader_flash_override.h

@@ -1,10 +1,11 @@
 /*
- * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
 #pragma once
 
+#include <stdint.h>
 #include "esp_err.h"
 #include "esp_attr.h"
 
@@ -40,6 +41,13 @@ unsigned bootloader_read_status_8b_rdsr(void);
  */
 unsigned bootloader_read_status_8b_rdsr2(void);
 
+/**
+ * @brief Read 8 bit status (third byte) using RDSR3 command
+ *
+ * @return Value of SR3
+ */
+unsigned bootloader_read_status_8b_rdsr3(void);
+
 /**
  * @brief Read 16 bit status using RDSR & RDSR2 (low and high bytes)
  *
@@ -57,6 +65,11 @@ void bootloader_write_status_8b_wrsr(unsigned new_status);
  */
 void bootloader_write_status_8b_wrsr2(unsigned new_status);
 
+/**
+ * @brief Write 8 bit status (third byte) using WRSR3.
+ */
+void bootloader_write_status_8b_wrsr3(unsigned new_status);
+
 /**
  * @brief Write 16 bit status using WRSR, (both write SR1 and SR2)
  */

components/bootloader_support/bootloader_flash/include/bootloader_flash_priv.h

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -28,10 +28,12 @@ extern "C" {
 #define CMD_RDID       0x9F
 #define CMD_WRSR       0x01
 #define CMD_WRSR2      0x31 /* Not all SPI flash uses this command */
+#define CMD_WRSR3      0x11 /* Not all SPI flash uses this command */
 #define CMD_WREN       0x06
 #define CMD_WRDI       0x04
 #define CMD_RDSR       0x05
 #define CMD_RDSR2      0x35 /* Not all SPI flash uses this command */
+#define CMD_RDSR3      0x15 /* Not all SPI flash uses this command */
 #define CMD_OTPEN      0x3A /* Enable OTP mode, not all SPI flash uses this command */
 #define CMD_RDSFDP     0x5A /* Read the SFDP of the flash */
 #define CMD_WRAP       0x77 /* Set burst with wrap command */

components/bootloader_support/bootloader_flash/src/bootloader_flash.c

@@ -509,7 +509,7 @@ esp_err_t IRAM_ATTR __attribute__((weak)) bootloader_flash_unlock(void)
     return err;
 }
 
-IRAM_ATTR static uint32_t bootloader_flash_execute_command_common(
+IRAM_ATTR uint32_t bootloader_flash_execute_command_common(
     uint8_t command,
     uint32_t addr_len, uint32_t address,
     uint8_t dummy_len,

components/bootloader_support/bootloader_flash/src/flash_qio_mode.c

@@ -165,6 +165,11 @@ unsigned bootloader_read_status_8b_rdsr2(void)
     return bootloader_execute_flash_command(CMD_RDSR2, 0, 0, 8);
 }
 
+unsigned bootloader_read_status_8b_rdsr3(void)
+{
+    return bootloader_execute_flash_command(CMD_RDSR3, 0, 0, 8);
+}
+
 unsigned bootloader_read_status_16b_rdsr_rdsr2(void)
 {
     return bootloader_execute_flash_command(CMD_RDSR, 0, 0, 8) | (bootloader_execute_flash_command(CMD_RDSR2, 0, 0, 8) << 8);
@@ -180,6 +185,11 @@ void bootloader_write_status_8b_wrsr2(unsigned new_status)
     bootloader_execute_flash_command(CMD_WRSR2, new_status, 8, 0);
 }
 
+void bootloader_write_status_8b_wrsr3(unsigned new_status)
+{
+    bootloader_execute_flash_command(CMD_WRSR3, new_status, 8, 0);
+}
+
 void bootloader_write_status_16b_wrsr(unsigned new_status)
 {
     bootloader_execute_flash_command(CMD_WRSR, new_status, 16, 0);