From 877b9a171a8e81d9b76ea5280a7c31179d20d3d6 Mon Sep 17 00:00:00 2001 From: yinqingzhao Date: Tue, 30 Dec 2025 15:10:57 +0800 Subject: [PATCH] feat(rom): add esp32c61 eco4 ld files --- components/esp_rom/CMakeLists.txt | 4 +- .../esp_rom/esp32c61/ld/esp32c61.rom.eco4.ld | 369 ++++++++++++++++++ 2 files changed, 372 insertions(+), 1 deletion(-) create mode 100644 components/esp_rom/esp32c61/ld/esp32c61.rom.eco4.ld diff --git a/components/esp_rom/CMakeLists.txt b/components/esp_rom/CMakeLists.txt index 00833ec22f..9be2ca49b7 100644 --- a/components/esp_rom/CMakeLists.txt +++ b/components/esp_rom/CMakeLists.txt @@ -332,9 +332,11 @@ else() # Regular app build rom_linker_script("coexist") rom_linker_script("net80211") rom_linker_script("pp") + if(CONFIG_ESP32C61_REV_MIN_FULL GREATER_EQUAL 101) + rom_linker_script("eco4") + endif() endif() - if(CONFIG_ESP_ROM_HAS_NEWLIB AND NOT target STREQUAL "esp32" AND NOT target STREQUAL "esp32s2") # ESP32 and S2 are a bit different, keep them as special cases in the target specific include section if(CONFIG_ESP32P4_REV_MIN_300) # TODO: IDF-13410 diff --git a/components/esp_rom/esp32c61/ld/esp32c61.rom.eco4.ld b/components/esp_rom/esp32c61/ld/esp32c61.rom.eco4.ld new file mode 100644 index 0000000000..64e4b6ade8 --- /dev/null +++ b/components/esp_rom/esp32c61/ld/esp32c61.rom.eco4.ld @@ -0,0 +1,369 @@ +/* + * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/*************************************** + eco4 fixed + ***************************************/ + +coex_core_timer_idx_get = 0x40000a54; +coex_status_get = 0x40000a74; +ieee80211_encap_esfbuf = 0x40000ac8; +ieee80211_set_tx_desc = 0x40000ad8; +sta_input = 0x40000b3c; +sta_rx_eapol = 0x40000b40; +sta_reset_beacon_timeout = 0x40000b44; +hal_mac_tx_set_ppdu = 0x40000b74; +ic_mac_deinit = 0x40000be8; +ic_mac_init = 0x40000bec; +lmacTxFrame = 0x40000c40; +lmacDisableTransmit = 0x40000c44; +pm_check_state = 0x40000cb4; +pm_set_beacon_filter = 0x40000cd8; +pm_is_in_wifi_slice_threshold = 0x40000cdc; +pm_keep_alive = 0x40000ce4; +pm_process_tim = 0x40000d14; +pm_tbtt_process = 0x40000d28; +pm_tx_data_process = 0x40000d44; +pm_twt_process = 0x40000d54; +pm_mac_try_enable_modem_state = 0x40000d68; +pm_update_next_tbtt = 0x40000d70; +pm_clear_wakeup_signal = 0x40000d78; +pm_mac_disable_tsf_tbtt_soc_wakeup = 0x40000d7c; +pm_mac_disable_tsf_tbtt_modem_wakeup = 0x40000d80; +pm_mac_enable_tsf_tbtt_soc_wakeup = 0x40000d84; +pm_mac_enable_tsf_tbtt_modem_wakeup = 0x40000d88; +pm_mac_modem_params_rt_update = 0x40000d8c; +pm_coex_pwr_update = 0x40000d9c; +ppMapTxQueue = 0x40000ddc; +ppProcTxSecFrame = 0x40000de0; +ppProcessTxQ = 0x40000de8; +ppRxFragmentProc = 0x40000e00; +ppRxPkt = 0x40000e04; +ppRxProtoProc = 0x40000e08; +ppProcessLifeTime = 0x40000e54; +rcGetSched = 0x40000eb4; +wDev_ProcessRxSucData = 0x40000f54; +pm_get_tbtt_count = 0x400014c8; +pm_beacon_offset_check = 0x40001564; +pm_beacon_offset_get_average = 0x40001568; +pm_beacon_offset_get_expect = 0x4000156c; +pm_beacon_offset_get_params = 0x40001570; +pm_enable_max_idle_timer = 0x40001578; + +phy_get_rc_dout = 0x40001058; +phy_rc_cal = 0x4000105c; +phy_abs_temp = 0x40001060; +phy_set_chan_cal_interp = 0x40001064; +phy_loopback_mode_en = 0x40001068; +phy_get_data_sat = 0x4000106c; +phy_byte_to_word = 0x40001070; +phy_bb_bss_cbw40 = 0x40001074; +phy_set_chan_reg = 0x40001078; +phy_i2c_master_reset = 0x4000107c; +phy_chan14_mic_enable = 0x40001080; +phy_chan14_mic_cfg = 0x40001084; +phy_freq_module_resetn = 0x40001088; +phy_freq_chan_en_sw = 0x4000108c; +phy_write_chan_freq = 0x40001090; +phy_get_freq_mem_param = 0x40001094; +phy_get_freq_mem_addr = 0x40001098; +phy_wr_rf_freq_mem = 0x4000109c; +phy_read_rf_freq_mem = 0x400010a0; +phy_freq_i2c_mem_write = 0x400010a4; +phy_freq_reg_init = 0x400010a8; +phy_freq_num_get_data = 0x400010ac; +phy_freq_i2c_num_addr = 0x400010b0; +phy_freq_i2c_write_set = 0x400010b4; +phy_pll_dac_mem_update = 0x400010b8; +phy_pll_cap_mem_update = 0x400010bc; +phy_en_hw_set_freq = 0x400010d4; +phy_dis_hw_set_freq = 0x400010d8; +phy_wait_freq_set_busy = 0x400010dc; +phy_set_chan_freq_sw_start = 0x400010e0; +phy_wait_i2c_sdm_stable = 0x400010e4; +phy_reg_init = 0x400010e8; +phy_xpd_rf = 0x400010ec; +phy_get_mac_addr = 0x400010f4; +phy_set_mac_data = 0x400010f8; +phy_rfcal_data_sub = 0x400010fc; +phy_rf_cal_data_recovery = 0x40001100; +phy_rf_cal_data_backup = 0x40001104; +phy_rfcal_data_check = 0x40001108; +phy_pwdet_reg_init = 0x4000110c; +phy_pwdet_sar2_init = 0x40001110; +phy_en_pwdet = 0x40001114; +phy_get_sar_sig_ref = 0x40001118; +phy_pwdet_tone_start = 0x4000111c; +phy_get_tone_sar_dout = 0x40001120; +phy_get_fm_sar_dout = 0x40001124; +phy_txtone_linear_pwr = 0x40001128; +phy_linear_to_db = 0x4000112c; +phy_get_power_db = 0x40001130; +phy_meas_tone_pwr_db = 0x40001134; +phy_pwdet_wait_idle = 0x40001138; +phy_pkdet_vol_start = 0x4000113c; +phy_read_sar_dout = 0x40001140; +phy_read_sar2_code = 0x40001144; +phy_get_sar2_vol = 0x40001148; +phy_get_pll_vol = 0x4000114c; +phy_tx_pwctrl_bg_init = 0x40001150; +phy_set_most_tpw = 0x40001154; +phy_get_most_tpw = 0x40001158; +phy_tx_state_out = 0x4000115c; +phy_ant_dft_cfg = 0x40001160; +phy_ant_wifitx_cfg = 0x40001164; +phy_ant_wifirx_cfg = 0x40001168; +phy_ant_bttx_cfg = 0x4000116c; +phy_ant_btrx_cfg = 0x40001170; +phy_chan_dump_cfg = 0x40001174; +phy_enable_low_rate = 0x40001178; +phy_disable_low_rate = 0x4000117c; +phy_is_low_rate_enabled = 0x40001180; +phy_dig_reg_backup = 0x40001184; +phy_chan_filt_set = 0x40001188; +phy_rx11blr_cfg = 0x4000118c; +phy_set_cca = 0x40001190; +phy_set_rx_sense = 0x40001194; +phy_rx_gain_force = 0x40001198; +phy_mhz2ieee = 0x4000119c; +phy_chan_to_freq = 0x400011a0; +phy_restart_cal = 0x400011a4; +phy_write_rfpll_sdm = 0x400011a8; +phy_wait_rfpll_cal_end = 0x400011ac; +phy_rfpll_set_freq = 0x400011b0; +phy_set_rf_freq_offset = 0x400011b4; +phy_set_rfpll_freq = 0x400011b8; +phy_set_channel_rfpll_freq = 0x400011bc; +phy_rfpll_cap_correct = 0x400011c0; +phy_rfpll_cap_init_cal = 0x400011c4; +phy_set_freq = 0x400011c8; +phy_write_pll_cap = 0x400011cc; +phy_read_pll_cap = 0x400011d0; +phy_chip_set_chan_misc = 0x400011d4; +phy_freq_set_reg = 0x400011d8; +phy_rfpll_chgp_cal = 0x400011dc; +phy_gen_rx_gain_table = 0x400011e0; +phy_get_rxbb_dc = 0x400011e4; +phy_wr_rx_gain_mem = 0x400011e8; +phy_rfpll_cap_track = 0x400011ec; +phy_txpwr_correct = 0x400011f4; +phy_txpwr_cal_track = 0x400011f8; +phy_bt_track_tx_power = 0x400011fc; +phy_wifi_track_tx_power = 0x40001200; +phy_bt_txdc_cal = 0x40001204; +phy_bt_txiq_cal = 0x40001208; +phy_txdc_cal_pwdet = 0x4000120c; +phy_txdc_cal = 0x40001210; +phy_txiq_get_mis_pwr = 0x40001214; +phy_txiq_cover = 0x40001218; +phy_rfcal_txiq = 0x4000121c; +phy_get_power_atten = 0x40001220; +phy_pwdet_ref_code = 0x40001224; +phy_pwdet_code_cal = 0x40001228; +phy_rfcal_txcap = 0x4000122c; +phy_rfcal_pwrctrl = 0x40001234; +phy_tx_pwctrl_init_cal = 0x40001238; +phy_i2c_enter_critical_ = 0x40001244; +phy_i2c_exit_critical_ = 0x40001248; +phy_i2c_clk_sel = 0x4000124c; +phy_get_i2c_read_mask_ = 0x40001250; +phy_get_i2c_mst0_mask = 0x40001254; +phy_get_i2c_hostid_ = 0x40001258; +phy_chip_i2c_readReg_org = 0x4000125c; +phy_chip_i2c_readReg = 0x40001260; +phy_i2c_paral_set_mst0 = 0x40001264; +phy_i2c_paral_set_read = 0x40001268; +phy_i2c_paral_read = 0x4000126c; +phy_i2c_paral_write = 0x40001270; +phy_i2c_paral_write_num = 0x40001274; +phy_i2c_paral_write_mask = 0x40001278; +phy_i2c_readReg = 0x4000127c; +phy_chip_i2c_writeReg = 0x40001280; +phy_i2c_writeReg = 0x40001284; +phy_i2c_readReg_Mask = 0x40001288; +phy_i2c_writeReg_Mask = 0x4000128c; +phy_set_txcap_reg = 0x40001290; +phy_i2c_sar2_init_code = 0x40001294; +phy_filter_dcap_set = 0x4000129c; +phy_i2c_rc_cal_set = 0x400012ac; +phy_i2c_bbpll_set = 0x400012b0; +phy_adc_rate_set = 0x400012b4; +phy_dac_rate_set = 0x400012b8; +phy_encode_i2c_master = 0x400012bc; +phy_i2c_master_fill = 0x400012c0; +phy_i2c_master_mem_txcap = 0x400012c4; +phy_pbus_force_mode = 0x400012d0; +phy_pbus_rd_addr = 0x400012d4; +phy_pbus_rd_shift = 0x400012d8; +phy_pbus_force_test = 0x400012dc; +phy_pbus_rd = 0x400012e0; +phy_pbus_debugmode = 0x400012e4; +phy_pbus_workmode = 0x400012e8; +phy_pbus_set_rxgain = 0x400012ec; +phy_pbus_xpd_rx_off = 0x400012f0; +phy_pbus_xpd_rx_on = 0x400012f4; +phy_pbus_xpd_tx_off = 0x400012f8; +phy_pbus_xpd_tx_on = 0x400012fc; +phy_pbus_set_dco = 0x40001300; +phy_set_loopback_gain = 0x40001304; +phy_txcal_debuge_mode_ = 0x40001308; +phy_txcal_work_mode = 0x4000130c; +phy_pbus_clear_reg = 0x40001310; +phy_save_pbus_reg = 0x40001314; +phy_write_pbus_mem = 0x40001318; +phy_set_pbus_mem = 0x4000131c; +phy_disable_agc = 0x40001320; +phy_enable_agc = 0x40001324; +phy_disable_cca = 0x40001328; +phy_enable_cca = 0x4000132c; +phy_write_gain_mem = 0x40001330; +phy_bb_bss_cbw40_dig = 0x40001334; +phy_mac_tx_chan_offset = 0x40001338; +phy_rx_11b_opt = 0x4000133c; +phy_tx_paon_set = 0x40001340; +phy_i2cmst_reg_init = 0x40001344; +phy_bt_gain_offset = 0x40001348; +phy_fe_reg_init = 0x4000134c; +phy_mac_enable_bb = 0x40001350; +phy_bb_wdg_cfg = 0x40001354; +phy_fe_txrx_reset = 0x40001358; +phy_set_rx_comp_ = 0x4000135c; +phy_agc_reg_init = 0x40001360; +phy_btbb_wifi_bb_cfg2 = 0x40001364; +phy_bb_reg_init = 0x40001368; +phy_open_i2c_xpd = 0x4000136c; +phy_force_txrx_off = 0x40001370; +phy_txiq_set_reg = 0x40001374; +phy_rxiq_set_reg = 0x40001378; +phy_set_txclk_en = 0x4000137c; +phy_set_rxclk_en = 0x40001380; +phy_start_tx_tone_step = 0x40001384; +phy_stop_tx_tone = 0x40001388; +phy_bb_wdg_test_en = 0x4000138c; +phy_noise_floor_auto_set = 0x40001390; +phy_read_hw_noisefloor = 0x40001394; +phy_iq_corr_enable = 0x40001398; +phy_wifi_agc_sat_gain = 0x4000139c; +phy_bbpll_cal = 0x400013a0; +phy_ant_init = 0x400013a4; +phy_wifi_fbw_sel = 0x400013a8; +phy_bt_filter_reg = 0x400013ac; +phy_rx_sense_set = 0x400013b0; +phy_tx_state_set = 0x400013b4; +phy_close_pa = 0x400013b8; +phy_freq_correct = 0x400013bc; +phy_set_pbus_reg = 0x400013c0; +phy_wifi_rifs_mode_en = 0x400013c4; +phy_nrx_freq_set = 0x400013c8; +phy_fe_adc_on = 0x400013cc; +phy_force_pwr_index = 0x400013d0; +phy_fft_scale_force = 0x400013d4; +phy_force_rx_gain = 0x400013d8; +phy_wifi_enable_set = 0x400013dc; +phy_bb_wdt_rst_enable = 0x400013e0; +phy_bb_wdt_int_enable = 0x400013e4; +phy_bb_wdt_timeout_clear = 0x400013e8; +phy_bb_wdt_get_status = 0x400013ec; +phy_iq_est_enable = 0x400013f0; +phy_iq_est_disable = 0x400013f4; +phy_dc_iq_est = 0x400013f8; +phy_set_cal_rxdc = 0x400013fc; +phy_rxiq_get_mis = 0x40001400; +phy_rxiq_cover_mg_mp = 0x40001404; +phy_rfcal_rxiq = 0x40001408; +phy_get_rfcal_rxiq_data = 0x4000140c; +phy_get_dco_comp = 0x40001410; +phy_pbus_rx_dco_cal = 0x40001414; +phy_rxdc_est_min = 0x40001418; +phy_pbus_rx_dco_cal_1step = 0x4000141c; +phy_get_iq_value = 0x40001420; +phy_set_lb_txiq = 0x40001424; +phy_set_rx_gain_cal_iq = 0x40001428; +phy_set_rx_gain_cal_dc = 0x4000142c; +phy_spur_reg_write_one_tone = 0x40001430; +phy_spur_cal = 0x40001434; +phy_spur_coef_cfg = 0x40001438; +phy_bb_gain_index = 0x4000143c; +phy_rfrx_gain_index = 0x40001440; +phy_set_tsens_power_ = 0x40001444; +phy_set_tsens_range_ = 0x40001448; +phy_get_tsens_value_ = 0x4000144c; +phy_tsens_read_init = 0x40001450; +phy_code_to_temp = 0x40001454; +phy_tsens_dac_to_index = 0x40001458; +phy_tsens_dac_cal = 0x4000145c; +phy_tsens_code_read = 0x40001460; +phy_tsens_temp_read = 0x40001464; +phy_tsens_temp_read_local = 0x40001468; +phy_temp_to_power = 0x4000146c; +phy_txbbgain_to_index = 0x40001470; +phy_index_to_txbbgain = 0x40001474; +phy_bt_index_to_bb = 0x40001478; +phy_bt_bb_to_index = 0x4000147c; +phy_bt_get_tx_gain = 0x40001480; +phy_dig_gain_check = 0x40001484; +phy_wifi_get_tx_gain = 0x40001488; +phy_wifi_11g_rate_chg = 0x4000148c; +phy_set_tx_gain_mem = 0x40001490; +phy_get_rate_fcc_index = 0x40001494; +phy_get_chan_target_power = 0x40001498; +phy_get_tx_gain_value = 0x4000149c; +phy_wifi_get_target_power = 0x400014a0; +phy_wifi_get_tx_tab_ = 0x400014a4; +phy_wifi_set_tx_gain = 0x400014a8; +phy_bt_get_tx_tab_ = 0x400014ac; +phy_bt_set_tx_gain = 0x400014b0; +phy_rate_to_index = 0x400014b8; +phy_get_target_pwr = 0x400014bc; +phy_get_max_pwr = 0x400014c0; +phy_get_pwr_index = 0x400014c4; +phy_chip_set_chan_ana = 0x400014d4; +phy_get_romfuncs = 0x400014d8; + +/*************************************** + eco4 newly added + ***************************************/ + +/* Data (.data, .bss, .rodata) */ +s_offchan_tx_progress_in_ptr = 0x4084fc5c; + + +/* Functions */ +phy_bb_agc_reg_update = 0x4000157c; +phy_bb_cbw_chan_cfg = 0x40001580; +phy_bb_cfo_cfg = 0x40001584; +phy_bb_dcmem_clr = 0x40001588; +phy_bbpll_recal = 0x4000158c; +phy_bbtx_outfilter = 0x40001590; +phy_csidump_force_lltf_cfg = 0x40001594; +phy_dac_scale_set = 0x40001598; +phy_dcode_cal_init = 0x4000159c; +phy_fe_reg_update = 0x400015a0; +phy_freq_band_reg_set = 0x400015a4; +phy_get_cca = 0x400015a8; +phy_get_cca_cnt = 0x400015ac; +phy_get_dreg1p6 = 0x400015b0; +phy_get_noise_floor = 0x400015b4; +phy_get_oc_dr1 = 0x400015b8; +phy_get_rssi = 0x400015bc; +phy_get_rx_sig_pwr = 0x400015c0; +phy_get_txiq_set = 0x400015c4; +phy_get_xtal_duty = 0x400015c8; +phy_hemu_ru26_good_res = 0x400015cc; +phy_i2c_txrate_init = 0x400015d0; +phy_lltf_mask_en = 0x400015d4; +phy_open_fe_bb_clk = 0x400015d8; +phy_reset_ckgen = 0x400015dc; +phy_rx_filter_mode = 0x400015e0; +phy_set_bb_wdg = 0x400015e4; +phy_set_cca_cnt = 0x400015e8; +phy_set_channel_dcode = 0x400015ec; +phy_set_ext_dcode = 0x400015f0; +phy_set_freq_i2c_ = 0x400015f4; +phy_sifs_reg_init = 0x400015f8; +phy_txgain_comp_pacfg = 0x400015fc; +phy_txpwr_track_slow = 0x40001600; +phy_vht_support = 0x40001604;