Merge branch 'feature/enable_flash_encryption_for_esp32h21' into 'master'
feat: enable flash encryption support for esp32h21 Closes IDF-11499 See merge request espressif/esp-idf!36440
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@@ -55,7 +55,7 @@ esp_err_t esp_flash_encryption_enable_secure_features(void)
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// esp32h2 has DIS_ICACHE. Write-protection bit = 2.
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// List of eFuses with the same write protection bit:
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// DIS_ICACHE, DIS_USB_JTAG, POWERGLITCH_EN, DIS_FORCE_DOWNLOAD, SPI_DOWNLOAD_MSPI_DIS,
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// DIS_TWAI, JTAG_SEL_ENABLE, DIS_PAD_JTAG, DIS_DOWNLOAD_MANUAL_ENCRYPT
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// DIS_TWAI, JTAG_SEL_ENABLE, DIS_PAD_JTAG, DIS_DOWNLOAD_MANUAL_ENCRYPT, DIS_USB_SERIAL_JTAG
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esp_efuse_write_field_bit(ESP_EFUSE_WR_DIS_DIS_ICACHE);
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#endif
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@@ -1,5 +1,5 @@
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/*
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* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@@ -16,7 +16,37 @@ static __attribute__((unused)) const char *TAG = "flash_encrypt";
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esp_err_t esp_flash_encryption_enable_secure_features(void)
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{
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//TODO: [ESP32H21] IDF-11499
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abort();
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#ifndef CONFIG_SECURE_FLASH_UART_BOOTLOADER_ALLOW_ENC
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ESP_LOGI(TAG, "Disable UART bootloader encryption...");
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esp_efuse_write_field_bit(ESP_EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT);
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#else
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ESP_LOGW(TAG, "Not disabling UART bootloader encryption");
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#endif
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#ifndef CONFIG_SECURE_BOOT_ALLOW_JTAG
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ESP_LOGI(TAG, "Disable JTAG...");
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esp_efuse_write_field_bit(ESP_EFUSE_DIS_PAD_JTAG);
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esp_efuse_write_field_bit(ESP_EFUSE_DIS_USB_JTAG);
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#else
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ESP_LOGW(TAG, "Not disabling JTAG - SECURITY COMPROMISED");
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#endif
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esp_efuse_write_field_bit(ESP_EFUSE_DIS_DIRECT_BOOT);
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#if defined(CONFIG_SECURE_BOOT_V2_ENABLED) && !defined(CONFIG_SECURE_BOOT_V2_ALLOW_EFUSE_RD_DIS)
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// This bit is set when enabling Secure Boot V2, but we can't enable it until this later point in the first boot
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// otherwise the Flash Encryption key cannot be read protected
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esp_efuse_write_field_bit(ESP_EFUSE_WR_DIS_RD_DIS);
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#endif
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#ifndef CONFIG_SECURE_FLASH_SKIP_WRITE_PROTECTION_CACHE
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// Set write-protection for DIS_ICACHE to prevent bricking chip in case it will be set accidentally.
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// esp32h21 has DIS_ICACHE. Write-protection bit = 2.
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// List of eFuses with the same write protection bit:
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// DIS_ICACHE, DIS_USB_JTAG, POWERGLITCH_EN, DIS_FORCE_DOWNLOAD, SPI_DOWNLOAD_MSPI_DIS,
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// DIS_TWAI, JTAG_SEL_ENABLE, DIS_PAD_JTAG, DIS_DOWNLOAD_MANUAL_ENCRYPT, DIS_USB_SERIAL_JTAG
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esp_efuse_write_field_bit(ESP_EFUSE_WR_DIS_DIS_ICACHE);
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#endif
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return ESP_OK;
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}
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