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feat(mmu): support mmu and flash mmap driver on p4

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This commit is contained in:
Armando
2023-08-14 13:58:35 +08:00
parent d97b3fec67
commit 8c8affc812
17 changed files with 327 additions and 226 deletions
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components/esp_mm/port/esp32p4/ext_mem_layout.c
+4 -4
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@@ -18,17 +18,17 @@ const mmu_mem_region_t g_mmu_mem_regions[SOC_MMU_LINEAR_ADDRESS_REGION_NUM] = {
[0] = {
.start = SOC_MMU_FLASH_LINEAR_ADDRESS_LOW,
.end = SOC_MMU_FLASH_LINEAR_ADDRESS_HIGH,
.size = SOC_MMU_FLASH_LINEAR_ADDRESS_SIZE,
.size = BUS_SIZE(SOC_MMU_FLASH_LINEAR),
.bus_id = CACHE_BUS_IBUS0 | CACHE_BUS_DBUS0,
.targets = MMU_TARGET_FLASH0,
.caps = MMU_MEM_CAP_FLASH | MMU_MEM_CAP_EXEC | MMU_MEM_CAP_READ | MMU_MEM_CAP_32BIT | MMU_MEM_CAP_8BIT,
.caps = MMU_MEM_CAP_EXEC | MMU_MEM_CAP_READ | MMU_MEM_CAP_WRITE | MMU_MEM_CAP_32BIT | MMU_MEM_CAP_8BIT,
},
[1] = {
.start = SOC_MMU_PSRAM_LINEAR_ADDRESS_LOW,
.end = SOC_MMU_PSRAM_LINEAR_ADDRESS_HIGH,
.size = SOC_MMU_PSRAM_LINEAR_ADDRESS_SIZE,
.size = BUS_SIZE(SOC_MMU_PSRAM_LINEAR),
.bus_id = CACHE_BUS_IBUS1 | CACHE_BUS_DBUS1,
.targets = MMU_TARGET_PSRAM0,
.caps = MMU_MEM_CAP_PSRAM | MMU_MEM_CAP_EXEC | MMU_MEM_CAP_READ | MMU_MEM_CAP_32BIT | MMU_MEM_CAP_8BIT,
.caps = MMU_MEM_CAP_EXEC | MMU_MEM_CAP_READ | MMU_MEM_CAP_WRITE | MMU_MEM_CAP_32BIT | MMU_MEM_CAP_8BIT,
},
};