pioduino/esp-idf
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

feat(lp-core): bringup lp-core for C5 MP

Browse Source 
LP-Core is now able to boot and run on C5 MP chip.
This commit is contained in:
Marius Vikhammer
2024-06-14 17:39:57 +08:00
parent 0479494e7a
commit aae3aa5e5f
15 changed files with 113 additions and 27 deletions
Download Patch File Download Diff File Expand all files Collapse all files
examples/system/.build-test-rules.yml
+3 -2
View File
@@ -259,13 +259,14 @@ examples/system/task_watchdog:
examples/system/ulp/lp_core/gpio:
enable:
- if: SOC_LP_CORE_SUPPORTED == 1
- if: (SOC_LP_CORE_SUPPORTED == 1) and (SOC_RTCIO_PIN_COUNT > 0)
depends_components:
- ulp
examples/system/ulp/lp_core/gpio_intr_pulse_counter:
enable:
- if: SOC_LP_CORE_SUPPORTED == 1
- if: (SOC_LP_CORE_SUPPORTED == 1) and (SOC_ULP_LP_UART_SUPPORTED == 1)
depends_components:
- ulp
examples/system/ulp/lp_core/interrupt/README.md
+2 -2
View File
@@ -1,5 +1,5 @@
| Supported Targets | ESP32-C6 | ESP32-P4 |
| ----------------- | -------- | -------- |
| Supported Targets | ESP32-C5 | ESP32-C6 | ESP32-P4 |
| ----------------- | -------- | -------- | -------- |
# LP-Core example with interrupt triggered from HP-Core: