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feat(uart): spilt LP and HP uart set_baudrate function

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gaoxu
2023-09-26 17:42:03 +08:00
parent 4f24f805cc
commit bc2a6bd730
17 changed files with 155 additions and 119 deletions
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components/hal/esp32s2/include/hal/uart_ll.h
+2 -6
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@@ -11,7 +11,6 @@
#pragma once
#include <stdlib.h>
#include "hal/assert.h"
#include "hal/misc.h"
#include "hal/uart_types.h"
#include "soc/uart_reg.h"
@@ -65,7 +64,6 @@ typedef enum {
*/
FORCE_INLINE_ATTR bool uart_ll_is_enabled(uint32_t uart_num)
{
HAL_ASSERT(uart_num < SOC_UART_HP_NUM);
uint32_t uart_rst_bit = ((uart_num == 0) ? DPORT_UART_RST :
(uart_num == 1) ? DPORT_UART1_RST : 0);
uint32_t uart_en_bit = ((uart_num == 0) ? DPORT_UART_CLK_EN :
@@ -82,8 +80,7 @@ FORCE_INLINE_ATTR bool uart_ll_is_enabled(uint32_t uart_num)
static inline void uart_ll_enable_bus_clock(uart_port_t uart_num, bool enable)
{
uint32_t reg_val = READ_PERI_REG(DPORT_PERIP_CLK_EN0_REG);
switch (uart_num)
{
switch (uart_num) {
case 0:
reg_val = reg_val & (~DPORT_UART_CLK_EN);
reg_val = reg_val | (enable << DPORT_UART_CLK_EN_S);
@@ -106,8 +103,7 @@ static inline void uart_ll_enable_bus_clock(uart_port_t uart_num, bool enable)
*/
static inline void uart_ll_reset_register(uart_port_t uart_num)
{
switch (uart_num)
{
switch (uart_num) {
case 0:
DPORT_SET_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, DPORT_UART_RST);
DPORT_CLEAR_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, DPORT_UART_RST);