feat(dsi): split the dphy config clock and pll reference clock

this is a breaking change in the esp32p4 ver3.0 silicon.
This commit is contained in:
morris
2025-09-08 18:57:46 +08:00
parent bad5f3b446
commit be2b6efadc
25 changed files with 487 additions and 211 deletions
@@ -143,15 +143,6 @@ void mipi_dsi_hal_host_gen_write_short_packet(mipi_dsi_hal_context_t *hal, uint8
void mipi_dsi_hal_host_gen_read_short_packet(mipi_dsi_hal_context_t *hal, uint8_t vc,
mipi_dsi_data_type_t dt, uint16_t header_data, void *ret_buffer, uint16_t buffer_size);
/**
* @brief Set DPI color coding
*
* @param hal Pointer to the HAL driver context
* @param color_coding Color coding
* @param sub_config Sub configuration
*/
void mipi_dsi_hal_host_dpi_set_color_coding(mipi_dsi_hal_context_t *hal, lcd_color_format_t color_coding, uint32_t sub_config);
/**
* @brief Set horizontal timing parameters for DPI
*
+12 -3
View File
@@ -9,6 +9,7 @@
#include <stdint.h>
#include "soc/clk_tree_defs.h"
#include "esp_assert.h"
#include "soc/soc_caps.h"
#ifdef __cplusplus
extern "C" {
@@ -58,17 +59,25 @@ typedef enum {
} mipi_dsi_pattern_type_t;
#if SOC_MIPI_DSI_SUPPORTED
/**
* @brief MIPI DSI PHY clock source
* @brief MIPI DSI PHY PLL reference clock source
*/
typedef soc_periph_mipi_dsi_phy_clk_src_t mipi_dsi_phy_clock_source_t;
typedef soc_periph_mipi_dsi_phy_pllref_clk_src_t mipi_dsi_phy_pllref_clock_source_t;
/**
* @brief MIPI DSI DPI clock source
*/
typedef soc_periph_mipi_dsi_dpi_clk_src_t mipi_dsi_dpi_clock_source_t;
/**
* @brief For backward compatibility
*/
typedef mipi_dsi_phy_pllref_clock_source_t mipi_dsi_phy_clock_source_t;
#else
typedef int mipi_dsi_phy_clock_source_t;
typedef int mipi_dsi_phy_pllref_clock_source_t;
typedef int mipi_dsi_dpi_clock_source_t;
#endif // SOC_MIPI_DSI_SUPPORTED