pioduino/esp-idf
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

Merge branch 'docs/update_cn_trans_ulp-risc-v_bootloader' into 'master'

Browse Source 
Docs: update CN translation for ulp-risc-v.rst and bootloader.rst

Closes DOC-5159

See merge request espressif/esp-idf!23644
This commit is contained in:
morris
2023-05-10 11:33:27 +08:00
parent bc7a7e8451 83d6754f8b
commit c176e05ae2
4 changed files with 21 additions and 14 deletions
Download Patch File Download Diff File Expand all files Collapse all files
docs/en/api-reference/system/ulp-risc-v.rst
+5 -5
View File
@@ -1,4 +1,4 @@
ULP RISC-V Coprocessor programming
ULP RISC-V Coprocessor Programming
==================================
:link_to_translation:`zh_CN:[中文]`
@@ -33,7 +33,7 @@ To compile the ULP RISC-V code as part of the component, the following steps mus
ulp_embed_binary(${ulp_app_name} "${ulp_sources}" "${ulp_exp_dep_srcs}")
The first argument to ``ulp_embed_binary`` specifies the ULP binary name. The name specified here will also be used by other generated artifacts such as the ELF file, map file, header file and linker export file. The second argument specifies the ULP source files. Finally, the third argument specifies the list of component source files which include the header file to be generated. This list is needed to build the dependencies correctly and ensure that the generated header file will be created before any of these files are compiled. See the section below for the concept of generated header files for ULP applications.
The first argument to ``ulp_embed_binary`` specifies the ULP binary name. The name specified here will also be used by other generated artifacts such as the ELF file, map file, header file, and linker export file. The second argument specifies the ULP source files. Finally, the third argument specifies the list of component source files which include the header file to be generated. This list is needed to build the dependencies correctly and ensure that the generated header file will be created before any of these files are compiled. See the section below for the concept of generated header files for ULP applications.
3. Build the application as usual (e.g., `idf.py app`).
@@ -68,7 +68,7 @@ For example, the ULP RISC-V program may define a variable ``measurement_count``
int some_function()
{
//read the measurement count for use it later.
//read the measurement count for later use.
int temp = measurement_count;
...do something.
@@ -138,7 +138,7 @@ Once the program is loaded into RTC memory, the application can start it by call
ULP RISC-V Program Flow
-----------------------
{IDF_TARGET_RTC_CLK_FRE:default="150kHz", esp32s2="90kHz", esp32s3="136kHz"}
{IDF_TARGET_RTC_CLK_FRE:default="150 kHz", esp32s2="90 kHz", esp32s3="136 kHz"}
The ULP RISC-V coprocessor is started by a timer. The timer is started once :cpp:func:`ulp_riscv_run` is called. The timer counts the number of RTC_SLOW_CLK ticks (by default, produced by an internal {IDF_TARGET_RTC_CLK_FRE} RC oscillator). The number of ticks is set using ``RTC_CNTL_ULP_CP_TIMER_1_REG`` register. When starting the ULP, ``RTC_CNTL_ULP_CP_TIMER_1_REG`` will be used to set the number of timer ticks.
@@ -201,7 +201,7 @@ Application Examples
* ULP RISC-V Coprocessor polls GPIO while main CPU is in deep sleep: :example:`system/ulp_riscv/gpio`.
* ULP RISC-V Coprocessor uses bit-banged UART driver to print: :example:`system/ulp_riscv/uart_print`.
* ULP RISC-V Coprocessor reads external temperature sensor while main CPU is in deep sleep: :example:`system/ulp_riscv/ds18b20_onewire`.
* ULP RISC-V Coprocessor reads external I2C temperature and humidity sensor (BMP180) while the main CPU is in deep sleep and wakes up the main CPU once a threshold is met: :example:`system/ulp_riscv/i2c`.
* ULP RISC-V Coprocessor reads external I2C temperature and humidity sensor (BMP180) while the main CPU is in Deep-sleep and wakes up the main CPU once a threshold is met: :example:`system/ulp_riscv/i2c`.
API Reference
-------------