feat(doc): Update the WDT article
Closes https://github.com/espressif/esp-idf/issues/12995
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@@ -10,6 +10,7 @@ ESP-IDF supports multiple types of watchdogs:
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.. list::
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- Hardware Watchdog Timers
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- Interrupt Watchdog Timer (IWDT)
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- Task Watchdog Timer (TWDT)
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:SOC_XT_WDT_SUPPORTED: - XTAL32K Watchdog Timer (Crystal 32K Watchdog Timer, i.e., XTWDT)
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@@ -18,6 +19,32 @@ The Interrupt Watchdog is responsible for ensuring that ISRs (Interrupt Service
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The various watchdog timers can be enabled using the :ref:`project-configuration-menu`. However, the TWDT can also be enabled during runtime.
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.. _app-hardware-watchdog-timers:
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Hardware Watchdog Timers
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------------------------
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The chips have two groups of watchdog timers:
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.. list::
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:not esp32c2: - Main System Watchdog Timer (``MWDT_WDT``) - used by Interrupt Watchdog Timer (``IWDT``) and Task Watchdog Timer (TWDT).
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:esp32c2: - Main System Watchdog Timer (``MWDT_WDT``) - used by Interrupt Watchdog Timer (``IWDT``).
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- RTC Watchdog Timer (``RTC_WDT``) - used to track the boot time from power-up until the user's main function (by default RTC Watchdog is disabled immediately before the user's main function).
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Refer to the :ref:`bootloader-watchdog` section to understand how watchdogs are utilized in the bootloader.
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The app's behaviour can be adjusted so the RTC Watchdog remains enabled after app startup. The Watchdog would need to be explicitly reset (i.e., fed) or disabled by the app to avoid the chip reset. To do this, set the :ref:`CONFIG_BOOTLOADER_WDT_DISABLE_IN_USER_CODE` option, modify the app as needed, and then recompile the app. In this case, the following APIs should be used:
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.. list::
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- :cpp:func:`wdt_hal_disable`, see :ref:`hw-abstraction-hal-layer-disable-rtc-wdt`,
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- :cpp:func:`wdt_hal_feed`, see :ref:`hw-abstraction-hal-layer-feed-rtc-wdt`,
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:esp32 or esp32s2: - :cpp:func:`rtc_wdt_feed`,
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:esp32 or esp32s2: - :cpp:func:`rtc_wdt_disable`.
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If ``RTC_WDT`` is not reset/disabled in time, the chip will be automatically reset. See :ref:`RTC-Watchdog-Timeout` for more information.
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Interrupt Watchdog Timer (IWDT)
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-------------------------------
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@@ -29,7 +56,7 @@ The purpose of the IWDT is to ensure that interrupt service routines (ISRs) are
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- Critical Sections (also disables interrupts)
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- Other same/higher priority ISRs which block same/lower priority ISRs from running
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The IWDT utilizes the watchdog timer in {IDF_TARGET_IWDT_TIMER_GROUP} as its underlying hardware timer and leverages the FreeRTOS tick interrupt on each CPU to feed the watchdog timer. If the tick interrupt on a particular CPU is not run at within the IWDT timeout period, it is indicative that something is blocking ISRs from being run on that CPU (see the list of reasons above).
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The IWDT utilizes the ``MWDT_WDT`` watchdog timer in {IDF_TARGET_IWDT_TIMER_GROUP} as its underlying hardware timer and leverages the FreeRTOS tick interrupt on each CPU to feed the watchdog timer. If the tick interrupt on a particular CPU is not run at within the IWDT timeout period, it is indicative that something is blocking ISRs from being run on that CPU (see the list of reasons above).
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When the IWDT times out, the default action is to invoke the panic handler and display the panic reason as ``Interrupt wdt timeout on CPU0`` or ``Interrupt wdt timeout on CPU1`` (as applicable). Depending on the panic handler's configured behavior (see :ref:`CONFIG_ESP_SYSTEM_PANIC`), users can then debug the source of the IWDT timeout (via the backtrace, OpenOCD, gdbstub etc) or simply reset the chip (which may be preferred in a production environment).
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@@ -63,7 +90,7 @@ The Task Watchdog Timer (TWDT) is used to monitor particular tasks, ensuring tha
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.. only:: not esp32c2
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The TWDT is built around the Hardware Watchdog Timer in Timer Group 0. When a timeout occurs, an interrupt is triggered.
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The TWDT is built around the ``MWDT_WDT`` watchdog timer in Timer Group 0. When a timeout occurs, an interrupt is triggered.
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.. only:: esp32c2
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