Merge branch 'feature/spi_isr_pin_to_core' into 'master'

spi: add feature to assign core_id of spi isr registered

Closes IDF-6371

See merge request espressif/esp-idf!21597

components/driver/include/driver/intr_types.h

@@ -0,0 +1,23 @@
+/*
+ * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+///< Selecting the ISR to be registered on which core
+typedef enum {
+    INTR_CPU_ID_AUTO,       ///< Register intr ISR to core automatically select by FreeRTOS.
+    INTR_CPU_ID_0,          ///< Register intr ISR to core 0.
+    INTR_CPU_ID_1,          ///< Register intr ISR to core 1.
+} intr_cpu_id_t;
+
+#define INTR_CPU_CONVERT_ID(cpu_id)     ((cpu_id) - 1)
+
+#ifdef __cplusplus
+}
+#endif

components/driver/include/driver/spi_common.h

@@ -10,6 +10,8 @@
 #include <stdbool.h>
 #include "sdkconfig.h"
 #include "esp_err.h"
+#include "esp_ipc.h"
+#include "intr_types.h"
 #include "hal/spi_types.h"
 
 #ifdef __cplusplus
@@ -115,6 +117,7 @@ typedef struct {
     int data7_io_num;     ///< GPIO pin for spi data7 signal in octal mode, or -1 if not used.
     int max_transfer_sz;  ///< Maximum transfer size, in bytes. Defaults to 4092 if 0 when DMA enabled, or to `SOC_SPI_MAXIMUM_BUFFER_SIZE` if DMA is disabled.
     uint32_t flags;       ///< Abilities of bus to be checked by the driver. Or-ed value of ``SPICOMMON_BUSFLAG_*`` flags.
+    intr_cpu_id_t  isr_cpu_id;    ///< Select cpu core to register SPI ISR.
     int intr_flags;       /**< Interrupt flag for the bus to set the priority, and IRAM attribute, see
                            *  ``esp_intr_alloc.h``. Note that the EDGE, INTRDISABLED attribute are ignored
                            *  by the driver. Note that if ESP_INTR_FLAG_IRAM is set, ALL the callbacks of