Merge branch 'feat/c6lite_c61_ci_header_tmp_app' into 'master'

feat(esp32c61): ci enable header check (stage 7/8)

See merge request espressif/esp-idf!29775

components/esp_hw_support/include/esp_private/spi_share_hw_ctrl.h

@@ -9,6 +9,8 @@
 
 #include "soc/soc_caps.h"
 #include "hal/spi_types.h"
+#include "soc/spi_periph.h"
+#include "soc/gpio_struct.h"
 #include "esp_private/periph_ctrl.h"
 #include "freertos/FreeRTOS.h"
 
@@ -30,6 +32,7 @@ extern "C" {
 #define BUS_LOCK_DEBUG_EXECUTE_CHECK(x)
 #endif
 
+#define CHECK_IOMUX_PIN(HOST, PIN_NAME) if (GPIO.func_in_sel_cfg[spi_periph_signal[(HOST)].PIN_NAME##_in].sig_in_sel) return false
 
 struct spi_bus_lock_t;
 struct spi_bus_lock_dev_t;