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Merge branch 'feature/gdma_retention_support_p4_c5_c61' into 'master'

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feat(gdma): add retention support for esp32p4, esp32c5, esp32c61

Closes IDF-9225, IDF-9929, and IDF-10380

See merge request espressif/esp-idf!33733
This commit is contained in:
Song Ruo Jing
2024-09-24 16:31:13 +08:00
parent 0a60517613 6afbc06666
commit ec50cb177c
36 changed files with 624 additions and 128 deletions
Download Patch File Download Diff File Expand all files Collapse all files
components/hal/esp32c2/include/hal/gdma_ll.h
+4 -4
View File
@@ -55,7 +55,7 @@ extern "C" {
/**
* @brief Enable the bus clock for the DMA module
*/
static inline void gdma_ll_enable_bus_clock(int group_id, bool enable)
static inline void _gdma_ll_enable_bus_clock(int group_id, bool enable)
{
(void)group_id;
SYSTEM.perip_clk_en1.dma_clk_en = enable;
@@ -63,12 +63,12 @@ static inline void gdma_ll_enable_bus_clock(int group_id, bool enable)
/// use a macro to wrap the function, force the caller to use it in a critical section
/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
#define gdma_ll_enable_bus_clock(...) (void)__DECLARE_RCC_ATOMIC_ENV; gdma_ll_enable_bus_clock(__VA_ARGS__)
#define gdma_ll_enable_bus_clock(...) (void)__DECLARE_RCC_ATOMIC_ENV; _gdma_ll_enable_bus_clock(__VA_ARGS__)
/**
* @brief Reset the DMA module
*/
static inline void gdma_ll_reset_register(int group_id)
static inline void _gdma_ll_reset_register(int group_id)
{
(void)group_id;
SYSTEM.perip_rst_en1.dma_rst = 1;
@@ -77,7 +77,7 @@ static inline void gdma_ll_reset_register(int group_id)
/// use a macro to wrap the function, force the caller to use it in a critical section
/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
#define gdma_ll_reset_register(...) (void)__DECLARE_RCC_ATOMIC_ENV; gdma_ll_reset_register(__VA_ARGS__)
#define gdma_ll_reset_register(...) (void)__DECLARE_RCC_ATOMIC_ENV; _gdma_ll_reset_register(__VA_ARGS__)
/**
* @brief Force enable register clock
components/hal/esp32c3/include/hal/gdma_ll.h
+4 -4
View File
@@ -55,7 +55,7 @@ extern "C" {
/**
* @brief Enable the bus clock for the DMA module
*/
static inline void gdma_ll_enable_bus_clock(int group_id, bool enable)
static inline void _gdma_ll_enable_bus_clock(int group_id, bool enable)
{
(void)group_id;
SYSTEM.perip_clk_en1.reg_dma_clk_en = enable;
@@ -63,12 +63,12 @@ static inline void gdma_ll_enable_bus_clock(int group_id, bool enable)
/// use a macro to wrap the function, force the caller to use it in a critical section
/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
#define gdma_ll_enable_bus_clock(...) (void)__DECLARE_RCC_ATOMIC_ENV; gdma_ll_enable_bus_clock(__VA_ARGS__)
#define gdma_ll_enable_bus_clock(...) (void)__DECLARE_RCC_ATOMIC_ENV; _gdma_ll_enable_bus_clock(__VA_ARGS__)
/**
* @brief Reset the DMA module
*/
static inline void gdma_ll_reset_register(int group_id)
static inline void _gdma_ll_reset_register(int group_id)
{
(void)group_id;
SYSTEM.perip_rst_en1.reg_dma_rst = 1;
@@ -77,7 +77,7 @@ static inline void gdma_ll_reset_register(int group_id)
/// use a macro to wrap the function, force the caller to use it in a critical section
/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
#define gdma_ll_reset_register(...) (void)__DECLARE_RCC_ATOMIC_ENV; gdma_ll_reset_register(__VA_ARGS__)
#define gdma_ll_reset_register(...) (void)__DECLARE_RCC_ATOMIC_ENV; _gdma_ll_reset_register(__VA_ARGS__)
/**
* @brief Force enable register clock
components/hal/esp32c5/include/hal/ahb_dma_ll.h
-3
View File
@@ -14,14 +14,11 @@
#include "soc/ahb_dma_struct.h"
#include "soc/ahb_dma_reg.h"
#include "soc/soc_etm_source.h"
#include "soc/retention_periph_defs.h"
#ifdef __cplusplus
extern "C" {
#endif
#define GDMA_CH_RETENTION_GET_MODULE_ID(group_id, pair_id) (SLEEP_RETENTION_MODULE_GDMA_CH0 << (SOC_GDMA_PAIRS_PER_GROUP_MAX * group_id) << pair_id)
#define AHB_DMA_LL_GET_HW(id) (((id) == 0) ? (&AHB_DMA) : NULL)
#define GDMA_LL_CHANNEL_MAX_PRIORITY 5 // supported priority levels: [0,5]
components/hal/esp32c5/include/hal/gdma_ll.h
+6 -2
View File
@@ -16,22 +16,26 @@ extern "C" {
/**
* @brief Enable the bus clock for the DMA module
*/
static inline void gdma_ll_enable_bus_clock(int group_id, bool enable)
static inline void _gdma_ll_enable_bus_clock(int group_id, bool enable)
{
(void)group_id;
PCR.gdma_conf.gdma_clk_en = enable;
}
#define gdma_ll_enable_bus_clock(...) _gdma_ll_enable_bus_clock(__VA_ARGS__)
/**
* @brief Reset the DMA module
*/
static inline void gdma_ll_reset_register(int group_id)
static inline void _gdma_ll_reset_register(int group_id)
{
(void)group_id;
PCR.gdma_conf.gdma_rst_en = 1;
PCR.gdma_conf.gdma_rst_en = 0;
}
#define gdma_ll_reset_register(...) _gdma_ll_reset_register(__VA_ARGS__)
#ifdef __cplusplus
}
#endif
components/hal/esp32c6/include/hal/gdma_ll.h
+6 -5
View File
@@ -13,14 +13,11 @@
#include "soc/gdma_reg.h"
#include "soc/soc_etm_source.h"
#include "soc/pcr_struct.h"
#include "soc/retention_periph_defs.h"
#ifdef __cplusplus
extern "C" {
#endif
#define GDMA_CH_RETENTION_GET_MODULE_ID(group_id, pair_id) (SLEEP_RETENTION_MODULE_GDMA_CH0 + (SOC_GDMA_PAIRS_PER_GROUP_MAX * group_id) + pair_id)
#define GDMA_LL_GET_HW(id) (((id) == 0) ? (&GDMA) : NULL)
#define GDMA_LL_CHANNEL_MAX_PRIORITY 5 // supported priority levels: [0,5]
@@ -102,22 +99,26 @@ extern "C" {
/**
* @brief Enable the bus clock for the DMA module
*/
static inline void gdma_ll_enable_bus_clock(int group_id, bool enable)
static inline void _gdma_ll_enable_bus_clock(int group_id, bool enable)
{
(void)group_id;
PCR.gdma_conf.gdma_clk_en = enable;
}
#define gdma_ll_enable_bus_clock(...) _gdma_ll_enable_bus_clock(__VA_ARGS__)
/**
* @brief Reset the DMA module
*/
static inline void gdma_ll_reset_register(int group_id)
static inline void _gdma_ll_reset_register(int group_id)
{
(void)group_id;
PCR.gdma_conf.gdma_rst_en = 1;
PCR.gdma_conf.gdma_rst_en = 0;
}
#define gdma_ll_reset_register(...) _gdma_ll_reset_register(__VA_ARGS__)
/**
* @brief Force enable register clock
*/
components/hal/esp32c61/include/hal/ahb_dma_ll.h
-3
View File
@@ -14,14 +14,11 @@
#include "soc/ahb_dma_struct.h"
#include "soc/ahb_dma_reg.h"
#include "soc/soc_etm_source.h"
#include "soc/retention_periph_defs.h"
#ifdef __cplusplus
extern "C" {
#endif
#define GDMA_CH_RETENTION_GET_MODULE_ID(group_id, pair_id) (SLEEP_RETENTION_MODULE_GDMA_CH0 << (SOC_GDMA_PAIRS_PER_GROUP_MAX * group_id) << pair_id)
#define AHB_DMA_LL_GET_HW(id) (((id) == 0) ? (&AHB_DMA) : NULL)
#define GDMA_LL_CHANNEL_MAX_PRIORITY 5 // supported priority levels: [0,5]
components/hal/esp32c61/include/hal/gdma_ll.h
+6 -2
View File
@@ -17,22 +17,26 @@ extern "C" {
/**
* @brief Enable the bus clock for the DMA module
*/
static inline void gdma_ll_enable_bus_clock(int group_id, bool enable)
static inline void _gdma_ll_enable_bus_clock(int group_id, bool enable)
{
(void)group_id;
PCR.gdma_conf.gdma_clk_en = enable;
}
#define gdma_ll_enable_bus_clock(...) _gdma_ll_enable_bus_clock(__VA_ARGS__)
/**
* @brief Reset the DMA module
*/
static inline void gdma_ll_reset_register(int group_id)
static inline void _gdma_ll_reset_register(int group_id)
{
(void)group_id;
PCR.gdma_conf.gdma_rst_en = 1;
PCR.gdma_conf.gdma_rst_en = 0;
}
#define gdma_ll_reset_register(...) _gdma_ll_reset_register(__VA_ARGS__)
#ifdef __cplusplus
}
#endif
components/hal/esp32h2/include/hal/gdma_ll.h
+6 -5
View File
@@ -13,14 +13,11 @@
#include "soc/gdma_reg.h"
#include "soc/soc_etm_source.h"
#include "soc/pcr_struct.h"
#include "soc/retention_periph_defs.h"
#ifdef __cplusplus
extern "C" {
#endif
#define GDMA_CH_RETENTION_GET_MODULE_ID(group_id, pair_id) (SLEEP_RETENTION_MODULE_GDMA_CH0 + (SOC_GDMA_PAIRS_PER_GROUP_MAX * group_id) + pair_id)
#define GDMA_LL_GET_HW(id) (((id) == 0) ? (&GDMA) : NULL)
#define GDMA_LL_CHANNEL_MAX_PRIORITY 5 // supported priority levels: [0,5]
@@ -102,22 +99,26 @@ extern "C" {
/**
* @brief Enable the bus clock for the DMA module
*/
static inline void gdma_ll_enable_bus_clock(int group_id, bool enable)
static inline void _gdma_ll_enable_bus_clock(int group_id, bool enable)
{
(void)group_id;
PCR.gdma_conf.gdma_clk_en = enable;
}
#define gdma_ll_enable_bus_clock(...) _gdma_ll_enable_bus_clock(__VA_ARGS__)
/**
* @brief Reset the DMA module
*/
static inline void gdma_ll_reset_register(int group_id)
static inline void _gdma_ll_reset_register(int group_id)
{
(void)group_id;
PCR.gdma_conf.gdma_rst_en = 1;
PCR.gdma_conf.gdma_rst_en = 0;
}
#define gdma_ll_reset_register(...) _gdma_ll_reset_register(__VA_ARGS__)
/**
* @brief Force enable register clock
*/
components/hal/esp32p4/include/hal/gdma_ll.h
+3 -3
View File
@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -111,7 +111,7 @@ static inline void _gdma_ll_enable_bus_clock(int group_id, bool enable)
/**
* @brief Reset the DMA module
*/
static inline void gdma_ll_reset_register(int group_id)
static inline void _gdma_ll_reset_register(int group_id)
{
if (group_id == 0) {
HP_SYS_CLKRST.hp_rst_en1.reg_rst_en_ahb_pdma = 1;
@@ -124,7 +124,7 @@ static inline void gdma_ll_reset_register(int group_id)
/// use a macro to wrap the function, force the caller to use it in a critical section
/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
#define gdma_ll_reset_register(...) (void)__DECLARE_RCC_ATOMIC_ENV; gdma_ll_reset_register(__VA_ARGS__)
#define gdma_ll_reset_register(...) (void)__DECLARE_RCC_ATOMIC_ENV; _gdma_ll_reset_register(__VA_ARGS__)
#ifdef __cplusplus
}
components/hal/esp32s3/include/hal/gdma_ll.h
+4 -4
View File
@@ -70,7 +70,7 @@ extern "C" {
/**
* @brief Enable the bus clock for the DMA module
*/
static inline void gdma_ll_enable_bus_clock(int group_id, bool enable)
static inline void _gdma_ll_enable_bus_clock(int group_id, bool enable)
{
(void)group_id;
SYSTEM.perip_clk_en1.dma_clk_en = enable;
@@ -78,12 +78,12 @@ static inline void gdma_ll_enable_bus_clock(int group_id, bool enable)
/// use a macro to wrap the function, force the caller to use it in a critical section
/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
#define gdma_ll_enable_bus_clock(...) (void)__DECLARE_RCC_ATOMIC_ENV; gdma_ll_enable_bus_clock(__VA_ARGS__)
#define gdma_ll_enable_bus_clock(...) (void)__DECLARE_RCC_ATOMIC_ENV; _gdma_ll_enable_bus_clock(__VA_ARGS__)
/**
* @brief Reset the DMA module
*/
static inline void gdma_ll_reset_register(int group_id)
static inline void _gdma_ll_reset_register(int group_id)
{
(void)group_id;
SYSTEM.perip_rst_en1.dma_rst = 1;
@@ -92,7 +92,7 @@ static inline void gdma_ll_reset_register(int group_id)
/// use a macro to wrap the function, force the caller to use it in a critical section
/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
#define gdma_ll_reset_register(...) (void)__DECLARE_RCC_ATOMIC_ENV; gdma_ll_reset_register(__VA_ARGS__)
#define gdma_ll_reset_register(...) (void)__DECLARE_RCC_ATOMIC_ENV; _gdma_ll_reset_register(__VA_ARGS__)
/**
* @brief Force enable register clock