spi_flash: 2nd stage for supporting flash suspend. (1). Support more esp chips (2). Improve real-time performance (3). Making timing more stable (4) Add documents

components/hal/include/hal/spi_flash_hal.h

@@ -47,8 +47,9 @@ typedef struct {
     spi_flash_sus_cmd_conf sus_cfg;        ///< To store suspend command/mask information.
     uint32_t slicer_flags;      /// Slicer flags for configuring how to slice data correctly while reading or writing.
 #define SPI_FLASH_HOST_CONTEXT_SLICER_FLAG_DTR           BIT(0)  ///< Slice data according to DTR mode, the address and length must be even (A0=0).
+    int freq_mhz;               /// Flash clock frequency.
 } spi_flash_hal_context_t;
-ESP_STATIC_ASSERT(sizeof(spi_flash_hal_context_t) == 40, "size of spi_flash_hal_context_t incorrect. Please check data compatibility with the ROM");
+ESP_STATIC_ASSERT(sizeof(spi_flash_hal_context_t) == 44, "size of spi_flash_hal_context_t incorrect. Please check data compatibility with the ROM");
 
 /// This struct provide MSPI Flash necessary timing related config, should be consistent with that in union in `spi_flash_hal_config_t`.
 typedef struct {

components/hal/include/hal/spi_flash_types.h

@@ -27,6 +27,7 @@ typedef struct {
 #define SPI_FLASH_TRANS_FLAG_CMD16          BIT(0)  ///< Send command of 16 bits
 #define SPI_FLASH_TRANS_FLAG_IGNORE_BASEIO  BIT(1)  ///< Not applying the basic io mode configuration for this transaction
 #define SPI_FLASH_TRANS_FLAG_BYTE_SWAP      BIT(2)  ///< Used for DTR mode, to swap the bytes of a pair of rising/falling edge
+#define SPI_FLASH_TRANS_FLAG_PE_CMD         BIT(3)  ///< Indicates that this transaction is to erase/program flash chip.
     uint16_t command;           ///< Command to send
     uint8_t dummy_bitlen;       ///< Basic dummy bits to use
     uint32_t io_mode;           ///< Flash working mode when `SPI_FLASH_IGNORE_BASEIO` is specified.