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feat(mspi): supported psram 80MHz timing tuning

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This commit is contained in:
armando
2025-05-20 11:41:11 +08:00
parent e7c8f555e7
commit fafc25b8b9
16 changed files with 949 additions and 35 deletions
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components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32c5.c
+1 -1
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@@ -55,7 +55,7 @@ void IRAM_ATTR bootloader_init_mspi_clock(void)
// SPLL clock on C5 is 480MHz , and mspi_pll needs 80MHz
// in this stage, set divider as 6
_mspi_timing_ll_set_flash_clk_src(0, FLASH_CLK_SRC_SPLL);
mspi_ll_fast_set_hs_divider(6);
mspi_timing_ll_set_core_clock(MSPI_TIMING_LL_MSPI_ID_0, MSPI_TIMING_LL_CORE_CLOCK_MHZ_DEFAULT);
}
void IRAM_ATTR bootloader_flash_clock_config(const esp_image_header_t *pfhdr)
components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32c61.c
+1 -1
View File
@@ -52,7 +52,7 @@ void IRAM_ATTR bootloader_init_mspi_clock(void)
// SPLL clock on C61 is 480MHz , and mspi_pll needs 80MHz
// in this stage, set divider as 6
_mspi_timing_ll_set_flash_clk_src(0, FLASH_CLK_SRC_DEFAULT);
mspi_ll_fast_set_hs_divider(6);
mspi_timing_ll_set_core_clock(MSPI_TIMING_LL_MSPI_ID_0, MSPI_TIMING_LL_CORE_CLOCK_MHZ_DEFAULT);
}
void IRAM_ATTR bootloader_flash_clock_config(const esp_image_header_t *pfhdr)