6dbb3059f9
Merge branch 'h2_auto_dbias_master_hsq' into 'master'
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ESP32H2: Active & sleep dbias get from efuse to fix the voltage
See merge request espressif/esp-idf!27483
2024-01-29 10:16:15 +08:00
cf93777077
refactor(rtc): move soc/rtc.h from soc to esp_hw_support component
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Deprecated rtc_xtal_freq_t, replaced with soc_xtal_freq_t defined in
clk_tree_defs.h in soc component.
2024-01-25 19:15:33 +08:00
0b79d9bf4c
feat(pmu): set fix voltage to different mode for esp32h2
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h2 remove include
2024-01-24 13:11:41 +08:00
09c9001895
Merge branch 'feature/add_key_manager_hw_support' into 'master'
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Feature/add key manager hw support
Closes IDF-7925 and IDF-8041
See merge request espressif/esp-idf!26328
2024-01-23 17:11:05 +08:00
e3d4b901f9
Merge branch 'bugfix/compilation_failed_in_bootloader_with_sb_fe_verbose' into 'master'
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fix(bootloader): Fix compilation issue in bootloader build during verbose+sb+fe
Closes IDF-6373
See merge request espressif/esp-idf!26339
2024-01-23 13:29:02 +08:00
4dc2ace0b7
fix(esp_hw_support): Update key manager support
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1) Added new Key Manager APIs
2) Added crypto locking layer for Key Manager
3) Remove support for deploying known key
4) Format key manager support
5) Fix build header error
6) Updated the key_mgr_types.h file
7) Added key manager tests
2024-01-23 10:24:39 +05:30
9ecd2fd7e3
fix(soc): change debug addr range to CPU subsystem range
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For C6/H2/P4/C5, there is no SoC specific debug range. Instead the same
address range is part of CPU Subsystem range which contains debug mode
specific code and interrupt config registers (CLINT, PLIC etc.).
For now the PMP entry is provided with RWX permission for both machine
and user mode but we can save this entry and allow the access to only
machine mode for this range.
For P4/C5 case, this PMP entry can have RW permission as the debug mode
specific code is not present in this memory range.
2024-01-22 13:34:32 +08:00
102d5bbf72
refactor(riscv): added a new API for the interrupts
2024-01-18 16:36:53 +08:00
59c5b5fe6b
fix(bootloader): Fix compilation issue in bootloader build during verbose+sb+fe
2024-01-18 12:15:15 +05:30
6768805d20
fix(uart,usj...): Fix wrong serial number that has been parsed to rom functions,
...
Closes https://github.com/espressif/esp-idf/issues/12958
2024-01-18 10:51:51 +08:00
ce388a4111
feat(esp_eth): Added support of internal EMAC for ESP32P4
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Refactored internal EMAC DMA access.
Added MPLL acquire to manage access to the MPLL by multiple periphs.
2024-01-16 14:29:25 +01:00
80e18811db
feat(psram): support 200mhz psram, experimental feature for now
2024-01-10 11:52:28 +08:00
d0a8f3e5c4
feat(esp32c5): support esptool on esp32c5 beta3
2024-01-09 13:11:11 +08:00
3d459e423a
feat(esp32c5): support esp32c5 beta3 48M xtal
2024-01-09 13:11:11 +08:00
11e19f40b9
feat(esp32c5): support to build hello world on esp32c5 beta3
2024-01-09 13:11:11 +08:00
b74cc4637b
Merge branch 'feature/support_hw_trigger_regdma_when_pu_top' into 'master'
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fix(pm): trigger regdma retention by PMU when TOP is not power down on esp32H2
Closes PM-47 and PM-65
See merge request espressif/esp-idf!28046
2024-01-08 10:44:06 +08:00
aed3127d19
feat(pm): support PMU trigger regdma when PU TOP
2024-01-05 16:17:32 +08:00
c204f418ef
fix(rtc): fixed bbpll not calibrated from bootloader issue
2024-01-04 03:23:20 +08:00
8775b99d93
fix(bbpll): fix bbpll calibration may stop early bug(ESP32C2/S3/C6/H2)
2024-01-04 03:23:20 +08:00
a48f4760d2
feat(esp32c5): add system related supports
2024-01-02 11:17:11 +08:00
7f2b85b82b
feat(clk): add basic clock support for esp32p4
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- Support CPU frequency 360MHz
- Support SOC ROOT clock source switch
- Support LP SLOW clock source switch
- Support clock calibration
2023-12-29 00:37:26 +08:00
71202c701f
change(ldo): do vddpst ldo init in early stage
2023-12-26 11:43:33 +08:00
27b1e4dc87
feat(mpll): supported mpll configure ll api
2023-12-21 16:26:03 +08:00
73de93d55e
Merge branch 'bugfix/wait_tvsl_after_non_pd_top_lightsleep_for_esp32c6' into 'master'
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fix(esp_hw_support/sleep): wait flash ready after non-pd_top lightsleep for esp32c6
Closes IDF-6930
See merge request espressif/esp-idf!27726
2023-12-19 14:01:45 +08:00
d8b1f7207a
change(pm): change macro SOC_PM_RETENTION_HAS_REGDMA_POWER_BUG
2023-12-15 15:04:06 +08:00
7de2728733
fix(esp_hw_support/sleep): wait flash ready after non-pd_top lightsleep for esp32c6
2023-12-14 08:57:06 +00:00
80c2bd3d7c
Merge branch 'bugfix/put_extra_link_retention_in_iram' into 'master'
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fix(pm): place extra link opt in iram
Closes PM-30
See merge request espressif/esp-idf!27625
2023-12-14 10:28:34 +08:00
ac3915f092
docs(esp32p4): update misc docs for esp32p4
2023-12-09 09:09:55 +08:00
e1d24ebd7f
fix(esp_hw_support/sleep): fix rtc_time_us_to_slowclk div zero in deepsleep process
...
Closes https://github.com/espressif/esp-idf/issues/12695
2023-12-07 07:50:32 +00:00
797edb54fa
fix(pm): place extra link opt in iram
2023-12-04 14:46:42 +08:00
637d4c4381
fix(esp_hw_support): Removed unused include directories from cmake
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* Closes https://github.com/espressif/esp-idf/issues/12700
2023-12-01 11:33:12 +08:00
cd9d321062
Merge branch 'feature/introduce_target_esp32c5' into 'master'
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feat(esp32c5): introduce target esp32c5 (stage 1)
See merge request espressif/esp-idf!27299
2023-11-29 20:31:34 +08:00
bb0879b3f8
feat(esp32c5): introduce target esp32c5
2023-11-28 16:14:17 +08:00
eb93daafd0
feat(soc): Increase max supported version of C3 to 1.99
2023-11-23 06:58:18 +00:00
a9ea49cba2
Merge branch 'bugfix/clear_ulp_wake_intr_in_wake_source_enable' into 'master'
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fix(esp_hw_support): clear all type ULP wakeup intr status at ulp wakeup source enable
Closes PM-14
See merge request espressif/esp-idf!26674
2023-11-07 16:58:38 +08:00
d3be2541de
fix(adc): rename ADC_ATTEN_DB_11 to ADC_ATTEN_DB_12
...
By design, it's 12 dB. There're errors among chips, so the actual
attenuation will be 11dB more or less
2023-11-06 18:55:49 +08:00
18f984fd9c
fix(esp_hw_support): clear all type ULP wakeup intr status at ulp wakeup source enable
2023-10-30 11:18:01 +08:00
fa489d3c20
change(Power Management): the xpd_xtal32k value depends on system slow clock source config option when pmu initialize
2023-10-24 17:11:53 +08:00
5f00b8a4d5
fix(esp32c3): Update esp32c3 chip revision
2023-10-20 11:01:07 +08:00
70314b56d5
feat(sdmmc): supported sd2.0 on esp32p4
2023-10-18 11:57:55 +00:00
9c2d470465
feat(bootloader): adjust dbias of bootloader, change clock of H2 to 64
...
MHz
2023-10-12 14:51:54 +08:00
28ba080c5e
Revert "feat(volt): chip auto adjust volt for esp32c6 & esp32h2"
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This reverts commit b221f87e00
2023-10-12 14:51:54 +08:00
d52040a86d
Merge branch 'esp32p4/add_uart_support' into 'master'
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UART: Add uart support for ESP32P4
Closes IDF-6511 and IDF-7506
See merge request espressif/esp-idf!25388
2023-10-09 18:11:10 +08:00
adae54faca
Merge branch 'bringup/support_callback_mechanism_in_lightsleep_flow' into 'master'
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Power Management: support_callback_mechanism_in_lightsleep_flow
Closes WIFI-5936
See merge request espressif/esp-idf!24597
2023-10-08 20:16:01 +08:00
4541ad134d
feat(uart): add RCC atomic block to uart/lp-uart peripheral
2023-10-08 10:10:02 +08:00
c7afa0dcef
feat(uart): uart(hp,lp) support on esp32p4
2023-10-08 10:10:00 +08:00
8efe950077
fix(adc): power settings not taking into effect on H2
2023-09-28 17:41:42 +00:00
c8083b07bf
feat(modem_clock): separate management of modem_adc_common_fe clock and modem_private_fe
2023-09-28 17:41:42 +00:00
817036f46f
fix(adc): power settings not taking into effect on C6
2023-09-28 17:41:42 +00:00
4c6f4b39f1
Merge branch 'feature/support_i2s_on_p4' into 'master'
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feat(i2s): support i2s on esp32p4
Closes IDF-6508
See merge request espressif/esp-idf!24280
2023-09-29 00:50:04 +08:00
Michael (XIAO Xufeng)