16b8a2ea3b
feat(esp_hw_support): two interrupts sources can now be mapped to the same interrupt line
2025-01-15 13:13:24 +08:00
980cf269c7
feat(riscv): implement frame pointer option for backtracing
2025-01-09 11:57:02 +08:00
b07761825e
Merge branch 'feature/dcache_write_flash_panic' into 'master'
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feat(panic): panic immediately on an attempt to write to flash via dcache
See merge request espressif/esp-idf!34190
2025-01-03 10:12:30 +08:00
096cb409d9
feat(panic): panic immediatly if trying to write to flash through cache on ESP32-S3
...
Updated S3 to use PMS protection for writing to flash through cache. This means we get
a panic quicker for this illegal behavior than we did before, making the source of the error
easier to track down.
2024-12-27 17:58:33 +08:00
b58c9a4219
feat(panic): support HWSG for esp32c5, esp32c61 and enable testing
2024-12-26 12:45:17 +07:00
62d59751c0
change(tools): enhance expect_reg_dump to support any or specific core values
2024-12-04 18:43:30 +08:00
244c369cd8
fix(xtensa): fix confusing backtrace when PC is invalid
...
Before this change _invalid_pc_placeholder pointed to address of _init
function from crti.o
This made GDB input a bit confusing:
0x40080400 in _init ()
(gdb) bt
#0 0x40080400 in _init ()
#1 0x400e519a in test_instr_fetch_prohibited () at /home/alex/git/esp-idf/tools/test_apps/system/panic/main/test_panic.c:271
#2 0x400d89a7 in app_main () at /home/alex/git/esp-idf/tools/test_apps/system/panic/main/test_app_main.c:116
#3 0x400e5f22 in main_task (args=0x0) at /home/alex/git/esp-idf/components/freertos/app_startup.c:208
#4 0x400895a8 in vPortTaskWrapper (pxCode=0x400e5eb0 <main_task>, pvParameters=0x0) at /home/alex/git/esp-idf/components/freertos/FreeRTOS-Kernel/portable/xtensa/port.c:139
After the change GDB prints output that contains a hint:
_invalid_pc_placeholder () at /home/alex/git/esp-idf/components/xtensa/xtensa_vectors.S:2235
2235 UNREACHABLE_INSTRUCTION_CHECK_PREVIOUS_FRAMES
(gdb) bt
#0 _invalid_pc_placeholder () at /home/alex/git/esp-idf/components/xtensa/xtensa_vectors.S:2235
#1 0x400e519e in test_instr_fetch_prohibited () at /home/alex/git/esp-idf/tools/test_apps/system/panic/main/test_panic.c:271
#2 0x400d89ab in app_main () at /home/alex/git/esp-idf/tools/test_apps/system/panic/main/test_app_main.c:116
#3 0x400e5f26 in main_task (args=0x0) at /home/alex/git/esp-idf/components/freertos/app_startup.c:208
#4 0x400895a8 in vPortTaskWrapper (pxCode=0x400e5eb4 <main_task>, pvParameters=0x0) at /home/alex/git/esp-idf/components/freertos/FreeRTOS-Kernel/portable/xtensa/port.c:139
2024-12-02 21:36:00 +07:00
bfe3511493
fix(panic): fix HWSG testcase to avoid freertos watchpoint trap
2024-12-02 20:26:26 +07:00
f8ddcee8cd
Merge branch 'refactor/cache_err_panic' into 'master'
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refactor(panic): refactor and unify cache panic errors
See merge request espressif/esp-idf!34382
2024-11-13 10:19:38 +08:00
5a3f53a2b5
ci: print esp-coredump output when failed in panic tests
2024-11-08 11:13:43 +01:00
9c5dde5536
refactor(panic): refactor and unify cache panic errors
2024-11-07 11:39:40 +08:00
93de26537c
Merge branch 'fix/sanitizer_issue' into 'master'
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flash: flash ops sanitizer
Closes IDF-9954
See merge request espressif/esp-idf!33859
2024-10-14 10:36:43 +08:00
e9bd3c01f0
change(flash): flash ops sanitizer
2024-10-09 15:37:50 +08:00
aebf700919
refactor(freertos): rename SPIRAM_ALLOW_STACK_EXTERNAL_MEMORY and move to freertos
2024-10-09 13:32:03 +08:00
6d9905a90c
feat(esp-coredump): enable esp32c61 tests
2024-10-04 06:58:03 +02:00
13c8c2f121
test(esp-coredump): add test for the soft sha config
2024-09-26 13:04:39 +02:00
fcd751e79c
ci(memprot): enable memory protection tests for ESP32-C61
2024-09-18 10:25:18 +05:30
bc0b04d779
Merge branch 'staging/enabling_panic_test_esp32c61' into 'master'
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test(panic): enable tests for esp32c61
Closes IDF-10994
See merge request espressif/esp-idf!33277
2024-09-10 11:37:38 +08:00
47212eaa3a
feat(tools): update toolchain version to esp-14.2.0_20240903
...
Closes https://github.com/espressif/esp-idf/issues/13979
Closes https://github.com/espressif/esp-idf/issues/14273
Closes https://github.com/espressif/esp-idf/issues/14267
2024-09-08 13:52:22 +07:00
d025ff4073
test(panic): enable tests for esp32c61
2024-09-05 14:50:58 +08:00
1e3c3b8738
Merge branch 'feature/esp32c5_coredump' into 'master'
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ESP32-C5 enable core dump tests
Closes IDF-8661
See merge request espressif/esp-idf!30151
2024-09-04 20:08:48 +08:00
4e095f4b9f
ci(esp32c61): enable c61 generic target test
2024-09-02 19:26:12 +08:00
23bc6eac43
test(coredump): enable esp32c5 coredump tests
2024-08-30 13:17:44 +03:00
3ef9750005
test(coredump): fix failed core dump tests
2024-08-28 11:12:39 +03:00
d2cfb78d31
Merge branch 'refactor/spi_ram_stack_with_heap_caps_config' into 'master'
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refactor(esp_psram): allow PSRAM as stack when PSRAM is only available via esp_heap_caps
Closes IDFGH-11604
See merge request espressif/esp-idf!32832
2024-08-20 16:48:44 +08:00
0d32deb4c4
refactor(test_apps): increased timeout of panic tests
2024-08-15 16:16:54 +02:00
14cbd837b3
ci(memprot): enable memory protection tests for ESP32-C5
2024-08-12 11:08:33 +05:30
7231a6388b
feat(cache): supported cache panic on c61
2024-08-08 10:38:02 +08:00
564b74a9c0
feat(cache): supported cache panic on p4
2024-07-12 12:42:10 +08:00
bd4e48d0d9
feat(cpu): Configure panic exception generation using asm illegal instruction
2024-06-25 11:55:24 +05:30
a8f509f481
fix(esp_hw_support): Fix incorrect PMA configuration for ESP32-P4
...
- As the PMA entry that made some memory regions cacheable was
assigned the highest priority, some intermediate inaccessible
memory regions bypassed protection.
- Added tests for the same
- Verified that even after changing the priority of the PMA entry,
a write operation at SOC_IRAM_LOW + 0x40 (a random RAM cached address)
still needs the same number (29) of CPU cycles.
2024-06-10 11:55:58 +05:30
002faf3b0a
ci(panic): extend extram_stack tests
2024-05-27 14:51:30 +02:00
55261747fc
ci(panic): add coredump tcb corrupted test
2024-05-27 13:55:14 +02:00
8e524d708c
fix(coredump): fix buffer overflow inside esp_core_dump_get_summary
...
Closes https://github.com/espressif/esp-idf/issues/13754
2024-05-07 06:49:28 +02:00
94fc3630f5
ci(panic): add flash encrypted coredump tests
2024-05-06 15:54:33 +02:00
551d91ea8a
ci(coredump): fix capture dram tests
2024-05-06 15:43:43 +02:00
8b418d4b09
feat(esp_system): Print backtrace for both CPUs when cache error does not determine CPU
2024-04-30 15:20:58 +03:00
3b8191cf5d
feat(coredump): save .bss, .data and .heap sections to the elf file
2024-04-23 19:07:51 +03:00
6f2de1fb23
fix(system): esp32p4: fix mepc when load/store failure occurred
2024-04-18 19:49:19 +04:00
024b040300
test(memprot): enable memory protection tests for P4
2024-04-14 21:16:42 +05:30
483b4cd65b
ci(coredump): enable custom stack tests for riscv chips
2024-04-09 13:36:30 +08:00
432864e917
Merge branch 'ci/enable_c5_mp_ci_jobs' into 'master'
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ci(esp32c5mp): enable esp32c5 build on CI
See merge request espressif/esp-idf!29895
2024-04-08 12:16:16 +08:00
65b1fd33d3
ci(esp32c5mp): disable the unsupported tests
2024-04-07 12:13:29 +08:00
7d13f8210f
ci: fix pytest generic env markers
2024-04-03 18:10:43 +08:00
48503dd39f
fix(esp_hw_support): Fix the flash I/DROM region PMP protection
2024-04-02 18:41:07 +05:30
cb82161dae
feat(system): esp32p4: support panic tests
2024-03-21 15:36:36 +04:00
2265c0f230
feat(tools/test_apps): Add violation tests for the flash I/DROM region
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- For SoCs supporting PMP
2024-02-28 10:54:38 +05:30
d348258f2c
fix(test_apps): Fix coredump_uart_bin_crc.test_hw_stack_guard_cpu0 test
2024-02-19 19:21:40 +08:00
f1d5f97719
feat(coredump): use SHA ROM functions for all targets except ESP32
...
For ESP32, continue using mbedtls due to a required ROM patch for the SHA implementation.
For other targets, we can now leverage the ROM functions.
2024-01-25 15:13:56 +01:00
297607587b
test(panic): remove WDT both CPU test
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Test never worked on S3/P4 and was flakey on ESP32. Hard to design a reliable test
case that triggers both WDT at the exact same time.
2024-01-23 11:55:18 +08:00
Omar Chebib