34c7d62855
refactor(hw_support): combine esp_hw_support rtc header to a single file
2024-12-30 10:09:34 +08:00
b240defc75
feat(esp32h21): support esp_system, esp_timer and freertos (stage5)
2024-12-20 22:43:10 +08:00
63ea6113ba
fix(cache): fixed cache hal ctx not initialised in app issue
2024-12-18 16:41:35 +08:00
733741bbac
feat(esp_tee): Support for ESP-TEE - esp_system component
2024-12-02 12:20:04 +05:30
1eef2e8c19
feat(mspi): supported flash 120MHz SDR timing tuning on ESP32P4
2024-11-28 14:53:19 +08:00
d2fe62f682
feat(esp_system): stop other core for unicore esp32p4
2024-11-07 14:00:55 +01:00
5976e391ea
fix(esp_system): Correct address used to fetch application image header
2024-11-04 09:58:37 +05:30
e52e2d282a
refactor(startup): move key manager specific code to esp_security component
2024-09-25 14:21:19 +05:30
d9c15bb772
fix(ci): some actions taken to pass CI
2024-09-20 10:53:05 +08:00
256ef127dd
fix(linker): fixed extern linker symbol type from int to char
2024-09-14 11:11:55 +08:00
05e74480f5
feat(esp_system): gate some clock by default to optmize esp32p4 active power
2024-09-11 10:53:00 +08:00
d1c47835a2
fix(security): Fixed flash encryption for esp32p4
...
The flash encryption on esp32p4 was broken due to some code related
to key manager not being executed when key manager support was
disabled on esp32p4 target.
This commit fixes that behaviour
Additionally, the atomic env enablement for
key_mgr_ll_enable_peripheral_clock was fixed.
2024-09-02 14:00:55 +08:00
47a0677525
feat(pm): support ext1_wakeup/esp_deep_sleep_enable_gpio_wakeup for esp32c5mp deepsleep
2024-08-28 10:44:08 +08:00
55dccc4bba
fix(MMU): fixed mmap deadlock when using multicore app with unicore bootloader
...
Closes https://github.com/espressif/esp-idf/issues/11617
2024-08-15 12:00:08 +08:00
8c22cb6c6a
feat(psram): support bss on psram on p4
2024-07-15 10:44:13 +08:00
b19f9242d7
fix(usb_otg): Fix bug that usb_otg console cannot work on esp32s3
2024-06-26 11:20:19 +08:00
5b71b949be
fix(startup): move rtc initialization before MSPI timing tuning to improve stability
2024-06-18 01:16:24 +08:00
10d3912c70
feat(xip_psram): support xip psram feature on esp32p4
2024-05-22 15:56:07 +08:00
3e477681ac
change(cpu_start): added note about internal ram only stage
2024-05-22 14:13:29 +08:00
72cb920799
bugfix(cpu_start): check c3 efuse error log on ram app condition
...
Prior to this commit, esp_efuse_check_errors() is only called when it's
2nd stage btld app.
This commit moves this error check so under all conditions (including
ram app, pure ram app) will check this efuse error
2024-05-22 14:13:29 +08:00
24895ac93c
refactor(cpu_start): move uni/multi core log later
2024-05-22 14:13:29 +08:00
3eb6487bb5
fix(bootloader_support): Make esp_flash_encrypt.h independent of spi_flash_mmap.h header
2024-05-13 16:54:45 +05:30
9c108f2da6
feat(esp_hw_support): brought up RNG on ESP32-P4
2024-04-01 07:09:11 +05:30
5d6c56c20d
Merge branch 'fix/unused_mmap_include' into 'master'
...
fix(all): remove unused header includes
See merge request espressif/esp-idf!29816
2024-03-29 10:20:08 +08:00
ccaae61fee
feat(esp_hw_support): support esp32p4 deepsleep
2024-03-27 13:59:36 +08:00
cf59c00564
change(mpll): clean up mpll clock acquire with ldo driver
2024-03-25 22:03:49 +08:00
313c4f2cdc
fix(all): remove unused header includes
2024-03-25 13:58:40 +08:00
a611e91b2f
feat(esp32c61): new chip add system and esp_timer support
2024-03-21 11:31:15 +08:00
43c604f145
Merge branch 'feature/move_efuse_related_inits_into_component' into 'master'
...
feat(efuse): Move efuse-related init steps into the component
Closes IDF-8759 and IDF-8761
See merge request espressif/esp-idf!28422
2024-03-04 17:34:44 +08:00
f9800e0726
feat(efuse): Move efuse-related init steps into the component
2024-03-01 21:07:03 +02:00
824c8e0593
feat(esp_system): allow .bss to spill over into L2MEM above 0x4ff40000
...
This commit introduce SOC_MEM_NON_CONTIGUOUS_SRAM flag (that enebled for
esp32p4). If SOC_MEM_NON_CONTIGUOUS_SRAM is enabled:
- LDFLAGS+=--enable-non-contiguous-regions
- ldgen.py replaces "arrays[*]" from sections.ld.in with objects under
SURROUND keyword. (e.g. from linker.lf: data -> dram0_data SURROUND(foo))
- "mapping[*]" - refers to all other data
If SOC_MEM_NON_CONTIGUOUS_SRAM, sections.ld.in file should contain at
least one block of code like this (otherwise it does not make sense):
.dram0.bss (NOLOAD) :
{
arrays[dram0_bss]
mapping[dram0_bss]
} > sram_low
.dram1.bss (NOLOAD) :
{
/* do not place here arrays[dram0_bss] because it may be splited
* between segments */
mapping[dram0_bss]
} > sram_high
2024-02-28 19:41:25 +04:00
06850e0e1e
refactor(system): removed esp_system from astyle ignore list and reformated it
2024-01-30 15:17:15 +08:00
4dc2ace0b7
fix(esp_hw_support): Update key manager support
...
1) Added new Key Manager APIs
2) Added crypto locking layer for Key Manager
3) Remove support for deploying known key
4) Format key manager support
5) Fix build header error
6) Updated the key_mgr_types.h file
7) Added key manager tests
2024-01-23 10:24:39 +05:30
102d5bbf72
refactor(riscv): added a new API for the interrupts
2024-01-18 16:36:53 +08:00
6768805d20
fix(uart,usj...): Fix wrong serial number that has been parsed to rom functions,
...
Closes https://github.com/espressif/esp-idf/issues/12958
2024-01-18 10:51:51 +08:00
ce388a4111
feat(esp_eth): Added support of internal EMAC for ESP32P4
...
Refactored internal EMAC DMA access.
Added MPLL acquire to manage access to the MPLL by multiple periphs.
2024-01-16 14:29:25 +01:00
c204f418ef
fix(rtc): fixed bbpll not calibrated from bootloader issue
2024-01-04 03:23:20 +08:00
a48f4760d2
feat(esp32c5): add system related supports
2024-01-02 11:17:11 +08:00
71202c701f
change(ldo): do vddpst ldo init in early stage
2023-12-26 11:43:33 +08:00
a84234c23f
feat(security): Enable Flash encryption for ESP32P4
2023-12-05 13:10:55 +05:30
28f19cf0e6
fix(ram_app): Fixed issue ram_app can't use the SPI Flash
...
1st bootloader won't help to initialize the MSPI & cache properly as it
usually do when loading from flash. And the ram app doesn't have valid
headers.
Since there is no enough space in 2nd bootloader, we replace the
`bootloader_init_spi_flash` in the ram_app (!pure_ram_app), with an
customized alternative of it for the ram_app.
This alternative helps to initialize the MSPI & cache properly, without
the help of 1st bootloader or image headers.
2023-11-01 02:01:45 +08:00
a8b1475fe7
feat(riscv): implement coprocessors save area and FPU support
...
This commit mainly targets the ESP32-P4. It adds supports for coprocessors on
RISC-V based targets. The coprocessor save area, describing the used coprocessors
is stored at the end of the stack of each task (highest address) whereas each
coprocessor save area is allocated at the beginning of the task (lowest address).
The context of each coprocessor is saved lazily, by the task that want to use it.
2023-10-23 11:10:28 +08:00
59417a4049
Merge branch 'feature/free_bt_memory' into 'master'
...
feat(bt): Frees BLE memory when no longer in use
See merge request espressif/esp-idf!22795
2023-10-12 18:35:15 +08:00
a2802ef121
feat(tools): Enables unicore_bootloader test for ESP32P4
2023-10-10 11:11:32 +00:00
a39869416c
feat(bt): Frees BLE memory when no longer in use
...
It will free libble.a & libbt all txt, data and bss segment memory.
This memory is combined into one large memory and put into the heap
pool.
2023-10-08 16:08:47 +08:00
bc2a6bd730
feat(uart): spilt LP and HP uart set_baudrate function
2023-10-08 10:10:02 +08:00
4f24f805cc
feat(uart): add LP-UART GPIO support
2023-10-08 10:10:02 +08:00
4541ad134d
feat(uart): add RCC atomic block to uart/lp-uart peripheral
2023-10-08 10:10:02 +08:00
28b8a5d9b4
fix(esp_system): Fix mixing logs, remove early info logs for 2nd CPU
...
Fixes mixing logs when two cores use esp_rom_printf
2023-10-02 12:50:40 +00:00
ec27891af6
change(cache): swap cache hal arg 'type' and 'level'
2023-09-22 14:19:41 +08:00
Marius Vikhammer