 Marius Vikhammer
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00eb97725b
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feat(system): support choosing xtal as rtc-fast clock src on P4 and C5
With xtal as rtc-fast clock source the LP-Core can run at twice the default
clock frequency. 40 MHz as opposed to 20 MHz.
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2024-09-19 17:30:44 +08:00 |
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Marius Vikhammer
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9b387caf19
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fix(etm): add ulp etm ll functions
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2024-07-16 10:04:18 +08:00 |
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Marius Vikhammer
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41d39a419f
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fix(pmp): fixed alignment of PMP addr for RTC mem on C5
Also refactored it for C6/H2/C61 to keep the approach consistent between targets
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2024-07-04 16:24:46 +08:00 |
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laokaiyao
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cb22b8aaf7
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ci(esp32c5): enable c5 target test
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2024-07-02 16:45:49 +08:00 |
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Marius Vikhammer
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dff1e5df88
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feat(lp_core): add support for lp timer and lp gpio on P4
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2024-02-06 09:41:20 +08:00 |
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Armando
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3c5a4f9e8a
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ci(p4): added todo jira for disabled tests on p4
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2024-01-04 09:36:38 +08:00 |
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Armando
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1ab742b3c3
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ci(p4): enable esp32p4 target test
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2024-01-04 09:34:55 +08:00 |
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Sudeep Mohanty
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f6ecaa12e9
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ci(system): Restrict ULP test apps being built and run on CI
This commit updates the dependency list of the ULP test apps. These test
apps will now only build and run when the ULP component is updated.
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2023-10-23 10:54:36 +02:00 |
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Chen Yudong
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2e11919f70
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fix(ci): change build-test-rules files folder
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2023-09-20 19:17:06 +08:00 |
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