Commit Graph

468 Commits

Author SHA1 Message Date
chenjianhua 2c93450d59 fix(bt): Update bt lib for ESP32-C3 and ESP32-S3(eca46a0)
- Fixed adv data buffer free after restart adv
- Fixed BLE interrupt allocation using esp API
2024-05-14 14:41:39 +08:00
Erhan Kurubas 8e524d708c fix(coredump): fix buffer overflow inside esp_core_dump_get_summary
Closes https://github.com/espressif/esp-idf/issues/13754
2024-05-07 06:49:28 +02:00
Erhan Kurubas 94fc3630f5 ci(panic): add flash encrypted coredump tests 2024-05-06 15:54:33 +02:00
Erhan Kurubas 551d91ea8a ci(coredump): fix capture dram tests 2024-05-06 15:43:43 +02:00
Alexey Gerenkov 86ef0c23fd refactor(test): Change clang build tests app name 2024-05-03 16:55:18 +03:00
Alexey Gerenkov 57f61d2311 feat(tools): Update Clang version to esp-17.0.1_20240419 2024-05-03 16:55:13 +03:00
Konstantin Kondrashov 8b418d4b09 feat(esp_system): Print backtrace for both CPUs when cache error does not determine CPU 2024-04-30 15:20:58 +03:00
Erhan Kurubas 3b8191cf5d feat(coredump): save .bss, .data and .heap sections to the elf file 2024-04-23 19:07:51 +03:00
Alexey Lapshin 6f2de1fb23 fix(system): esp32p4: fix mepc when load/store failure occurred 2024-04-18 19:49:19 +04:00
Marius Vikhammer 842b6a1dc4 Merge branch 'bugfix/p4_ulp_wakeup' into 'master'
fix(ulp): fixed lp-core not booting during sleep

Closes IDF-9407

See merge request espressif/esp-idf!30296
2024-04-18 16:23:16 +08:00
Marius Vikhammer 1fa59c442b fix(ulp): fixed lp-core not booting during sleep
LP core was unable to boot when system was in deepsleep.
This was due to lp uart init in LP rom using XTAL as clk source,
which is normally powered down during sleep.

This would cause lp uart to get stuck while printing ROM output,
and the app would never boot.

Also fixed wrong wakeup cause used by HP core for ULP wake up
2024-04-18 11:36:30 +08:00
Ivan Grokhotkov 545203f1c8 change(ci): split test_apps build-test-rules, add missing code owners 2024-04-17 11:54:33 +02:00
Marius Vikhammer 4533f16c34 fix(rtc_memory): fix conflict between LP-ROM and RTC reserved 2024-04-17 13:37:56 +08:00
Mahavir Jain 024b040300 test(memprot): enable memory protection tests for P4 2024-04-14 21:16:42 +05:30
Erhan Kurubas 483b4cd65b ci(coredump): enable custom stack tests for riscv chips 2024-04-09 13:36:30 +08:00
Kevin (Lao Kaiyao) 432864e917 Merge branch 'ci/enable_c5_mp_ci_jobs' into 'master'
ci(esp32c5mp): enable esp32c5 build on CI

See merge request espressif/esp-idf!29895
2024-04-08 12:16:16 +08:00
laokaiyao 65b1fd33d3 ci(esp32c5mp): disable the unsupported tests 2024-04-07 12:13:29 +08:00
Chen Yudong 7d13f8210f ci: fix pytest generic env markers 2024-04-03 18:10:43 +08:00
Laukik Hase 48503dd39f fix(esp_hw_support): Fix the flash I/DROM region PMP protection 2024-04-02 18:41:07 +05:30
Jiang Jiang Jian 8da9eb5168 Merge branch 'ci/reenable_bootloader_sections_test_esp32c2' into 'master'
ci(system): re-enable bootloader_sections test for ESP32-C2

See merge request espressif/esp-idf!29852
2024-04-01 23:13:00 +08:00
Michael (XIAO Xufeng) 5d6c56c20d Merge branch 'fix/unused_mmap_include' into 'master'
fix(all): remove unused header includes

See merge request espressif/esp-idf!29816
2024-03-29 10:20:08 +08:00
Wan Lei e84c7f00a5 Merge branch 'feat/c6lite_c61_ci_header_tmp_app' into 'master'
feat(esp32c61): ci enable header check (stage 7/8)

See merge request espressif/esp-idf!29775
2024-03-28 11:45:20 +08:00
wanlei 535afdd7f4 feat(esp32c61): ci enable header check, fix c61 build 2024-03-27 19:39:59 +08:00
Omar Chebib a79c6f7f67 fix(esp_hw_support): clear reserved interrupts that are not applicable for each target 2024-03-27 16:21:25 +08:00
Ivan Grokhotkov ce2ce972b8 ci(system): re-enable bootloader_sections test for ESP32-C2 2024-03-26 16:04:09 +01:00
Xiao Xufeng 313c4f2cdc fix(all): remove unused header includes 2024-03-25 13:58:40 +08:00
Alexey Lapshin cb82161dae feat(system): esp32p4: support panic tests 2024-03-21 15:36:36 +04:00
Guillaume Souchere 85c2daee5b test(esp_intr_dump): Enable test for esp32p4
Added back intr_dump test on esp32p4 target.
Added esp32p4.txt expected output file containing
the list of interrupts.
2024-03-14 11:35:24 +01:00
morris 3f76aca0a3 Merge branch 'contrib/github_pr_13256' into 'master'
Use __builtin_unreachable in HAL_ASSERT no-assert mode (GitHub PR)

Closes IDFGH-12202

See merge request espressif/esp-idf!29237
2024-03-06 18:45:29 +08:00
Marius Vikhammer efc3f9fa88 Merge branch 'bugfix/rom_systimer_config' into 'master'
fix(rom): fixed systimer always using ROM implementation

See merge request espressif/esp-idf!29354
2024-03-06 12:26:06 +08:00
morris be8033701c fix(hal): use __builtin_unreachable in no-assert mode
otherwise due to esp-idf using -Werror, we can get errors in code which
uses HAL_ASSERT if for example the compiler believes that a variable is
used uninitialised, or similar.

Inspired by https://github.com/espressif/esp-idf/pull/13256
2024-03-06 11:50:32 +08:00
Marius Vikhammer b809267359 fix(rom): fixed systimer always using ROM implementation 2024-03-06 09:47:12 +08:00
Konstantin Kondrashov 43c604f145 Merge branch 'feature/move_efuse_related_inits_into_component' into 'master'
feat(efuse): Move efuse-related init steps into the component

Closes IDF-8759 and IDF-8761

See merge request espressif/esp-idf!28422
2024-03-04 17:34:44 +08:00
KonstantinKondrashov f9800e0726 feat(efuse): Move efuse-related init steps into the component 2024-03-01 21:07:03 +02:00
Mahavir Jain e18fd01d0d Merge branch 'fix/pmp_idcache_reg_prot' into 'master'
fix(esp_hw_support): Fix the I/DCACHE region PMP protection

See merge request espressif/esp-idf!28525
2024-02-29 21:39:11 +08:00
Darian Leung 87e2d842ab change(console): Add build test for no console output
This commit adds a build test to test the scenario where both the primary and
secondary console outputs are disabled by Kconfig.
2024-02-28 20:39:52 +08:00
Laukik Hase 2265c0f230 feat(tools/test_apps): Add violation tests for the flash I/DROM region
- For SoCs supporting PMP
2024-02-28 10:54:38 +05:30
Konstantin Kondrashov b8e2342bf8 Merge branch 'bugfix/bootloader_flash_update_size' into 'master'
fix(bootloader_support): Adds bootloader_flash_update_size() for the rest chips

Closes IDFGH-12123

See merge request espressif/esp-idf!29049
2024-02-22 15:49:22 +08:00
Konstantin Kondrashov 1253ab6e27 Merge branch 'feature/move_esp_timer_related_inits_into_component' into 'master'
feat(esp_timer): Move esp_timer-related init steps into the component

Closes IDF-8755

See merge request espressif/esp-idf!28664
2024-02-20 16:49:31 +08:00
Konstantin Kondrashov d348258f2c fix(test_apps): Fix coredump_uart_bin_crc.test_hw_stack_guard_cpu0 test 2024-02-19 19:21:40 +08:00
Konstantin Kondrashov 49ba674fb5 feat(esp_timer): Move esp_timer-related init steps into the component 2024-02-19 19:21:40 +08:00
Konstantin Kondrashov 9ffafd53b2 fix(bootloader_support): Adds bootloader_flash_update_size() for the rest chips
Closes https://github.com/espressif/esp-idf/issues/13179
2024-02-14 17:41:20 +02:00
fl0wl0w 90d1dcfd76 feat(freertos): Introduced new Kconfig option CONFIG_FREERTOS_NUMBER_OF_CORES
This commit replaces the use of portNUM_PROCESSORS and configNUM_CORES
macros in all of ESP-IDF. These macros are needed to realize an SMP
scenario by fetching the number of active cores FreeRTOS is running on.
Instead, a new Kconfig option, CONFIG_FREERTOS_NUMBER_OF_CORES, has been
added as a proxy for the FreeRTOS config option, configNUMBER_OF_CORES.
This new commit is now used to realize an SMP scenario in various places
in ESP-IDF.

[Sudeep Mohanty: Added new Kconfig option CONFIG_FREERTOS_NUMBER_OF_CORES]

Signed-off-by: Sudeep Mohanty <sudeep.mohanty@espressif.com>
2024-02-09 09:11:28 +01:00
Mahavir Jain 34723ad12c Merge branch 'bugfix/ota_anti_rollback_checks_2' into 'master'
feat(bootloader_support): Read secure_version under sha256 protection

Closes IDF-9013

See merge request espressif/esp-idf!28740
2024-02-08 23:10:08 +08:00
Marius Vikhammer 2bb16ed45b refactor(pthread): decouple pthread_init from esp_system 2024-02-08 09:40:46 +08:00
Mahavir Jain 3305cb4d23 fix(ota): additional checks for secure version in anti-rollback case
Some additional checks related to secure version of the application in
anti-rollback case have been added to avoid any attempts to boot lower
security version but valid application (e.g., passive partition image).

- Read secure_version under sha256 protection

- First check has been added in the bootloader to ensure correct secure
  version after application verification and loading stage. This check
  happens before setting up the flash cache mapping and handling over
  the final control to application. This check ensures that application
  was not swapped (e.g., to lower security version but valid image) just
  before the load stage in bootloader.

- Second check has been added in the application startup code to ensure
  that currently booting app has higher security version than the one
  programmed in the eFuse for anti-rollback scenario. This will ensure
  that only the legit application boots-up on the device for
  anti-rollback case.
2024-02-07 22:23:10 +08:00
Fu Hanxi e9f4d555a6 test: add missing host_test marker for qemu tests 2024-01-29 13:52:40 +01:00
Erhan Kurubas f1d5f97719 feat(coredump): use SHA ROM functions for all targets except ESP32
For ESP32, continue using mbedtls due to a required ROM patch for the SHA implementation.
For other targets, we can now leverage the ROM functions.
2024-01-25 15:13:56 +01:00
Marius Vikhammer 297607587b test(panic): remove WDT both CPU test
Test never worked on S3/P4 and was flakey on ESP32. Hard to design a reliable test
case that triggers both WDT at the exact same time.
2024-01-23 11:55:18 +08:00
Fu Hanxi 4afb86fce3 test: fix custom additional app for multicore test cases 2024-01-16 20:20:42 +01:00