Commit Graph

12 Commits

Author SHA1 Message Date
Guillaume Souchere 6005cc9163 hal: Deprecate interrupt_controller_hal.h, cpu_hal.h and cpu_ll.h interfaces
This commit marks all functions in interrupt_controller_hal.h, cpu_ll.h and cpu_hal.h as deprecated.
Users should use functions from esp_cpu.h instead.
2022-07-22 00:06:06 +08:00
David Cermak 343cf2696e esp_eth: Reduce internal deps onto netif-glue 2022-06-09 07:55:40 +00:00
David Cermak c63c8d4df1 esp_eth: Fix open-cores explicit inclusion 2022-03-23 09:05:30 +01:00
Jon Shallow 154ad2e0e1 esp_eth_mac_openeth.c: Fix issue created by generic check macros update
Merges https://github.com/espressif/esp-idf/pull/6936
2021-04-26 08:40:07 +00:00
morris ef344d89ae esp_eth: apply generic error check macros 2021-04-13 10:54:33 +08:00
morris 4e38aab1b0 ethernet: support flow control for esp32 emac 2020-08-10 18:54:25 +08:00
morris 1184366387 ethernet: support pin emac task to core 2020-05-29 17:51:37 +08:00
morris 6020d6a5d4 ethernet: esp_eth_stop API should stop emac hardware 2020-05-13 15:58:42 +08:00
morris 7baf7ce273 ethernet: optimise tx and rx 2019-12-24 11:18:31 +08:00
morris c3ee156df0 ethernet: move netif glue && add ref counter
1. move netif glue into single file
2. add reference counter for Ethernet driver
2019-11-27 10:36:32 +08:00
suda-morris f3d0429a9e ethernet: add reference counter for mac and phy 2019-11-20 10:36:45 +08:00
Ivan Grokhotkov 31dac92e5f ethernet: support OpenCores ethernet MAC
OpenCores Ethernet MAC has a relatively simple interface, and is
already supported in QEMU. This makes it a good candidate for enabling
network support when running IDF apps in QEMU, compared to the
relatively more complex task of writing a QEMU model of ESP32 EMAC.

This driver is written with QEMU in mind: it does not implement or
handle things that aren't implemented or handled in the QEMU model:
error flags, error interrupts. The transmit part of the driver also
assumes that the TX operation is done immediately when the TX
descriptor is written (which is the case with QEMU), hence waiting for
the TX operation to complete is not necessary.

For simplicity, the driver assumes that the peripheral register
occupy the same memory range as the ESP32 EMAC registers, and the
same interrupt source number is used.
2019-10-13 17:05:26 +02:00