9 Commits

Author	SHA1	Message	Date
XiaXiaotian	42cefc173f	refractor WiFi clock setting ... Do not set WiFi clock in PHY initializing function, move it to WiFi start/stop function.	2017-11-02 15:24:21 +08:00
wangmengyang	bd6394db92	component/bt: clean up WIFI_CLK_EN_REG settings for Bluetooth ... 1. move settings of WIFI_CLK_EN_REG for bluetooth into controller init/deinit APIs 2. modify the bit mask used in phy_rf init/deinit to use WIFI-BT shared bits	2017-11-02 15:24:21 +08:00
Angus Gratton	0dd9b899b7	periph_ctrl: Refactor to add periph_module_reset(), avoid potential race in SPI DMA workaround ... Also refactor use of direct clock access in unit test ref_clock (probably not a real issue)	2017-10-02 17:48:16 +11:00
Ivan Grokhotkov	956a28a95c	driver: add periph_ctrl support for SDMMC, SDIO slave, CAN, EMAC	2017-09-04 22:43:51 +08:00
michael	b834fcf78a	fix(spi_master): this fix the SPI MOSI output missing bug.	2017-09-04 22:43:51 +08:00
Jeroen Domburg	23455de4c2	Add SPI Master driver, example, test and docs	2017-01-06 14:20:32 +08:00
Wangjialin	a97e076dec	add pcnt.rst	2016-11-23 19:07:30 +08:00
Wangjialin	6a1dbc3f1c	add RMT driver and example	2016-11-22 00:57:19 +08:00
Wangjialin	e523a2532a	Modify LEDC driver ... 1. configure LEDC timer saparately 2. add peripher_crtl.c/.h To enable the peripheral modules, we have to set/clear the control register in dport_reg.h. These bits are disabled by default and they are all in a same register, so we need to add a lock on that. 3. add include esp_err.h in gpio.h	2016-09-28 23:20:34 +08:00