438046d809
Merge branch 'fix/fix_esp32c5_xtal32k_clock_lost_in_sleep_v5.5' into 'release/v5.5'
...
fix(esp_system): manage slow clock sleep pd in select_rtc_slow_clk (v5.5)
See merge request espressif/esp-idf!42494
2025-10-20 14:36:47 +08:00
ea36c4f609
Merge branch 'feature/esp_tee_c5_v5.5' into 'release/v5.5'
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feat(esp_tee): Initial support for ESP32-C5 and related changes (v5.5)
See merge request espressif/esp-idf!42357
2025-10-16 09:39:23 +05:30
508a659001
feat(esp_tee): Support for ESP32-C5 - the rest of the components
2025-10-14 10:12:11 +05:30
e6d4eec507
feat(p4): p4 rev3 real chip support
2025-10-13 15:25:23 +08:00
3d3b287672
fix(esp_system): manage slow clock sleep pd in select_rtc_slow_clk
2025-10-10 20:04:58 +08:00
69c31289ad
fix(clk): clear force_on reg for cache
2025-10-09 13:19:46 +08:00
dafdf1205d
Merge branch 'feat/secure_boot_ecdsa_p384_v5.5' into 'release/v5.5'
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Support Secure Boot using ECDSA-P384 curve (v5.5)
See merge request espressif/esp-idf!40822
2025-07-31 21:24:55 +08:00
92a09ce7f0
Merge branch 'fix/fix_submode_assert_in_slowck_changed_ota_v5.5' into 'release/v5.5'
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fix(esp_hw_support): fix assert when changing 8MD256 RTC slow clock source during OTA (v5.5)
See merge request espressif/esp-idf!40820
2025-07-30 10:46:31 +08:00
12393745c2
fix(esp_system): Remove redundant crypto clock source selection
2025-07-25 14:43:56 +05:30
ddbf8391d9
fix(esp_hw_support): enable ESP_SLEEP_RTC_FAST_USE_XTAL_MODE only once in RTC_FAST selection
2025-07-25 16:49:16 +08:00
e72ea712e7
feat(esp_system): Adds Kconfigs to place code in IRAM
2025-07-24 00:34:58 +08:00
0291ab0dfb
Merge branch 'feature/support_chip912_pvt_auto_dbias_360m_backport_v5.5' into 'release/v5.5'
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feat(esp_hw_support): use pvt to auto control digital ldo and rtc ldo for esp32p4_backport_v5.5
See merge request espressif/esp-idf!40676
2025-07-22 17:36:09 +08:00
e2d5f85804
Merge branch 'feat/call_start_in_flash_v5.5' into 'release/v5.5'
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esp_system: move call_start_cpu* into flash to save IRAM (v5.5)
See merge request espressif/esp-idf!39926
2025-07-22 14:38:14 +08:00
3c39b32195
Chip/support esp32c61 v5.5
2025-07-22 12:21:36 +08:00
3d3731965c
feat(esp_hw_support): use pvt to auto control digital ldo and rtc ldo for esp32p4
2025-07-18 09:54:31 +08:00
c844ba4f7f
fix(esp_system): force enable uart0 sclk in esp_restart
2025-07-03 19:13:41 +08:00
e1faf670b2
feat(hw_support): move call_start_cpu0 into flash to save IRAM
2025-06-17 15:11:36 +08:00
2e7a9174fc
Merge branch 'feature/esp_tee_h2_v5.5' into 'release/v5.5'
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feat(esp_tee): Support for ESP32-H2 (v5.5)
See merge request espressif/esp-idf!39311
2025-06-16 12:04:22 +05:30
59496b4927
fix(system_internal): Avoid the sec clock reset caused due to resetting all crypto peripherals
2025-05-26 11:40:51 +05:30
27496e47f0
feat(esp_tee): Support for ESP32-H2 - the rest of the components
2025-05-21 10:06:17 +05:30
5e6ecd81b5
refactor: move_ocode_to_pmu_init_c6_c5_c61 (v5.5)
2025-05-20 21:14:56 +08:00
46225a4026
feat(esp_psram): Add a new API to just detect and enable the PSRAM
...
- esp_psram_chip_init() just detects and does basic initialisations of PSRAM
- esp_psram_init() initialises and maps/loads the PSRAM pages
2025-04-29 11:48:27 +05:30
112a955111
Merge branch 'feature/h21_reset_reason' into 'master'
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feat(system): updated reset reasons for H21
Closes IDF-11542
See merge request espressif/esp-idf!38774
2025-04-28 17:35:30 +08:00
298da837fd
feat(system): updated reset reasons for H21
2025-04-27 16:11:24 +08:00
b9d055dfda
Merge branch 'fix/multi_core_race_cond_in_panic_handler' into 'master'
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fix(panic_handler): Prevent race condition in panic handler
Closes IDFCI-2802, IDFCI-2867, and IDFCI-2869
See merge request espressif/esp-idf!37958
2025-04-23 18:52:16 +08:00
e37c47f6e7
Merge branch 'bugfix/crypto_reset_on_exit' into 'master'
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fix(esp_system): reset crypto peripherals before device restart
See merge request espressif/esp-idf!38399
2025-04-17 21:24:25 +08:00
edf4234da9
fix(panic_handler): Prevent race condition in panic handler
...
This commit updates all RTC WDT contexts to be local instead of global
to avoid race conditions when both cores enter the panic handler
simultaneously.
2025-04-17 13:56:25 +02:00
4a4d63d36e
feat(esp_tee): Protect the ECC peripheral from REE access
2025-04-16 19:19:04 +05:30
fc4802c0d6
feat(esp_tee): Protect the HMAC and DS peripherals from REE access
2025-04-16 19:19:04 +05:30
55a2ad3df3
fix(esp_system): reset crypto peripherals before device restart
...
This change addresses a rare but critical issue observed on certain
ESP32-C3 and ESP32-S3 devices, where secure boot verification
intermittently fails due to improper cleanup of crypto peripherals
during a restart.
Background – Restart Behavior in IDF
------------------------------------
In ESP-IDF, when the device restarts (via `esp_restart()` or due to a
panic/exception), a partial peripheral reset is performed followed by a
CPU reset. However, until now, crypto-related peripherals were not
included in this selective reset sequence.
Problem Scenario
----------------
If a restart occurs while the application is in the middle of a bignum
operation (i.e., using the MPI/Bignum peripheral), the ROM code may
encounter an inconsistent peripheral state during the subsequent boot.
This leads to transient RSA-PSS secure boot verification failures.
Following such a failure, the ROM typically triggers a full-chip reset
via the watchdog timer (WDT). This full reset clears the crypto
peripheral state, allowing secure boot verification to succeed on the
next boot.
Risk with Aggressive Revocation
-------------------------------
If secure boot aggressive revocation is enabled (disabled by default in
IDF), this transient verification failure could mistakenly lead to
revocation of the secure boot digest.
If your product configuration has aggressive revocation enabled,
applying this fix is strongly recommended.
Frequency of Occurrence
-----------------------
The issue is rare and only occurs in corner cases involving
simultaneous use of the MPI peripheral and an immediate CPU reset.
Fix
---
This fix ensures that all crypto peripherals are explicitly reset prior
to any software-triggered restart (including panic scenarios),
guaranteeing a clean peripheral state for the next boot and preventing
incorrect secure boot behavior.
2025-04-15 19:06:26 +05:30
b3911c7c89
fix(esp_hw_support): fix unused OSC source deinit breaks XTAL32K configuration
2025-04-10 20:56:53 +08:00
38fcc41ff2
Merge branch 'feat/enable_esp32p4_auto_clock_gate' into 'master'
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feat(esp_hw_support): enable auto clock gating for multi peripherals
See merge request espressif/esp-idf!37986
2025-04-09 21:42:04 +08:00
6ca0614e89
feat(esp_hw_support): enable auto clock gating for multi peripherals
2025-04-09 17:07:49 +08:00
c84757d35e
fix(esp_hw_support): fix current leakage if ext32k slow clock source not exists
2025-04-08 20:07:47 +08:00
2cbc297969
refactor(gptimer): use group_id in clock ctrl functions
2025-04-08 10:20:48 +08:00
faacaaaf8f
feat(gptimer): support gptimer on esp32h4
2025-04-08 09:55:42 +08:00
51873d46aa
feat(driver_spi): add h21 spi drivers supports
2025-04-03 11:27:29 +08:00
ee5042095b
Merge branch 'refactor/psram_structure_refactor' into 'master'
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refactor(psram): cleanup psram component code structure
See merge request espressif/esp-idf!37870
2025-03-21 00:52:03 +08:00
ac8cfadab0
refactor(psram): cleanup psram component code structure
2025-03-20 15:17:01 +08:00
44117b623d
refactor(esp_rom): remove specific chip name when including rom header
2025-03-17 18:53:26 +08:00
350e3c3d06
fix(esp_system): update clk code for esp32h21
2025-03-17 11:24:39 +08:00
8103ea67c7
change(esp_hw_support): pmu driver, hal and ll layer support for esp32h21
2025-03-17 11:24:39 +08:00
b622aa382f
Merge branch 'feat/h4_introduce_step6_esp_system' into 'master'
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feat(esp32h4): support esp_system, esp_timer and freertos (stage6)
Closes IDF-12565
See merge request espressif/esp-idf!37269
2025-03-12 14:10:23 +08:00
69d2e7facb
refactor(cpu): move some chip-specific operations to the ll
2025-03-11 16:48:21 +08:00
8e8c0573b4
feat(esp32h4): support esp_system, esp_timer and freertos (stage6)
2025-03-11 16:48:21 +08:00
ae10c1333d
fix(esp_system): removed L2MEM buffer enable for P4
2025-03-11 14:53:29 +08:00
aa2f638e06
Merge branch 'fix/fix_esp32s3_reboot_cache_failure' into 'master'
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fix(esp_system): fix esp32s3 possible cache_error triggered by another core accessing flash in esp_restart
See merge request espressif/esp-idf!37554
2025-03-07 20:26:19 +08:00
d64ca3a5d1
fix(mspi): fixed cpu and mspi freq mismatch issue when in dfs/sleep on p4
2025-03-07 12:27:16 +08:00
d418cb4a40
fix(esp_system): fix possible cache_error by another core accessing flash in esp_restart
2025-03-06 21:21:54 +08:00
2cd87223a8
feat(l2mem): enable buffer mode for ahb burst access
2025-03-03 14:38:24 +08:00
Jiang Jiang Jian