Commit Graph

698 Commits

Author SHA1 Message Date
Jiang Jiang Jian 0291ab0dfb Merge branch 'feature/support_chip912_pvt_auto_dbias_360m_backport_v5.5' into 'release/v5.5'
feat(esp_hw_support): use pvt to auto control digital ldo and rtc ldo for esp32p4_backport_v5.5

See merge request espressif/esp-idf!40676
2025-07-22 17:36:09 +08:00
Jiang Jiang Jian e2d5f85804 Merge branch 'feat/call_start_in_flash_v5.5' into 'release/v5.5'
esp_system: move call_start_cpu* into flash to save IRAM (v5.5)

See merge request espressif/esp-idf!39926
2025-07-22 14:38:14 +08:00
Jiang Jiang Jian 3c39b32195 Chip/support esp32c61 v5.5 2025-07-22 12:21:36 +08:00
yanzihan@espressif.com 3d3731965c feat(esp_hw_support): use pvt to auto control digital ldo and rtc ldo for esp32p4 2025-07-18 09:54:31 +08:00
wuzhenghui c844ba4f7f fix(esp_system): force enable uart0 sclk in esp_restart 2025-07-03 19:13:41 +08:00
Michael (XIAO Xufeng) e1faf670b2 feat(hw_support): move call_start_cpu0 into flash to save IRAM 2025-06-17 15:11:36 +08:00
Aditya Patwardhan 2e7a9174fc Merge branch 'feature/esp_tee_h2_v5.5' into 'release/v5.5'
feat(esp_tee): Support for ESP32-H2 (v5.5)

See merge request espressif/esp-idf!39311
2025-06-16 12:04:22 +05:30
harshal.patil 59496b4927 fix(system_internal): Avoid the sec clock reset caused due to resetting all crypto peripherals 2025-05-26 11:40:51 +05:30
Laukik Hase 27496e47f0 feat(esp_tee): Support for ESP32-H2 - the rest of the components 2025-05-21 10:06:17 +05:30
chaijie@espressif.com 5e6ecd81b5 refactor: move_ocode_to_pmu_init_c6_c5_c61 (v5.5) 2025-05-20 21:14:56 +08:00
harshal.patil 46225a4026 feat(esp_psram): Add a new API to just detect and enable the PSRAM
- esp_psram_chip_init() just detects and does basic initialisations of PSRAM
- esp_psram_init() initialises and maps/loads the PSRAM pages
2025-04-29 11:48:27 +05:30
Marius Vikhammer 112a955111 Merge branch 'feature/h21_reset_reason' into 'master'
feat(system): updated reset reasons for H21

Closes IDF-11542

See merge request espressif/esp-idf!38774
2025-04-28 17:35:30 +08:00
Marius Vikhammer 298da837fd feat(system): updated reset reasons for H21 2025-04-27 16:11:24 +08:00
Sudeep Mohanty b9d055dfda Merge branch 'fix/multi_core_race_cond_in_panic_handler' into 'master'
fix(panic_handler): Prevent race condition in panic handler

Closes IDFCI-2802, IDFCI-2867, and IDFCI-2869

See merge request espressif/esp-idf!37958
2025-04-23 18:52:16 +08:00
Mahavir Jain e37c47f6e7 Merge branch 'bugfix/crypto_reset_on_exit' into 'master'
fix(esp_system): reset crypto peripherals before device restart

See merge request espressif/esp-idf!38399
2025-04-17 21:24:25 +08:00
Sudeep Mohanty edf4234da9 fix(panic_handler): Prevent race condition in panic handler
This commit updates all RTC WDT contexts to be local instead of global
to avoid race conditions when both cores enter the panic handler
simultaneously.
2025-04-17 13:56:25 +02:00
Laukik Hase 4a4d63d36e feat(esp_tee): Protect the ECC peripheral from REE access 2025-04-16 19:19:04 +05:30
Laukik Hase fc4802c0d6 feat(esp_tee): Protect the HMAC and DS peripherals from REE access 2025-04-16 19:19:04 +05:30
Mahavir Jain 55a2ad3df3 fix(esp_system): reset crypto peripherals before device restart
This change addresses a rare but critical issue observed on certain
ESP32-C3 and ESP32-S3 devices, where secure boot verification
intermittently fails due to improper cleanup of crypto peripherals
during a restart.

Background – Restart Behavior in IDF
------------------------------------
In ESP-IDF, when the device restarts (via `esp_restart()` or due to a
panic/exception), a partial peripheral reset is performed followed by a
CPU reset. However, until now, crypto-related peripherals were not
included in this selective reset sequence.

Problem Scenario
----------------
If a restart occurs while the application is in the middle of a bignum
operation (i.e., using the MPI/Bignum peripheral), the ROM code may
encounter an inconsistent peripheral state during the subsequent boot.
This leads to transient RSA-PSS secure boot verification failures.

Following such a failure, the ROM typically triggers a full-chip reset
via the watchdog timer (WDT). This full reset clears the crypto
peripheral state, allowing secure boot verification to succeed on the
next boot.

Risk with Aggressive Revocation
-------------------------------
If secure boot aggressive revocation is enabled (disabled by default in
IDF), this transient verification failure could mistakenly lead to
revocation of the secure boot digest.

If your product configuration has aggressive revocation enabled,
applying this fix is strongly recommended.

Frequency of Occurrence
-----------------------
The issue is rare and only occurs in corner cases involving
simultaneous use of the MPI peripheral and an immediate CPU reset.

Fix
---
This fix ensures that all crypto peripherals are explicitly reset prior
to any software-triggered restart (including panic scenarios),
guaranteeing a clean peripheral state for the next boot and preventing
incorrect secure boot behavior.
2025-04-15 19:06:26 +05:30
wuzhenghui b3911c7c89 fix(esp_hw_support): fix unused OSC source deinit breaks XTAL32K configuration 2025-04-10 20:56:53 +08:00
Wu Zheng Hui 38fcc41ff2 Merge branch 'feat/enable_esp32p4_auto_clock_gate' into 'master'
feat(esp_hw_support): enable auto clock gating for multi peripherals

See merge request espressif/esp-idf!37986
2025-04-09 21:42:04 +08:00
wuzhenghui 6ca0614e89 feat(esp_hw_support): enable auto clock gating for multi peripherals 2025-04-09 17:07:49 +08:00
wuzhenghui c84757d35e fix(esp_hw_support): fix current leakage if ext32k slow clock source not exists 2025-04-08 20:07:47 +08:00
Chen Jichang 2cbc297969 refactor(gptimer): use group_id in clock ctrl functions 2025-04-08 10:20:48 +08:00
Chen Jichang faacaaaf8f feat(gptimer): support gptimer on esp32h4 2025-04-08 09:55:42 +08:00
wanckl 51873d46aa feat(driver_spi): add h21 spi drivers supports 2025-04-03 11:27:29 +08:00
Armando (Dou Yiwen) ee5042095b Merge branch 'refactor/psram_structure_refactor' into 'master'
refactor(psram): cleanup psram component code structure

See merge request espressif/esp-idf!37870
2025-03-21 00:52:03 +08:00
armando ac8cfadab0 refactor(psram): cleanup psram component code structure 2025-03-20 15:17:01 +08:00
Chen Jichang 44117b623d refactor(esp_rom): remove specific chip name when including rom header 2025-03-17 18:53:26 +08:00
Li Shuai 350e3c3d06 fix(esp_system): update clk code for esp32h21 2025-03-17 11:24:39 +08:00
Li Shuai 8103ea67c7 change(esp_hw_support): pmu driver, hal and ll layer support for esp32h21 2025-03-17 11:24:39 +08:00
morris b622aa382f Merge branch 'feat/h4_introduce_step6_esp_system' into 'master'
feat(esp32h4): support esp_system, esp_timer and freertos (stage6)

Closes IDF-12565

See merge request espressif/esp-idf!37269
2025-03-12 14:10:23 +08:00
Chen Jichang 69d2e7facb refactor(cpu): move some chip-specific operations to the ll 2025-03-11 16:48:21 +08:00
Chen Jichang 8e8c0573b4 feat(esp32h4): support esp_system, esp_timer and freertos (stage6) 2025-03-11 16:48:21 +08:00
Ondrej Kosta ae10c1333d fix(esp_system): removed L2MEM buffer enable for P4 2025-03-11 14:53:29 +08:00
Jiang Jiang Jian aa2f638e06 Merge branch 'fix/fix_esp32s3_reboot_cache_failure' into 'master'
fix(esp_system): fix esp32s3  possible cache_error triggered by another core accessing flash in esp_restart

See merge request espressif/esp-idf!37554
2025-03-07 20:26:19 +08:00
Armando d64ca3a5d1 fix(mspi): fixed cpu and mspi freq mismatch issue when in dfs/sleep on p4 2025-03-07 12:27:16 +08:00
wuzhenghui d418cb4a40 fix(esp_system): fix possible cache_error by another core accessing flash in esp_restart 2025-03-06 21:21:54 +08:00
morris 2cd87223a8 feat(l2mem): enable buffer mode for ahb burst access 2025-03-03 14:38:24 +08:00
Laukik Hase 26fa7109f3 fix(esp_tee): Protect the AES/SHA clock registers from REE access 2025-02-25 16:49:08 +05:30
Sudeep Mohanty b562afa08e fix(panic_handler): Updated panic handler to use RTC WDT
This commit updates the following:
- Updates the panic handler to use only the RTC WDT to reset the system.
- Refactors some of the panic handler code.
- Updates Bluetooth files where in they now feed the WDTs instead of
  reconfiguring them.
- Removes some unnecessary configuration of WDTs from various files.
- Added a unit test to verify that the system does not lock up when the
  panic handler is stuck.
- Updates the memprot unit tests to work with the refactored panic
  handler.

Closes https://github.com/espressif/esp-idf/issues/15166
Closes https://github.com/espressif/esp-idf/issues/15018
Closes https://github.com/espressif/esp-idf/issues/10110
2025-02-18 15:40:54 +01:00
Chen Ji Chang 9342b3fba1 Merge branch 'feat/h4_introduce_step1_add_target' into 'master'
feat(esp32h4): introduce target esp32h4(stage 1)

See merge request espressif/esp-idf!36780
2025-02-11 18:11:08 +08:00
Jiang Jiang Jian 44a27d3113 Merge branch 'fix/disable_wfe_feature_for_e906_chips' into 'master'
change(esp_hw_support): disable CPU wait-for-event mode on cpu start

See merge request espressif/esp-idf!36388
2025-02-11 11:30:29 +08:00
Chen Jichang 6f83f39dce feat(esp32h4): introduce target esp32h4(stage 1) 2025-02-08 17:07:44 +08:00
Li Shuai 377914d579 change(esp_hw_support): fix wifi mac rx buffer link exception caused by pll clock 2025-01-17 17:16:39 +08:00
laokaiyao 692ca37edf refactor(lpperi): improve compatibility solution 2025-01-15 17:12:59 +08:00
wuzhenghui 121f56ef6d change(esp_hw_support): disable CPU wait-for-event mode on cpu start 2025-01-14 21:34:44 +08:00
Jiang Jiang Jian 0f0068fff3 Merge branch 'fix/fix_branch_predictor_access_flash_after_cache_diabled' into 'master'
fix(esp_hw_support): fix branch predictor access flash after cache disabled

Closes PM-329

See merge request espressif/esp-idf!36281
2025-01-14 10:56:17 +08:00
Omar Chebib 52b558d218 Merge branch 'feature/enable_fp_backtracing' into 'master'
feat(riscv): implement frame pointer option for backtracing

See merge request espressif/esp-idf!32342
2025-01-13 18:11:49 +08:00
wuzhenghui 7a4cc8ed35 fix(esp_hw_support): fix branch predictor access flash after cache disabled 2025-01-13 10:28:09 +08:00