e2d5f85804
Merge branch 'feat/call_start_in_flash_v5.5' into 'release/v5.5'
...
esp_system: move call_start_cpu* into flash to save IRAM (v5.5)
See merge request espressif/esp-idf!39926
2025-07-22 14:38:14 +08:00
3c39b32195
Chip/support esp32c61 v5.5
2025-07-22 12:21:36 +08:00
e1faf670b2
feat(hw_support): move call_start_cpu0 into flash to save IRAM
2025-06-17 15:11:36 +08:00
46225a4026
feat(esp_psram): Add a new API to just detect and enable the PSRAM
...
- esp_psram_chip_init() just detects and does basic initialisations of PSRAM
- esp_psram_init() initialises and maps/loads the PSRAM pages
2025-04-29 11:48:27 +05:30
ac8cfadab0
refactor(psram): cleanup psram component code structure
2025-03-20 15:17:01 +08:00
b622aa382f
Merge branch 'feat/h4_introduce_step6_esp_system' into 'master'
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feat(esp32h4): support esp_system, esp_timer and freertos (stage6)
Closes IDF-12565
See merge request espressif/esp-idf!37269
2025-03-12 14:10:23 +08:00
69d2e7facb
refactor(cpu): move some chip-specific operations to the ll
2025-03-11 16:48:21 +08:00
8e8c0573b4
feat(esp32h4): support esp_system, esp_timer and freertos (stage6)
2025-03-11 16:48:21 +08:00
ae10c1333d
fix(esp_system): removed L2MEM buffer enable for P4
2025-03-11 14:53:29 +08:00
2cd87223a8
feat(l2mem): enable buffer mode for ahb burst access
2025-03-03 14:38:24 +08:00
44a27d3113
Merge branch 'fix/disable_wfe_feature_for_e906_chips' into 'master'
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change(esp_hw_support): disable CPU wait-for-event mode on cpu start
See merge request espressif/esp-idf!36388
2025-02-11 11:30:29 +08:00
692ca37edf
refactor(lpperi): improve compatibility solution
2025-01-15 17:12:59 +08:00
121f56ef6d
change(esp_hw_support): disable CPU wait-for-event mode on cpu start
2025-01-14 21:34:44 +08:00
0f0068fff3
Merge branch 'fix/fix_branch_predictor_access_flash_after_cache_diabled' into 'master'
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fix(esp_hw_support): fix branch predictor access flash after cache disabled
Closes PM-329
See merge request espressif/esp-idf!36281
2025-01-14 10:56:17 +08:00
7a4cc8ed35
fix(esp_hw_support): fix branch predictor access flash after cache disabled
2025-01-13 10:28:09 +08:00
aac16530a0
refactor(lpperi): compatible refactor for H2 ECO5
2025-01-10 18:47:43 +08:00
34c7d62855
refactor(hw_support): combine esp_hw_support rtc header to a single file
2024-12-30 10:09:34 +08:00
b240defc75
feat(esp32h21): support esp_system, esp_timer and freertos (stage5)
2024-12-20 22:43:10 +08:00
63ea6113ba
fix(cache): fixed cache hal ctx not initialised in app issue
2024-12-18 16:41:35 +08:00
733741bbac
feat(esp_tee): Support for ESP-TEE - esp_system component
2024-12-02 12:20:04 +05:30
1eef2e8c19
feat(mspi): supported flash 120MHz SDR timing tuning on ESP32P4
2024-11-28 14:53:19 +08:00
d2fe62f682
feat(esp_system): stop other core for unicore esp32p4
2024-11-07 14:00:55 +01:00
5976e391ea
fix(esp_system): Correct address used to fetch application image header
2024-11-04 09:58:37 +05:30
e52e2d282a
refactor(startup): move key manager specific code to esp_security component
2024-09-25 14:21:19 +05:30
d9c15bb772
fix(ci): some actions taken to pass CI
2024-09-20 10:53:05 +08:00
256ef127dd
fix(linker): fixed extern linker symbol type from int to char
2024-09-14 11:11:55 +08:00
05e74480f5
feat(esp_system): gate some clock by default to optmize esp32p4 active power
2024-09-11 10:53:00 +08:00
d1c47835a2
fix(security): Fixed flash encryption for esp32p4
...
The flash encryption on esp32p4 was broken due to some code related
to key manager not being executed when key manager support was
disabled on esp32p4 target.
This commit fixes that behaviour
Additionally, the atomic env enablement for
key_mgr_ll_enable_peripheral_clock was fixed.
2024-09-02 14:00:55 +08:00
47a0677525
feat(pm): support ext1_wakeup/esp_deep_sleep_enable_gpio_wakeup for esp32c5mp deepsleep
2024-08-28 10:44:08 +08:00
55dccc4bba
fix(MMU): fixed mmap deadlock when using multicore app with unicore bootloader
...
Closes https://github.com/espressif/esp-idf/issues/11617
2024-08-15 12:00:08 +08:00
8c22cb6c6a
feat(psram): support bss on psram on p4
2024-07-15 10:44:13 +08:00
b19f9242d7
fix(usb_otg): Fix bug that usb_otg console cannot work on esp32s3
2024-06-26 11:20:19 +08:00
5b71b949be
fix(startup): move rtc initialization before MSPI timing tuning to improve stability
2024-06-18 01:16:24 +08:00
10d3912c70
feat(xip_psram): support xip psram feature on esp32p4
2024-05-22 15:56:07 +08:00
3e477681ac
change(cpu_start): added note about internal ram only stage
2024-05-22 14:13:29 +08:00
72cb920799
bugfix(cpu_start): check c3 efuse error log on ram app condition
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Prior to this commit, esp_efuse_check_errors() is only called when it's
2nd stage btld app.
This commit moves this error check so under all conditions (including
ram app, pure ram app) will check this efuse error
2024-05-22 14:13:29 +08:00
24895ac93c
refactor(cpu_start): move uni/multi core log later
2024-05-22 14:13:29 +08:00
3eb6487bb5
fix(bootloader_support): Make esp_flash_encrypt.h independent of spi_flash_mmap.h header
2024-05-13 16:54:45 +05:30
9c108f2da6
feat(esp_hw_support): brought up RNG on ESP32-P4
2024-04-01 07:09:11 +05:30
5d6c56c20d
Merge branch 'fix/unused_mmap_include' into 'master'
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fix(all): remove unused header includes
See merge request espressif/esp-idf!29816
2024-03-29 10:20:08 +08:00
ccaae61fee
feat(esp_hw_support): support esp32p4 deepsleep
2024-03-27 13:59:36 +08:00
cf59c00564
change(mpll): clean up mpll clock acquire with ldo driver
2024-03-25 22:03:49 +08:00
313c4f2cdc
fix(all): remove unused header includes
2024-03-25 13:58:40 +08:00
a611e91b2f
feat(esp32c61): new chip add system and esp_timer support
2024-03-21 11:31:15 +08:00
43c604f145
Merge branch 'feature/move_efuse_related_inits_into_component' into 'master'
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feat(efuse): Move efuse-related init steps into the component
Closes IDF-8759 and IDF-8761
See merge request espressif/esp-idf!28422
2024-03-04 17:34:44 +08:00
f9800e0726
feat(efuse): Move efuse-related init steps into the component
2024-03-01 21:07:03 +02:00
824c8e0593
feat(esp_system): allow .bss to spill over into L2MEM above 0x4ff40000
...
This commit introduce SOC_MEM_NON_CONTIGUOUS_SRAM flag (that enebled for
esp32p4). If SOC_MEM_NON_CONTIGUOUS_SRAM is enabled:
- LDFLAGS+=--enable-non-contiguous-regions
- ldgen.py replaces "arrays[*]" from sections.ld.in with objects under
SURROUND keyword. (e.g. from linker.lf: data -> dram0_data SURROUND(foo))
- "mapping[*]" - refers to all other data
If SOC_MEM_NON_CONTIGUOUS_SRAM, sections.ld.in file should contain at
least one block of code like this (otherwise it does not make sense):
.dram0.bss (NOLOAD) :
{
arrays[dram0_bss]
mapping[dram0_bss]
} > sram_low
.dram1.bss (NOLOAD) :
{
/* do not place here arrays[dram0_bss] because it may be splited
* between segments */
mapping[dram0_bss]
} > sram_high
2024-02-28 19:41:25 +04:00
06850e0e1e
refactor(system): removed esp_system from astyle ignore list and reformated it
2024-01-30 15:17:15 +08:00
4dc2ace0b7
fix(esp_hw_support): Update key manager support
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1) Added new Key Manager APIs
2) Added crypto locking layer for Key Manager
3) Remove support for deploying known key
4) Format key manager support
5) Fix build header error
6) Updated the key_mgr_types.h file
7) Added key manager tests
2024-01-23 10:24:39 +05:30
102d5bbf72
refactor(riscv): added a new API for the interrupts
2024-01-18 16:36:53 +08:00
Jiang Jiang Jian