08f5f0d66b
This reverts commit 7145fc9558752a6532072bb272e94389807eda51.
38 lines
1.6 KiB
Plaintext
38 lines
1.6 KiB
Plaintext
choice ESP_DEFAULT_CPU_FREQ_MHZ
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prompt "CPU frequency"
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default ESP_DEFAULT_CPU_FREQ_MHZ_40 if IDF_ENV_FPGA
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default ESP_DEFAULT_CPU_FREQ_MHZ_160 if SECURE_FLASH_ENC_ENABLED
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default ESP_DEFAULT_CPU_FREQ_MHZ_240
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help
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CPU frequency to be set on application startup. For flash encryption enabled case,
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the default CPU frequency is 160MHz as the encrypted flash writes are not stable at
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higher CPU clock. Please see SoC Errata document for details.
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config ESP_DEFAULT_CPU_FREQ_MHZ_40
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bool "40 MHz"
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depends on IDF_ENV_FPGA
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config ESP_DEFAULT_CPU_FREQ_MHZ_80
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bool "80 MHz"
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config ESP_DEFAULT_CPU_FREQ_MHZ_160
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bool "160 MHz"
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config ESP_DEFAULT_CPU_FREQ_MHZ_240
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# Encrypted flash writes aren't supported at 240 MHz.
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# Please see SoC Errata document for details.
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depends on !SECURE_FLASH_ENC_ENABLED
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bool "240 MHz"
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help
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When 240MHz is selected, esp_flash_write_encrypted() will automatically limit CPU frequency during
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execution:
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- v1.2 and above chips: limited to 160MHz
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- v1.0 and below chips: limited to 80MHz
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When 160MHz or lower is selected, no frequency limiting occurs during encrypted writes. Please refer to
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the ESP32-C5 SoC Errata document for more details.
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endchoice
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config ESP_DEFAULT_CPU_FREQ_MHZ
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int
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default 40 if ESP_DEFAULT_CPU_FREQ_MHZ_40
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default 80 if ESP_DEFAULT_CPU_FREQ_MHZ_80
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default 160 if ESP_DEFAULT_CPU_FREQ_MHZ_160
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default 240 if ESP_DEFAULT_CPU_FREQ_MHZ_240
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