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0bd6330e91304bb947ec00683a7e0a67d6ec6f98
esp-idf/components/riscv
T
History
Omar Chebib f6e935e013 fix(esp32c5): add CLIC interrupt controller support for the ESP32-C5
2024-04-16 10:38:14 +08:00
..
include
fix(esp32c5): add CLIC interrupt controller support for the ESP32-C5
2024-04-16 10:38:14 +08:00
ld
refactor(riscv): added a new API for the interrupts
2024-01-18 16:36:53 +08:00
CMakeLists.txt
refactor(riscv): added a new API for the interrupts
2024-01-18 16:36:53 +08:00
instruction_decode.c
refactor(tools): Tidy up core component files copyright ignore
2024-01-22 18:07:35 +08:00
interrupt_clic.c
refactor(riscv): added a new API for the interrupts
2024-01-18 16:36:53 +08:00
interrupt_intc.c
refactor(riscv): added a new API for the interrupts
2024-01-18 16:36:53 +08:00
interrupt_plic.c
refactor(riscv): added a new API for the interrupts
2024-01-18 16:36:53 +08:00
interrupt.c
feat(esp32c61): add G0 component support
2024-03-18 14:28:27 +08:00
linker.lf
riscv: moved some interrupt functions from IRAM to flash
2023-04-10 12:21:11 +08:00
project_include.cmake
build: Adds support for universal Clang toolchain
2022-11-23 13:25:16 +03:00
vectors_clic.S
feat(system): esp32p4: support hw stack guard
2024-03-21 14:30:21 +04:00
vectors_intc.S
fix: mark .exception_vectors* as executable and allocatable
2024-03-21 08:53:09 +01:00
vectors.S
fix: mark .exception_vectors* as executable and allocatable
2024-03-21 08:53:09 +01:00
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