armando
51 lines
1.5 KiB
C
51 lines
1.5 KiB
C
/*
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* SPDX-FileCopyrightText: 2026 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <stdint.h>
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#include <string.h>
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#include <sys/param.h>
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#include <inttypes.h>
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#include "sdkconfig.h"
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#include "esp_attr.h"
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#include "esp_log.h"
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#include "esp_check.h"
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#include "esp_intr_alloc.h"
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#include "esp_cache.h"
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#include "esp_heap_caps.h"
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#include "esp_private/esp_psram_mspi.h"
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__attribute__((unused)) static DRAM_ATTR char TAG[] = "MSPI Timing";
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#if ESP_PSRAM_MSPI_MB_WORKAROUND
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static void *s_psram_mb_dummy_cacheline; //dummy cacheline for cache memory barrier
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#endif
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esp_err_t esp_psram_mspi_mb_init(void)
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{
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#if ESP_PSRAM_MSPI_MB_WORKAROUND
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s_psram_mb_dummy_cacheline = heap_caps_calloc(1, CONFIG_CACHE_L1_CACHE_LINE_SIZE, MALLOC_CAP_SPIRAM | MALLOC_CAP_CACHE_ALIGNED);
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if (!s_psram_mb_dummy_cacheline) {
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ESP_EARLY_LOGE(TAG, "Failed to allocate dummy cacheline for PSRAM memory barrier!");
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}
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#endif
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return ESP_OK;
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}
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void IRAM_ATTR esp_psram_mspi_mb(void)
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{
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#if ESP_PSRAM_MSPI_MB_WORKAROUND
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if (s_psram_mb_dummy_cacheline) {
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uint32_t *p = (uint32_t *)s_psram_mb_dummy_cacheline;
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*p = (*p + 1) % UINT32_MAX;
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__attribute__((unused)) esp_err_t ret = ESP_FAIL;
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ret = esp_cache_msync(s_psram_mb_dummy_cacheline, sizeof(uint32_t), ESP_CACHE_MSYNC_FLAG_DIR_C2M | ESP_CACHE_MSYNC_FLAG_UNALIGNED); //malloc is aligned, no need to writeback all
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assert(ret == ESP_OK);
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asm volatile("fence");
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}
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#endif
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}
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