Ivan Grokhotkov
6d06f5fe44
Openeth driver did not consider the possibility that the MAC address was specified when launching QEMU, and would always overwrite that address with the address obtained from esp_read_mac. When running QEMU, setting the MAC address via QEMU arguments is more convenient than crafting an eFuse file with the correct MAC address. This change modifies openeth driver to first check if an address has been set in QEMU and uses it if so. Otherwise it falls back to the address obtained from esp_read_mac. As part of this change, also removed the unnecessary variable emac_opencores_t::addr, the address is only kept in the registers of the emulated peripheral now. For full effect this also requires changes in QEMU, see https://github.com/espressif/qemu/issues/107 for background. Without changes in QEMU, this commit keeps the same behavior.
441 lines
15 KiB
C
441 lines
15 KiB
C
/*
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* SPDX-FileCopyrightText: 2019-2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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// This is a driver for OpenCores Ethernet MAC (https://opencores.org/projects/ethmac).
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// Espressif chips do not use this MAC, but it is supported in QEMU
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// (see hw/net/opencores_eth.c). Since the interface of this MAC is a relatively
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// simple one, it is used for the purpose of running IDF apps in QEMU.
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// The QEMU driver also emulates the DP83848C PHY, which is supported in IDF.
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// Note that this driver is written with QEMU in mind. For example, it doesn't
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// handle errors which QEMU will not report, and doesn't wait for TX to be
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// finished, since QEMU does this instantly.
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#include <string.h>
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#include <stdlib.h>
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#include <sys/cdefs.h>
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#include <sys/param.h>
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#include <inttypes.h>
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#include "esp_log.h"
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#include "esp_check.h"
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#include "esp_cpu.h"
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#include "esp_intr_alloc.h"
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#include "freertos/FreeRTOS.h"
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#include "freertos/task.h"
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#include "openeth.h"
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#include "esp_mac.h"
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#include "esp_eth_mac_openeth.h"
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static const char *TAG = "opencores.emac";
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// Driver state structure
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typedef struct {
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esp_eth_mac_t parent;
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esp_eth_mediator_t *eth;
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intr_handle_t intr_hdl;
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TaskHandle_t rx_task_hdl;
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int cur_rx_desc;
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int cur_tx_desc;
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uint8_t *rx_buf[RX_BUF_COUNT];
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uint8_t *tx_buf[TX_BUF_COUNT];
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} emac_opencores_t;
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// Interrupt handler and the receive task
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static esp_err_t emac_opencores_receive(esp_eth_mac_t *mac, uint8_t *buf, uint32_t *length);
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static IRAM_ATTR void emac_opencores_isr_handler(void *args)
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{
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emac_opencores_t *emac = (emac_opencores_t *) args;
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BaseType_t high_task_wakeup;
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uint32_t status = REG_READ(OPENETH_INT_SOURCE_REG);
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if (status & OPENETH_INT_RXB) {
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// Notify receive task
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vTaskNotifyGiveFromISR(emac->rx_task_hdl, &high_task_wakeup);
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if (high_task_wakeup) {
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portYIELD_FROM_ISR();
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}
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}
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if (status & OPENETH_INT_BUSY) {
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ESP_EARLY_LOGW(TAG, "%s: RX frame dropped (0x%" PRIx32 ")", __func__, status);
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}
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// Clear interrupt
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REG_WRITE(OPENETH_INT_SOURCE_REG, status);
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}
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static void emac_opencores_rx_task(void *arg)
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{
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emac_opencores_t *emac = (emac_opencores_t *)arg;
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uint8_t *buffer = NULL;
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uint32_t length = 0;
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while (1) {
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if (ulTaskNotifyTake(pdFALSE, portMAX_DELAY)) {
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while (true) {
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length = ETH_MAX_PACKET_SIZE;
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buffer = malloc(length);
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if (!buffer) {
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ESP_LOGE(TAG, "no mem for receive buffer");
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} else if (emac_opencores_receive(&emac->parent, buffer, &length) == ESP_OK) {
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// pass the buffer to the upper layer
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if (length) {
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emac->eth->stack_input(emac->eth, buffer, length);
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} else {
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free(buffer);
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}
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} else {
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free(buffer);
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break;
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}
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}
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}
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}
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vTaskDelete(NULL);
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}
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// Below functions implement the driver interface
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static esp_err_t emac_opencores_set_mediator(esp_eth_mac_t *mac, esp_eth_mediator_t *eth)
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{
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esp_err_t ret = ESP_OK;
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ESP_GOTO_ON_FALSE(eth, ESP_ERR_INVALID_ARG, err, TAG, "can't set mac's mediator to null");
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emac_opencores_t *emac = __containerof(mac, emac_opencores_t, parent);
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emac->eth = eth;
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return ESP_OK;
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err:
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return ret;
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}
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static esp_err_t emac_opencores_write_phy_reg(esp_eth_mac_t *mac, uint32_t phy_addr, uint32_t phy_reg, uint32_t reg_value)
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{
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ESP_LOGV(TAG, "%s: addr=%" PRIu32 " reg=0x%" PRIx32 " val=0x%04" PRIx32, __func__, phy_addr, phy_reg, reg_value);
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REG_SET_FIELD(OPENETH_MIIADDRESS_REG, OPENETH_FIAD, phy_addr);
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REG_SET_FIELD(OPENETH_MIIADDRESS_REG, OPENETH_RGAD, phy_reg);
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REG_WRITE(OPENETH_MIITX_DATA_REG, reg_value & OPENETH_MII_DATA_MASK);
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REG_SET_BIT(OPENETH_MIICOMMAND_REG, OPENETH_WCTRLDATA);
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return ESP_OK;
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}
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static esp_err_t emac_opencores_read_phy_reg(esp_eth_mac_t *mac, uint32_t phy_addr, uint32_t phy_reg, uint32_t *reg_value)
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{
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esp_err_t ret = ESP_OK;
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ESP_GOTO_ON_FALSE(reg_value, ESP_ERR_INVALID_ARG, err, TAG, "can't set reg_value to null");
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REG_SET_FIELD(OPENETH_MIIADDRESS_REG, OPENETH_FIAD, phy_addr);
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REG_SET_FIELD(OPENETH_MIIADDRESS_REG, OPENETH_RGAD, phy_reg);
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REG_SET_BIT(OPENETH_MIICOMMAND_REG, OPENETH_RSTAT);
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*reg_value = (REG_READ(OPENETH_MIIRX_DATA_REG) & OPENETH_MII_DATA_MASK);
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ESP_LOGV(TAG, "%s: addr=%" PRIu32 " reg=0x%" PRIx32 " val=0x%04" PRIx32, __func__, phy_addr, phy_reg, *reg_value);
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return ESP_OK;
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err:
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return ret;
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}
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static esp_err_t emac_opencores_set_addr(esp_eth_mac_t *mac, uint8_t *addr)
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{
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ESP_LOGV(TAG, "%s: " MACSTR, __func__, MAC2STR(addr));
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esp_err_t ret = ESP_OK;
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ESP_GOTO_ON_FALSE(addr, ESP_ERR_INVALID_ARG, err, TAG, "can't set mac addr to null");
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const uint8_t mac0[4] = {addr[5], addr[4], addr[3], addr[2]};
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const uint8_t mac1[4] = {addr[1], addr[0]};
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uint32_t mac0_u32, mac1_u32;
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memcpy(&mac0_u32, &mac0, 4);
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memcpy(&mac1_u32, &mac1, 4);
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REG_WRITE(OPENETH_MAC_ADDR0_REG, mac0_u32);
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REG_WRITE(OPENETH_MAC_ADDR1_REG, mac1_u32);
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return ESP_OK;
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err:
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return ret;
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}
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static esp_err_t emac_opencores_get_addr(esp_eth_mac_t *mac, uint8_t *addr)
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{
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ESP_LOGV(TAG, "%s: " MACSTR, __func__, MAC2STR(addr));
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esp_err_t ret = ESP_OK;
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ESP_GOTO_ON_FALSE(addr, ESP_ERR_INVALID_ARG, err, TAG, "can't set mac addr to null");
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uint32_t mac0_u32 = REG_READ(OPENETH_MAC_ADDR0_REG);
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uint32_t mac1_u32 = REG_READ(OPENETH_MAC_ADDR1_REG);
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const uint8_t mac_addr[ETH_ADDR_LEN] = {
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(mac1_u32 >> 8) & 0xFF,
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mac1_u32 & 0xFF,
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(mac0_u32 >> 24) & 0xFF,
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(mac0_u32 >> 16) & 0xFF,
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(mac0_u32 >> 8) & 0xFF,
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mac0_u32 & 0xFF,
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};
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memcpy(addr, mac_addr, ETH_ADDR_LEN);
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return ESP_OK;
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err:
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return ret;
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}
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static esp_err_t emac_opencores_set_link(esp_eth_mac_t *mac, eth_link_t link)
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{
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ESP_LOGV(TAG, "%s: %s", __func__, link == ETH_LINK_UP ? "up" : "down");
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esp_err_t ret = ESP_OK;
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emac_opencores_t *emac = __containerof(mac, emac_opencores_t, parent);
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switch (link) {
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case ETH_LINK_UP:
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ESP_GOTO_ON_ERROR(esp_intr_enable(emac->intr_hdl), err, TAG, "enable interrupt failed");
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openeth_enable();
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break;
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case ETH_LINK_DOWN:
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ESP_GOTO_ON_ERROR(esp_intr_disable(emac->intr_hdl), err, TAG, "disable interrupt failed");
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openeth_disable();
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break;
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default:
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ESP_GOTO_ON_FALSE(false, ESP_ERR_INVALID_ARG, err, TAG, "unknown link status");
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break;
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}
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return ESP_OK;
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err:
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return ret;
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}
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static esp_err_t emac_opencores_set_speed(esp_eth_mac_t *mac, eth_speed_t speed)
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{
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/* QEMU doesn't emulate PHY speed, so accept any value */
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return ESP_OK;
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}
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static esp_err_t emac_opencores_set_duplex(esp_eth_mac_t *mac, eth_duplex_t duplex)
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{
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/* QEMU doesn't emulate full/half duplex, so accept any value */
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return ESP_OK;
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}
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static esp_err_t emac_opencores_set_promiscuous(esp_eth_mac_t *mac, bool enable)
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{
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if (enable) {
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REG_SET_BIT(OPENETH_MODER_REG, OPENETH_PRO);
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} else {
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REG_CLR_BIT(OPENETH_MODER_REG, OPENETH_PRO);
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}
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return ESP_OK;
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}
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static esp_err_t emac_opencores_enable_flow_ctrl(esp_eth_mac_t *mac, bool enable)
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{
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/* QEMU doesn't emulate flow control function, so accept any value */
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return ESP_OK;
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}
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static esp_err_t emac_opencores_set_peer_pause_ability(esp_eth_mac_t *mac, uint32_t ability)
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{
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/* QEMU doesn't emulate PAUSE function, so accept any value */
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return ESP_OK;
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}
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static esp_err_t emac_opencores_transmit(esp_eth_mac_t *mac, uint8_t *buf, uint32_t length)
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{
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esp_err_t ret = ESP_OK;
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emac_opencores_t *emac = __containerof(mac, emac_opencores_t, parent);
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ESP_GOTO_ON_FALSE(length < DMA_BUF_SIZE * TX_BUF_COUNT, ESP_ERR_INVALID_SIZE, err, TAG, "insufficient TX buffer size");
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uint32_t bytes_remaining = length;
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// In QEMU, there never is a TX operation in progress, so start with descriptor 0.
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ESP_LOGV(TAG, "%s: len=%" PRIu32, __func__, length);
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while (bytes_remaining > 0) {
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uint32_t will_write = MIN(bytes_remaining, DMA_BUF_SIZE);
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memcpy(emac->tx_buf[emac->cur_tx_desc], buf, will_write);
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openeth_tx_desc_t *desc_ptr = openeth_tx_desc(emac->cur_tx_desc);
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openeth_tx_desc_t desc_val = *desc_ptr;
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desc_val.wr = (emac->cur_tx_desc == TX_BUF_COUNT - 1);
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desc_val.len = will_write;
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desc_val.rd = 1;
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// TXEN is already set, and this triggers a TX operation for the descriptor
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ESP_LOGV(TAG, "%s: desc %d (%p) len=%" PRIu32 " wr=%" PRIu16, __func__, emac->cur_tx_desc, desc_ptr, will_write, desc_val.wr);
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*desc_ptr = desc_val;
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bytes_remaining -= will_write;
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buf += will_write;
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emac->cur_tx_desc = (emac->cur_tx_desc + 1) % TX_BUF_COUNT;
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}
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return ESP_OK;
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err:
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return ret;
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}
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static esp_err_t emac_opencores_receive(esp_eth_mac_t *mac, uint8_t *buf, uint32_t *length)
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{
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esp_err_t ret = ESP_OK;
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emac_opencores_t *emac = __containerof(mac, emac_opencores_t, parent);
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openeth_rx_desc_t *desc_ptr = openeth_rx_desc(emac->cur_rx_desc);
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openeth_rx_desc_t desc_val = *desc_ptr;
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ESP_LOGV(TAG, "%s: desc %d (%p) e=%" PRIu16 " len=%" PRIu16" wr=%" PRIu16, __func__, emac->cur_rx_desc, desc_ptr, desc_val.e, desc_val.len, desc_val.wr);
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if (desc_val.e) {
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ret = ESP_ERR_INVALID_STATE;
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goto err;
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}
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size_t rx_length = desc_val.len;
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ESP_GOTO_ON_FALSE(*length >= rx_length, ESP_ERR_INVALID_SIZE, err, TAG, "RX length too large");
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*length = rx_length;
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memcpy(buf, desc_val.rxpnt, *length);
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desc_val.e = 1;
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*desc_ptr = desc_val;
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emac->cur_rx_desc = (emac->cur_rx_desc + 1) % RX_BUF_COUNT;
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return ESP_OK;
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err:
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return ret;
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}
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static esp_err_t emac_opencores_init(esp_eth_mac_t *mac)
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{
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esp_err_t ret = ESP_OK;
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emac_opencores_t *emac = __containerof(mac, emac_opencores_t, parent);
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esp_eth_mediator_t *eth = emac->eth;
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ESP_GOTO_ON_ERROR(eth->on_state_changed(eth, ETH_STATE_LLINIT, NULL), err, TAG, "lowlevel init failed");
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// Sanity check
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if (REG_READ(OPENETH_MODER_REG) != OPENETH_MODER_DEFAULT) {
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ESP_LOGE(TAG, "CONFIG_ETH_USE_OPENETH should only be used when running in QEMU.");
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ESP_LOGE(TAG, "When running the app on the ESP32, use CONFIG_ETH_USE_ESP32_EMAC instead.");
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abort();
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}
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// Initialize the MAC
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openeth_reset();
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openeth_set_tx_desc_cnt(TX_BUF_COUNT);
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// Check if MAC address has been set in QEMU
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uint8_t mac_addr[ETH_ADDR_LEN];
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emac_opencores_get_addr(mac, mac_addr);
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const uint8_t zero_mac[ETH_ADDR_LEN] = {0};
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if (memcmp(mac_addr, zero_mac, ETH_ADDR_LEN) != 0) {
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ESP_LOGD(TAG, "Using MAC address " MACSTR " set in QEMU", MAC2STR(mac_addr));
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} else {
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// Fall back to the default MAC address
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ESP_GOTO_ON_ERROR(esp_read_mac(mac_addr, ESP_MAC_ETH), err, TAG, "fetch ethernet mac address failed");
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ESP_LOGD(TAG, "Using MAC address " MACSTR " from esp_read_mac", MAC2STR(mac_addr));
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emac_opencores_set_addr(mac, mac_addr);
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}
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return ESP_OK;
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err:
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eth->on_state_changed(eth, ETH_STATE_DEINIT, NULL);
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return ret;
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}
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static esp_err_t emac_opencores_deinit(esp_eth_mac_t *mac)
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{
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emac_opencores_t *emac = __containerof(mac, emac_opencores_t, parent);
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esp_eth_mediator_t *eth = emac->eth;
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eth->on_state_changed(eth, ETH_STATE_DEINIT, NULL);
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return ESP_OK;
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}
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static esp_err_t emac_opencores_start(esp_eth_mac_t *mac)
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{
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openeth_enable();
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return ESP_OK;
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}
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static esp_err_t emac_opencores_stop(esp_eth_mac_t *mac)
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{
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openeth_disable();
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return ESP_OK;
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}
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static esp_err_t emac_opencores_del(esp_eth_mac_t *mac)
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{
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emac_opencores_t *emac = __containerof(mac, emac_opencores_t, parent);
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esp_intr_free(emac->intr_hdl);
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vTaskDelete(emac->rx_task_hdl);
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for (int i = 0; i < RX_BUF_COUNT; i++) {
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free(emac->rx_buf[i]);
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}
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for (int i = 0; i < TX_BUF_COUNT; i++) {
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free(emac->tx_buf[i]);
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}
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free(emac);
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return ESP_OK;
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}
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esp_eth_mac_t *esp_eth_mac_new_openeth(const eth_mac_config_t *config)
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{
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esp_eth_mac_t *ret = NULL;
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emac_opencores_t *emac = NULL;
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ESP_GOTO_ON_FALSE(config, NULL, out, TAG, "can't set mac config to null");
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emac = calloc(1, sizeof(emac_opencores_t));
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ESP_GOTO_ON_FALSE(emac, NULL, out, TAG, "calloc emac failed");
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// Allocate DMA buffers
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for (int i = 0; i < RX_BUF_COUNT; i++) {
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emac->rx_buf[i] = heap_caps_calloc(1, DMA_BUF_SIZE, MALLOC_CAP_DMA);
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if (!(emac->rx_buf[i])) {
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goto out;
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}
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openeth_init_rx_desc(openeth_rx_desc(i), emac->rx_buf[i]);
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}
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openeth_rx_desc(RX_BUF_COUNT - 1)->wr = 1;
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emac->cur_rx_desc = 0;
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for (int i = 0; i < TX_BUF_COUNT; i++) {
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emac->tx_buf[i] = heap_caps_calloc(1, DMA_BUF_SIZE, MALLOC_CAP_DMA);
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if (!(emac->tx_buf[i])) {
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goto out;
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}
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openeth_init_tx_desc(openeth_tx_desc(i), emac->tx_buf[i]);
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}
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openeth_tx_desc(TX_BUF_COUNT - 1)->wr = 1;
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emac->cur_tx_desc = 0;
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emac->parent.set_mediator = emac_opencores_set_mediator;
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emac->parent.init = emac_opencores_init;
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emac->parent.deinit = emac_opencores_deinit;
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emac->parent.start = emac_opencores_start;
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emac->parent.stop = emac_opencores_stop;
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emac->parent.del = emac_opencores_del;
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emac->parent.write_phy_reg = emac_opencores_write_phy_reg;
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emac->parent.read_phy_reg = emac_opencores_read_phy_reg;
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emac->parent.set_addr = emac_opencores_set_addr;
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emac->parent.get_addr = emac_opencores_get_addr;
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emac->parent.set_speed = emac_opencores_set_speed;
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emac->parent.set_duplex = emac_opencores_set_duplex;
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emac->parent.set_link = emac_opencores_set_link;
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emac->parent.set_promiscuous = emac_opencores_set_promiscuous;
|
|
emac->parent.set_peer_pause_ability = emac_opencores_set_peer_pause_ability;
|
|
emac->parent.enable_flow_ctrl = emac_opencores_enable_flow_ctrl;
|
|
emac->parent.transmit = emac_opencores_transmit;
|
|
emac->parent.receive = emac_opencores_receive;
|
|
|
|
// Initialize the interrupt
|
|
ESP_GOTO_ON_FALSE(esp_intr_alloc(OPENETH_INTR_SOURCE, ESP_INTR_FLAG_IRAM, emac_opencores_isr_handler, emac, &(emac->intr_hdl)) == ESP_OK, NULL, out, TAG, "alloc emac interrupt failed");
|
|
|
|
// Create the RX task
|
|
BaseType_t core_num = tskNO_AFFINITY;
|
|
if (config->flags & ETH_MAC_FLAG_PIN_TO_CORE) {
|
|
core_num = esp_cpu_get_core_id();
|
|
}
|
|
BaseType_t xReturned = xTaskCreatePinnedToCore(emac_opencores_rx_task, "emac_rx", config->rx_task_stack_size, emac,
|
|
config->rx_task_prio, &emac->rx_task_hdl, core_num);
|
|
ESP_GOTO_ON_FALSE(xReturned == pdPASS, NULL, out, TAG, "create emac_rx task failed");
|
|
return &(emac->parent);
|
|
|
|
out:
|
|
if (emac) {
|
|
if (emac->rx_task_hdl) {
|
|
vTaskDelete(emac->rx_task_hdl);
|
|
}
|
|
if (emac->intr_hdl) {
|
|
esp_intr_free(emac->intr_hdl);
|
|
}
|
|
for (int i = 0; i < TX_BUF_COUNT; i++) {
|
|
free(emac->tx_buf[i]);
|
|
}
|
|
for (int i = 0; i < RX_BUF_COUNT; i++) {
|
|
free(emac->rx_buf[i]);
|
|
}
|
|
free(emac);
|
|
}
|
|
return ret;
|
|
}
|