Darian Leung
61eb7baa6b
This commit updates the esp_cpu.h API. The new API presents a new
abstraction of the CPU where CPU presents the following interfaces:
- CPU Control (to stall/unstall/reset the CPU)
- CPU Registers (to read registers commonly used in SW such as SP, PC)
- CPU Interrupts (to inquire/allocate/control the CPUs 32 interrupts)
- Memory Port (to configure the CPU's memory bus for memory protection)
- Debugging (to configure/control the CPU's debugging port)
Note: Also added FORCE_INLINE_ATTR to the DoxyFile in order to pass doc
builds for esp_cpu.h
33 lines
1.1 KiB
Plaintext
33 lines
1.1 KiB
Plaintext
[mapping:esp_hw_support]
|
|
archive: libesp_hw_support.a
|
|
entries:
|
|
cpu: esp_cpu_stall (noflash)
|
|
cpu: esp_cpu_unstall (noflash)
|
|
cpu: esp_cpu_reset (noflash)
|
|
cpu: esp_cpu_wait_for_intr (noflash)
|
|
if ESP_PANIC_HANDLER_IRAM = y:
|
|
cpu: esp_cpu_set_breakpoint (noflash)
|
|
cpu: esp_cpu_clear_breakpoint (noflash)
|
|
cpu: esp_cpu_set_watchpoint (noflash)
|
|
cpu: esp_cpu_clear_watchpoint (noflash)
|
|
cpu: esp_cpu_compare_and_set (noflash)
|
|
esp_memory_utils (noflash)
|
|
rtc_clk (noflash)
|
|
rtc_init:rtc_vddsdio_set_config (noflash)
|
|
rtc_pm (noflash_text)
|
|
rtc_sleep (noflash_text)
|
|
rtc_time (noflash_text)
|
|
if IDF_TARGET_ESP32 = y || IDF_TARGET_ESP32S2 = y:
|
|
rtc_wdt (noflash_text)
|
|
if IDF_TARGET_ESP32S3 = y:
|
|
if SPIRAM_MODE_QUAD = y:
|
|
spiram_psram (noflash)
|
|
if SPIRAM_MODE_OCT = y:
|
|
opiram_psram (noflash)
|
|
if IDF_TARGET_ESP32S2 = y && SPIRAM:
|
|
mmu_psram (noflash)
|
|
if PERIPH_CTRL_FUNC_IN_IRAM = y:
|
|
periph_ctrl: periph_module_reset (noflash)
|
|
periph_ctrl: wifi_module_enable (noflash)
|
|
periph_ctrl: wifi_module_disable (noflash)
|