Sachin Billore
258 lines
8.8 KiB
C
258 lines
8.8 KiB
C
/*
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* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include "esp_err.h"
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#include "soc/soc_caps.h"
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#if SOC_APM_SUPPORTED
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#include "hal/apm_ll.h"
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#if CONFIG_IDF_TARGET_ESP32P4
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/**
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* @brief DMA configurable region configuration data.
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*/
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typedef struct {
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apm_ll_dma_master_t dma_master; /* DMA master whose access permission to be configured.*/
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uint32_t pms_r_mask; /* Read permission mask. */
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uint32_t pms_w_mask; /* Write permission mask. */
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} apm_hal_dma_region_config_data_t;
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/**
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* @brief Configure HP peripherals access permission for the HP CPU0/1.
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*
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* @param master_id HP CPU0/1
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* @param hp_peri HP peripheral whose access permission to be configured.
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* @param enable Permission enable/disable
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*/
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void apm_hal_hp_peri_access_enable(apm_ll_master_id_t master_id, apm_ll_hp_peri_t hp_peri,
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apm_ll_secure_mode_t sec_mode, bool enable);
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/**
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* @brief Configure LP peripherals access permission for the LP CPU.
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*
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* @param lp_peri LP peripheral whose access permission to be configured.
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* @param enable Permission enable/disable
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*/
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void apm_hal_lp_peri_access_enable(apm_ll_lp_peri_t lp_peri, bool enable);
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/**
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* @brief Configure peripherals configurable address ranges.
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*
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* @param regn_num Configurable address range number.
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* @param regn_low_addr Configurable address range start address.
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* @param regn_high_addr Configurable address range end address.
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*/
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void apm_hal_peri_region_config(uint32_t regn_num, uint32_t regn_low_addr,
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uint32_t regn_high_addr);
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/**
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* @brief Configure peripherals configurable address ranges.
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*
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* @param master_id LP CPU and HP CPU0/1
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* @param sec_mode CPU privilege mode (Machine/User) which corresponds to (TEE/REE).
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* @param regn_num Configurable address range number.
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* @param regn_pms Configurable address range permission setting(2-bits field).
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* Bit 0: Region 0 permission enable/disable.
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* Bit 1: Region 1 permission enable/disable.
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* @return Configuration performed successfully?
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*/
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int apm_hal_peri_region_pms(apm_ll_master_id_t master_id, apm_ll_secure_mode_t sec_mode,
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uint32_t regn_num, uint32_t regn_pms);
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/**
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* @brief Configure APM controller clock gating.
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*
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* @param apm_ctrl APM controller (LP_PERI/HP_PERI/HP_DMA/LP2HP_PERI/HP2LP_PERI).
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* @param enable Permission enable/disable.
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* enable: Enable automatic clock gating.
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* disable: Keep the clock always on.
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* @return Clock gating set successfully?
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*/
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int apm_hal_apm_ctrl_clk_gating_enable(apm_ll_apm_ctrl_t apm_ctrl, bool enable);
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/**
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* @brief Configure DMA configurable address range low address.
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*
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* @param regn_num Configurable DMA address range number.
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* @param regn_low_addr Configurable DMA address range start address.
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* @param regn_high_addr Configurable DMA address range end address.
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*/
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void apm_hal_dma_region_config(uint32_t regn_num, uint32_t regn_low_addr, uint32_t regn_high_addr);
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/**
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* @brief Configure DMA configurable address range read permission.
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*
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* @param pms_data DMA configurable region configuration data.
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* @param dma_master DMA master whose access permission to be configured.
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* @param regn_mask 32-bits field, each bit for corresponding DMA configurable address range permission.
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* 0: Disable read permission.
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* 1: Enable read permission.
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*/
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void apm_hal_dma_region_pms(apm_hal_dma_region_config_data_t *pms_data);
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#else
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/**
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* @brief Region configuration data.
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*/
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typedef struct {
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uint32_t regn_num; /* Address Region number cover by this configuration data. */
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uint32_t regn_start_addr; /* Address Region start address. */
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uint32_t regn_end_addr; /* Address Region end address. */
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uint32_t regn_pms; /* Access Permission for Master in different secure mode. */
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bool filter_enable; /* Address Region Filter enable/disable. */
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apm_ll_apm_ctrl_t apm_ctrl; /* APM Ctrl: LP APM0/HP APM/LP APM. */
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apm_ll_secure_mode_t sec_mode; /* Master secure mode: TEE/REE[0-2].*/
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} apm_ctrl_region_config_data_t;
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/**
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* @brief Secure mode(TEE/REE[0:2] configuration data.
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*/
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typedef struct {
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apm_ll_apm_ctrl_t apm_ctrl; /* APM Ctrl: LP APM0/HP APM/LP APM. */
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apm_ll_secure_mode_t sec_mode; /* Secure mode to be configured TEE/REE[0:2]. */
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uint8_t apm_m_cnt; /* Access path M count. */
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uint32_t regn_count; /* Access Ctrl region count. */
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uint32_t master_ids; /* Bit mask for masters to be part of this secure mode. */
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apm_ctrl_region_config_data_t *pms_data; /* Region configuration data. */
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} apm_ctrl_secure_mode_config_t;
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/**
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* @brief Set secure mode
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*
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* @param apm_ctrl APM Ctrl to be configured
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* @param master_id APM master ID
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* @param sec_mode Secure mode
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*/
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void apm_tee_hal_set_master_secure_mode(apm_ll_apm_ctrl_t apm_ctrl, apm_ll_master_id_t master_id,
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apm_ll_secure_mode_t sec_mode);
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/**
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* @brief TEE controller clock auto gating enable
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*
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* @param enable Flag for HP clock auto gating enable/disable
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*/
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void apm_tee_hal_clk_gating_enable(bool enable);
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/**
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* @brief enable/disable APM Ctrl Region access permission filter
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*
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* @param apm_ctrl APM Ctrl to be configured
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* @param regn_num Memory Region number
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* @param enable Flag for Region access filter enable/disable
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*/
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void apm_hal_apm_ctrl_region_filter_enable(apm_ll_apm_ctrl_t apm_ctrl, uint32_t regn_num, bool enable);
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/**
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* @brief enable/disable APM Ctrl access path(M[0:n])
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*
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* @param apm_path APM controller and access path to be configured
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* @param enable Flag for M path filter enable/disable
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*/
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void apm_hal_apm_ctrl_filter_enable(apm_ctrl_path_t *apm_path, bool enable);
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/**
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* @brief enable/disable all available APM Ctrl access path(M[0:n])
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*
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* @param enable Flag for M path filter enable/disable
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*/
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void apm_hal_apm_ctrl_filter_enable_all(bool enable);
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/**
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* @brief Region configuration
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*
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* @param pms_data Region configuration data
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*/
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void apm_hal_apm_ctrl_region_config(const apm_ctrl_region_config_data_t *pms_data);
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/**
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* @brief Get APM Ctrl access path(M[0:n]) exception status
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*
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* @param apm_path APM controller and access path to be configured
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*/
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uint8_t apm_hal_apm_ctrl_exception_status(apm_ctrl_path_t *apm_path);
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/**
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* @brief Clear APM Ctrl access path(M[0:n]) exception
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*
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* @param apm_path APM controller and access path to be configured
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*/
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void apm_hal_apm_ctrl_exception_clear(apm_ctrl_path_t *apm_path);
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/**
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* @brief Get APM Ctrl access path exception information
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*
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* @param excp_info Exception related information like addr,
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* region, amp_ctrl, apm_m_path, sec_mode and master id
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*/
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void apm_hal_apm_ctrl_get_exception_info(apm_ctrl_exception_info_t *excp_info);
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/**
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* @brief APM Ctrl interrupt enable for access path(M[0:n])
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*
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* @param apm_path APM controller and access path to be configured
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* @param enable Flag for access path interrupt enable/disable
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*/
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void apm_hal_apm_ctrl_interrupt_enable(apm_ctrl_path_t *apm_path, bool enable);
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/**
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* @brief APM Ctrl clock auto gating enable
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*
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* @apm_ctrl APM Ctrl
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* @param enable Flag for HP clock auto gating enable/disable
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*/
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void apm_hal_apm_ctrl_clk_gating_enable(apm_ll_apm_ctrl_t apm_ctrl, bool enable);
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/**
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* @brief TEE/REE execution environment configuration.
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*
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* This API will be called from TEE mode initialization code which is
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* responsible to setup TEE/REE execution environment.
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* It includes, allocation of all bus masters, memory ranges and other
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* peripherals to the given secure mode.
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* All this information should be passed by the TEE mode initialization code.
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*
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* @sec_mode_data APM Ctl configuration data.
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*/
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void apm_hal_apm_ctrl_master_sec_mode_config(apm_ctrl_secure_mode_config_t *sec_mode_data);
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/**
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* @brief APM/TEE/HP System Reg reset event bypass enable
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*
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* Disable: tee_reg/apm_reg/hp_system_reg will not only be reset by power-reset,
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* but also some reset events.
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* Enable: tee_reg/apm_reg/hp_system_reg will only be reset by power-reset.
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* Some reset events will be bypassed.
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*
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* @param enable Flag for event bypass enable/disable
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*/
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void apm_hal_apm_ctrl_reset_event_enable(bool enable);
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/**
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* @brief Fetch the APM Ctrl access path interrupt source number.
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*
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* @param apm_path APM controller and access path to be configured
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*
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* @return
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* - valid interrupt source number on success
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* - -1: invalid interrupt source
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*/
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int apm_hal_apm_ctrl_get_int_src_num(apm_ctrl_path_t *apm_path);
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#endif //CONFIG_IDF_TARGET_ESP32P4
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#endif //SOC_APM_SUPPORTED
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#ifdef __cplusplus
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}
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#endif
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