681 lines
180 KiB
Plaintext
681 lines
180 KiB
Plaintext
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!<arch>
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/ 0 0 0 0 5722 `
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>� >� >� >� >� >� >� >� >� >� >� >� >� >� >� >� >� >� >� >� >� >� >� >� >� >� >� >� >� >� >� >� >� >� >� >� >� >� `Ð `Ð `Ð `Ð `Ð `Ð `Ð `Ð `Ð `Ð `Ð `Ð `Ð `Ð `Ð `Ð `Ð `Ð `Ð `Ð `Ð `Ð `Ð «| «| «| «| «| «| «| «| «| «| «| «| Έ Έ Έ Έ Ùx Ùx Ùx Ùx Ùx Ùx Ùx Ùx Ùx Ùx Ùx Ùx Ùx Ùx Ùx ø$ ø$ ø$ ø$ ø$ ø$ ø$ ø$ ø$ ø$ ø$ ø$ ø$ ø$ ø$ œ œ œ œ œ œ œ œ œ -t -t -t -t -t -t -t -t -t -t -t =„ =„ =„ =„ Gx Lü Lü Lü Lü Lü V V V V V V V V y° y° y° y° y° y° y° y° y° y° y° y° y° ÒD ÒD ÒD ÒD ÒD ÒD ÒD ÒD ÒD ÒD ÒD ÒD ñ¼ ñ¼ ñ¼ ñ¼ ñ¼ ñ¼ ñ¼ ñ¼ ñ¼ ñ¼ ñ¼ ñ¼ ñ¼ ñ¼ ñ¼ ñ¼ ñ¼ ñ¼ ñ¼ ñ¼ ñ¼ ñ¼ ñ¼ ñ¼ Œ Œ Œ Œ Œ Œ Œ Œ Œ Œ Œ Œ Œ Œ Œ Œ Œ Œ Œ Œ ^H ^H ^H ^H ^H ^H ^H ^H ^H ^H ^H ^H ^H ^H ^H ^H ^H ^H ^H ^H ^H ^H ^H ð ð ð ð ð ð ð ð ð ð ð ð ð ðrfpll_cap_track txpwr_correct txpwr_cal_track tx_i2c_track phy_txpwr_track_slow bt_track_tx_power bt_track_pll_cap wifi_track_tx_power phy_param_track phy_cal_param_track tx_pwctrl_background_ phy_param_track_tot RFChannelSel phy_change_channel phy_rx_rifs_en phy_current_level_set phy_bbpll_en_usb phy_bt_power_track phy_xpd_tsens bb_wdt_rst_enable bb_wdt_int_enable bb_wdt_timeout_clear bb_wdt_get_status phy_get_rf_cal_version noise_check_loop phy_wakeup_init phy_close_rf tx_pwctrl_background esp_tx_state_out ant_dft_cfg ant_wifitx_cfg ant_wifirx_cfg ant_bttx_cfg ant_btrx_cfg ant_tx_cfg ant_rx_cfg phy_chan_dump_cfg phy_dig_reg_backup phy_chan_filt_set set_cca set_rx_sense rx_gain_force phy_i2c_enter_critical phy_i2c_exit_critical phy_ble_set_chan_base phy_init_param_set phy_get_rfdata_num phy_set_23dbm_en phy_set_23dbm phy_track_temp_debug reg_set_new wait_i2c_sdm_stable phy_get_xtal_freq phy_reg_init phy_wakeup_init_ phy_get_romfunc_addr rc_cal_init rf_init bb_init register_chipv7_phy_init_param phy_xpd_rf phy_close_rf_ esp_phy_efuse_get_mac phy_get_mac_addr phy_set_mac_data phy_rfcal_data_sub rf_cal_data_recovery phy_rfcal_data_check_value rf_cal_data_backup phy_rfcal_data_check register_chipv7_phy g_phyFuns phy_param pbus_clear_reg ram_pbus_force_mode ram_pbus_rd_addr ram_pbus_rd_shift ram_pbus_xpd_rx_on ram_pbus_xpd_tx_on ram_set_loopback_gain ram_txcal_debuge_mode save_pbus_reg write_pbus_mem set_pbus_mem rx_pbus_reset rate_to_index get_target_pwr phy_get_max_pwr phy_get_pwr_index freq_reg_init freq_get_i2c_data phy_dis_hw_set_freq_1 wait_freq_set_busy read_rf_freq_mem_new freq_i2c_mem_write_new freq_i2c_write_set_new freq_i2c_data_write_new bt_txpwr_freq wr_rf_freq_mem_new pll_dac_mem_update_new pll_cap_mem_update_new get_rf_freq_init_new set_chan_freq_hw_init ram_set_chan_freq_sw_start phy_set_most_tpw phy_get_most_tpw phy_get_adc_rand phy_internal_delay phy_ftm_comp phy_11p_set phy_freq_mem_backup phy_dig_reg_backup_new phy_set_rate phy_get_rx_freq phy_get_cca phy_set_cca_cnt phy_get_cca_cnt phy_get_noise_floor phy_get_rssi phy_rfpll_set_freq_offset phy_force_freq_set rfpll_cap_correct_new phy_set_freq chip_v7_set_chan_misc chip_v7_set_chan chip_v7_set_chan_offset set_chanfreq rfpll_chgp_cal phy_set_tsens_power tsens_read_init_new tsens_dac_to_index tsens_dac_cal_new phy_set_tsens_range ram_tsens_temp_read_new phy_get_tsens_value tsens_temp_read_new ram_temp_to_power get_temp_init_new phy_tsens_attribute ram_set_chan_cal_interp ram_bb_bss_cbw40 chan14_mic_cfg chan14_mic_enable rc_cal_new pwdet_reg_init_new ram_pwdet_tone_start ram_pwdet_wait_idle ram_read_sar_dout get_sar2_vol_new gen_rx_gain_table_new get_rxbb_dc phy_get_interp_data wr_rx_gain_mem rxiq_cal_init phy_rx_table_init set_rx_gain_table rx_table_track get_phy_version_str phy_version_print phy_reg_check phy_i2c_check get_dc_value phy_tx_gain_print get_bias_ref_code phy_get_vdd33 rfpll_cap_check phy_cal_print pbus_print debug_print_line phy_version_str wifi_11g_rate_chg_new set_tx_gain_mem get_chan_target_power_new get
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phy_tester_cali.o/
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phy_analog_cal.o/
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phy_track.o/ 0 0 0 644 10068 `
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ƒE” E´ — ç€ c‚ ƒE” E— ç€ ƒG¤™çE” — ç€ — ç€ ƒ§ bDò@ÒD²I"J£G J…BIaƒ cal:%d,%d
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temp=%d,%d,delta=%d
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correct_power=%d,%d,temp=%d %d
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GCC: (crosstool-NG esp-2020r1-50-g5c6d8df) 8.2.0 (
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Ë Ý p î z & ò : I X j { � ¡ � · ¤ .LC0 .L2 .L1 .L4 .L13 .L12 .L17 .L19 .L14 .LC1 .L21 .L22 .L45 .L25 .L20 .L28 .L30 .L32 .L26 .L46 .L31 .L48 .L50 .L47 .L57 .L58 .L65 .L66 .LC2 .L72 .L73 .L74 .L71 .L76 .L89 .L90 .L97 .L98 .L99 .L101 rfpll_cap_track phy_param abs_temp phy_dis_hw_set_freq_1 rfpll_cap_correct_new phy_printf phy_en_hw_set_freq txpwr_correct ram_temp_to_power bt_set_tx_gain wifi_set_tx_gain txpwr_cal_track get_data_sat phy_bbpll_cal tx_i2c_track g_phyFuns phy_txpwr_track_slow bt_track_tx_power bt_track_pll_cap tsens_temp_read_new wifi_track_tx_power phy_param_track phy_cal_param_track force_txrx_off pbus_clear_reg set_rx_gain_table chip_v7_set_chan txiq_cal_init_new txdc_cal_pwdet_init tx_pwctrl_background_ phy_param_track_tot = 3 = 3 = 3 ( = ( 3 2 > 2 3 J ? J 3 V @ V 3 h = h 3 l l 3 p p 3 t A t 3 | = | 3 „ B „ 3 " , : B , ` D 3 @ E @ 3 P = " P 3 " T = " T 3 " ` = ` 3 j = j 3 r F r 3 . 2 , L \ - = 3 = 3 = 3 . > . 3 8 = 8 3 L = L 3 ` H ` 3 x > x 3 Š D Š 3 ¦ I ¦ 3 ® = ® 3 Ä E Ä 3 Ð = Ð 3 Ü
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Ü 3 â
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€ ” ˜ º Ì - - * - = 3 = 3 = 3 K 3 $ K $ 3 < K < 3 T K T 3 r = r 3 ~ = ~ 3 ˆ K ˆ 3 Œ K Œ 3 ¤ K ¤ 3 ¼ K ¼ 3 Ú = Ú 3 ì = ì 3 ú K ú 3 þ K þ 3 K 3 . K . 3 , z † , è ö = 3 = 3 G 3 K 3 K 3 = 3 = 3 , = , 3 0 O 0 3 B < B 3 R M R 3 Z K Z 3 * , < , G 3 K 3 K 3 = 3 = 3 . O . 3 @ < @ 3 L P L 3 X M X 3 ` K ` 3 , , : , = 3 = 3 " = " 3 4 = 4 3 : > : 3 F ? F 3 P S P 3 X T X 3 l = l 3 t t 3 x x 3 | A | 3 ª U ª 3 ¶ V ¶ 3 Ö S Ö 3 Þ B Þ 3 æ = æ 3 ò = ò 3 ø > ø 3 ? 3 S 3 T 3 @ = @ 3 H H 3 L L 3 P A P 3 X K X 3 \ K \ 3 f W f 3 r X r 3 ~ F ~ 3 † = † 3 � K � 3 ¸ S ¸ 3 Ô B Ô 3 * , B h ! < " K 3 K 3 = 3 " = " 3 4 = 4 3 8 O 8 3 J < J 3 R J R 3 ^ P ^ 3 n R n 3 v K v 3 2 ,# D ,$ j ,# K 3 K 3 = 3 " = " 3 4 = 4 3 B < B 3 V M V 3 h P h 3 z R z 3 ‚ O ‚ 3 Š K Š 3 2 ,% < ,& J ' ^ ( t ,( .symtab .strtab .shstrtab .text .data .bss .rela.text.rfpll_cap_track .rela.text.txpwr_correct .rela.text.txpwr_cal_track .rela.text.tx_i2c_track .rela.text.phy_txpwr_track_slow .rela.text.bt_track_tx_power .rela.text.bt_track_pll_cap .rela.text.wifi_track_tx_power .rela.text.phy_param_track .rela.text.phy_cal_param_track .rela.text.tx_pwctrl_background_ .rela.text.phy_param_track_tot .rodata.phy_cal_param_track.str1.4 .rodata.rfpll_cap_track.str1.4 .rodata.txpwr_cal_track.str1.4 .comment 4 ! 4 ' 4 1 4 ž , @ h L Ò † G @ „ ä e X B ` @ h @ € š V { @ ¨
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@ Ç B Õ D .L9 .L42 RFChannelSel chip_v7_set_chan phy_change_channel set_chanfreq phy_rx_rifs_en wifi_rifs_mode_en phy_current_level_set phy_param phy_bbpll_en_usb phy_bt_power_track phy_xpd_tsens phy_set_tsens_power bb_wdt_rst_enable bb_wdt_int_enable bb_wdt_timeout_clear bb_wdt_get_status phy_get_rf_cal_version noise_check_loop phy_wakeup_init phy_wakeup_init_ phy_close_rf phy_close_rf_ tx_pwctrl_background tx_pwctrl_background_ esp_tx_state_out esp_tx_state_out_rom ant_dft_cfg ant_dft_cfg_rom ant_wifitx_cfg ant_wifitx_cfg_rom ant_wifirx_cfg ant_wifirx_cfg_rom ant_bttx_cfg ant_bttx_cfg_rom ant_btrx_cfg ant_btrx_cfg_rom ant_tx_cfg ant_rx_cfg phy_chan_dump_cfg phy_chan_dump_cfg_rom phy_dig_reg_backup phy_dig_reg_backup_new phy_chan_filt_set phy_chan_filt_set_rom set_cca set_cca_rom set_rx_sense set_rx_sense_rom rx_gain_force rx_gain_force_rom phy_i2c_enter_critical phy_i2c_exit_critical phy_ble_set_chan_base phy_init_param_set phy_get_rfdata_num phy_set_23dbm_en phy_set_23dbm phy_track_temp_debug . 3 0 3 2 3 4 , 3 , 4 , 3 , 4 3 4 3 4 3
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3 V 3 X 3 Z 3 \ 3 ^ 3 4 › 3 › 4 › 3 › 4 ž 3 ž 4 ž 3 ž 4 N 3 N 4 N 3 N 4 3 4 3 , 4 3 4 3 .symtab .strtab .shstrtab .text .data .bss .rela.text.RFChannelSel .rela.text.phy_change_channel .rela.text.phy_rx_rifs_en .rela.text.phy_current_level_set .text.phy_bbpll_en_usb .rela.text.phy_bt_power_track .rela.text.phy_xpd_tsens .text.bb_wdt_rst_enable .text.bb_wdt_int_enable .text.bb_wdt_timeout_clear .text.bb_wdt_get_status .text.phy_get_rf_cal_version .text.noise_check_loop .rela.text.phy_wakeup_init .rela.text.phy_close_rf .rela.text.tx_pwctrl_background .rela.text.esp_tx_state_out .rela.text.ant_dft_cfg .rela.text.ant_wifitx_cfg .rela.text.ant_wifirx_cfg .rela.text.ant_bttx_cfg .rela.text.ant_btrx_cfg .rela.text.ant_tx_cfg .rela.text.ant_rx_cfg .rela.text.phy_chan_dump_cfg .rela.text.phy_dig_reg_backup .rela.text.phy_chan_filt_set .rela.text.set_cca .rela.text.set_rx_sense .rela.text.rx_gain_force .text.phy_i2c_enter_critical .text.phy_i2c_exit_critical .rela.text.phy_ble_set_chan_base .rela.text.phy_init_param_set .text.phy_get_rfdata_num .rela.text.phy_set_23dbm_en .rela.text.phy_set_23dbm .rela.text.phy_track_temp_debug .comment 4 ! 4 ' 4 1 4 , @ À G I < D @ Ø G g R b @ ð G � Z
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16:34:12 Nov 14 2025 b513b46 %d,%s,%s,%s rfrx:0x%x,0x%x; rftx:0x%x,0x%x,0x%x; bb:0x%x,0x%x; dco:%d,%d,%d,%d
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param_flag: 0x%x
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vdd33=%d, temp_code=%d, offset=%d, temp_code_init=%d
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rc_dout, %d; wifi: %d, %d, %d, %d, bt: %d, %d, %d, %d
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RX_NOISEFLOOR, DCAP_STG1, %d, DCAP_STG2, wifi_cal_power, %d
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wifi_cal_atten, wifi_pwctrl_atten, TXIQ, %d, %d; LB_TXIQ, TXDC, %d, %d, %d, %d; bt_cal_power, %d
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bt_cal_atten, bt_pwctrl_atten, BT_TXIQ, BT_TXDC, RXIQ, RXDC_RFRX_BT, RXDC_RFRX_WIFI, RXDC_CHAN_WIFI, sar_dc_code=%d, sar_ref_code=%d
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txdc_cal_pwdet, rx_sat=%d
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i2c_bias %02d: 0x%x
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i2c_bbpll %02d: 0x%x
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i2c_txrf %02d: 0x%x
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i2c_bbtop %02d: 0x%x
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i2c_rfpll %02d: 0x%x
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i2c_rfpll_sdm %02d: 0x%x
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i2c_dig_reg %02d: 0x%x
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i2c_ulp %02d: 0x%x
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i2c_perif %02d: 0x%x
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pmu 0x%x: 0x%x
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i2c_mst 0x%x: 0x%x
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FECTRL 0x%x: 0x%x
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FECOEX 0x%x: 0x%x
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FEDATA 0x%x: 0x%x
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PCR 0x%x: 0x%x
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MODEM_SYSCON 0x%x: 0x%x
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MODEM_LPCON 0x%x: 0x%x
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agc 0x%x: 0x%x
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bb 0x%x: 0x%x
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bbtx 0x%x: 0x%x
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brx 0x%x: 0x%x
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nrx 0x%x: 0x%x
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btagc 0x%x: 0x%x
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bt_v3_2 0x%x: 0x%x
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btmac 0x%x: 0x%x
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802154_reg 0x%x: 0x%x
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apb 0x%x: 0x%x
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wifi_init_power: %d,
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wifi_pagain: 0x%x,
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wifi_bbgain:
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wifi_diggain:
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wifi_correct_power:%d
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bt_pagain:
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bt_bbgain:
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bt_diggain:
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bt_correct_power:%d
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phy_version: %d, %s, %s, %s
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ir_cap_ext:
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4 A R ü ] ½ ( .LANCHOR0 .LC0 .LC1 .LC2 .LC3 .LC4 .LC5 .LC6 .LC7 .LC8 .LC9 .LC10 .LC11 .LC12 .LC13 .LC14 .LC15 .LC16 .LC17 .LC18 .LC19 .LC20 .LC21 .LC22 .LC23 .L6 .L7 .L8 .L9 .L10 .L11 .L12 .L13 .L14 .L15 .L16 .L17 .L18 .L19 .L20 .L21 .L22 .L23 .L24 .LC24 .LC25 .LC26 .LC27 .LC28 .LC29 .LC30 .LC31 .LC32 .L46 .L47 .L48 .L49 .L50 .L51 .L52 .L53 .L54 .LC33 .LC34 .LC35 .LC36 .LC37 .LC38 .LC39 .LC40 .LC41 .LC42 .LC43 .L67 .L68 .L69 .L70 .L71 .L72 .L73 .LC44 .LC45 .LC46 .L86 .L85 .L88 .L89 .LC47 .LC48 .LC49 .LC52 .LC58 .LC50 .LC51 .LC61 .LC53 .LC54 .LC55 .LC56 .LC57 .LC59 .LC60 .LC62 .LC63 .LC64 .LC65 .LC66 .LC67 .LC68 .LC69 .LC70 .LC71 .LC72 .LC73 .L95 .L96 .L97 .L98 .L99 .L100 .LC74 .LC75 .LC76 .LC77 .LC78 get_phy_version_str phy_get_rf_cal_version sprintf phy_version_print phy_printf phy_reg_check phy_i2c_check g_phyFuns get_dc_value phy_tx_gain_print phy_param wifi_get_tx_tab bt_get_tx_tab get_bias_ref_code phy_get_vdd33 pbus_debugmode get_sar2_vol_new pbus_workmode rfpll_cap_check chip_v7_set_chan read_pll_cap phy_cal_print ets_delay_us read_hw_noisefloor tsens_temp_read_new get_iq_value wifi_set_tx_gain pbus_print debug_print_line ™ 3 3 3 3 3 3 $ $ 3 ( ( 3 , , 3 0 0 3 4 4 3 8 š 8 3 @ @ 3 ™ 3 3 3 3 3 3 $ $ 3 ( ( 3 , , 3 2 œ 2 3 3 " " 3 ( œ ( 3 H H 3 V V 3 \ œ \ 3 x x 3 † † 3 Œ œ Œ 3
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